JP2000068995A - Inter-device synchronization device, master device of the device and inter-device synchronization method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain an inter-device synchronization method by which malfunction device and an inter-device synchronization of the device is prevented due to occurrence of a synchronization error resulting from external noise. SOLUTION: A master device 20 has n-sets of synchronization pattern generating circuits 22a-22n that generate a synchronization pattern, and phase shift circuits 23a-23n that shift a phase of the generated synchronization pattern to transmit a synchronizing signal. A slave device 24 has n-sets of synchronization pattern detection circuits 25a-25n that detect a synchronization pattern of the received synchronizing signal, and phase shift circuits 26a-26n that shift a phase of the detected synchronization pattern. Through the configuration above, the master device 20 transmits n-sets of synchronization patterns with different phases and the slave device 24 extracts a synchronizing clock from the received synchronization pattern to prevent deviation of timing of the synchronizing signals between the devices due to external noise or the like.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to an inter-device synchronization device, a master device of the device, and an inter-device synchronization method.
In particular, the present invention relates to an inter-device synchronization device, a master device of the device, and an inter-device synchronization method for preventing malfunction due to external noise on a transmission line when performing synchronization between devices.

[0002]

2. Description of the Related Art Conventionally, in an inter-device synchronization device or an inter-device synchronization method, a method of transmitting a synchronization timing signal using a specific data pattern has been widely used in order to prevent malfunction due to noise due to a synchronization signal.

FIG. 3 shows a configuration example of a master device and a slave device to which a conventional inter-device synchronization device is applied. In the conventional inter-device synchronization device, the master device 2
00 has a synchronization unit 210 and a synchronization pattern generation circuit 220. The slave device 240 has a synchronization pattern detection circuit 250 and a synchronization unit 270.

In the inter-device synchronization device having the above-described configuration, the master device 200 generates a synchronized specific data pattern on the timing signal sent from the synchronization section 210 and superimposes the specific data pattern on the slave device. The synchronization signal is transmitted.

Synchronous pattern detecting circuit 2 on slave device side
At 50, a synchronization pattern is detected from a synchronization signal received from the master device 200, a timing clock is extracted,
The synchronization section 270 on the slave side is synchronized by this signal.

In the above configuration, the presence or absence of an error due to external noise or the like is determined by the slave device confirming the validity of the specific data pattern superimposed on the slave device.

[0007]

However, according to the configuration of the prior art described above, only one synchronization pattern is transmitted, and when an error occurs due to external noise or the like, the synchronization pattern itself is not detected. There is a problem that a synchronization shift occurs.

The present invention has been made to solve the above problems,
It is an object of the present invention to provide a device-to-device synchronization device and a device-to-device synchronization method capable of preventing a device from malfunctioning from occurrence of a synchronization error due to external noise.

[0009]

The present invention adopts the following constitution in order to solve the above problems.

In the inter-device synchronization device and the inter-device synchronization method according to the present invention, a plurality of synchronization patterns having different phases are generated and a plurality of synchronization patterns are detected. The feature is to extract a timing signal from these plural patterns.

As a result, it is possible to prevent a timing shift in synchronization between devices due to external noise.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The invention relating to an inter-device synchronization apparatus according to the first aspect of the present invention relates to an n-type (n is a natural number of 2 or more) synchronous pattern generating circuits for generating a synchronous pattern, Master device having a phase shift circuit for shifting and transmitting a synchronization signal, n synchronization pattern detection circuits for detecting a synchronization pattern of a received synchronization signal, and a phase shift circuit for shifting the phase of the detected synchronization pattern And a slave device having the following.

With this configuration, the master device transmits n synchronization patterns having different phases, and the slave device extracts the synchronization clock from the received synchronization pattern, thereby preventing timing deviation of synchronization between devices due to external noise or the like. It is possible to do. In the invention according to claim 2,
The above-described master device and the slave device have n phase shift circuits. With this configuration, it is possible to reliably generate n synchronization patterns.

According to the third aspect of the present invention, the master device includes a synchronizing unit that generates a synchronizing signal for generating a synchronizing pattern, and the slave device generates a synchronizing signal from the phase-shifted synchronizing pattern. Is adopted. With this configuration, the synchronization signal of the master device becomes a synchronization signal of the slave device and can be transmitted.

According to a fourth aspect of the present invention relating to the master device of the inter-device synchronization device, n (n is 2) for generating a synchronization pattern
A natural number) synchronous pattern generation circuit, a phase shift circuit for shifting the phase of the generated synchronous pattern,
and a transmitter for transmitting n synchronization signals.

With this configuration, it is possible to transmit n synchronization patterns having different phases and to extract the synchronization clock from the received synchronization pattern, thereby preventing a timing shift in synchronization between the devices due to external noise or the like. A master device of the inter-device synchronization device is obtained.

According to a fifth aspect of the present invention, there is provided a slave device for an inter-device synchronization device, comprising: a receiver for receiving n synchronization signals; and n synchronization patterns for detecting a synchronization pattern of the received synchronization signal. A configuration including a detection circuit and a phase shift circuit that shifts the phase of the detected synchronization pattern is employed.

According to this configuration, a synchronization clock can be extracted from n synchronization patterns having different phases transmitted from the master device, and a slave device of the inter-device synchronization device which prevents a timing deviation of inter-device synchronization due to external noise or the like. Is obtained.

According to a sixth aspect of the present invention, there is provided a synchronization pattern generating step for generating n (n is a natural number of 2 or more) synchronization patterns, and a phase shift for shifting the phase of the generated synchronization pattern. A transmission / reception step of transmitting / receiving a synchronization signal, a synchronization pattern detection step of detecting n synchronization patterns of the received synchronization signal, and a phase shift step of shifting the phase of the detected synchronization pattern. Take.

With this configuration, the master device sends out n synchronization patterns having different phases, and the slave device extracts the synchronization clock from the received synchronization pattern,
It is possible to prevent a timing shift in synchronization between devices due to external noise or the like.

Next, referring to the drawings, an inter-device synchronization device and an inter-device synchronization method according to an embodiment of the present invention will be described in detail. FIG. 1 is a diagram related to one embodiment of an inter-device synchronization device and an inter-device synchronization method of the present invention.

Embodiments will be described below with reference to the drawings. FIG. 1 shows a configuration example of an inter-device synchronization device of the present embodiment. The inter-device synchronization device according to the present embodiment includes a master device 20 and a slave device 24.

The master device 20 includes a synchronization section 21, synchronization pattern generation circuits 22a to 22n, and phase shift circuits 23a to 23n.
23n. Also, the slave device 24
Is configured to include synchronization pattern detection circuits 25a to 25n, phase shift circuits 26a to 26n, and a synchronization unit 27.

In the inter-device synchronizer having the above-described configuration, the master device 20 generates n synchronization patterns 31 to 3n in synchronization with the timing signal generated by the synchronization section 21 and shifts the phase of each synchronization pattern signal. Is transmitted to the slave device 24 using the synthesized signal 40 as a synchronization signal.

On the slave device 24 side, synchronization patterns are detected by n synchronization pattern detection circuits 25a to 25n, and the detected timing signals 51 to 5n are phase-shifted and synthesized.

FIG. 2 shows the signal transmission timing of the present apparatus.

A signal having a plurality of synchronization patterns is transmitted from the slave device 24 to the master device 20 as shown in the composite signal 40 of FIG. For example, even if one of the synchronization patterns is lost due to the external noise, the missing timing signal can be easily generated and supplemented by another synchronization pattern indicated by the timing signals 51 to 5n. Therefore, finally, a substantially normal timing signal can be reproduced.

[0028]

As is apparent from the above description, according to the present invention, the master device generates n synchronization patterns,
The phase of the generated synchronization pattern is shifted and a synchronization signal is transmitted. Further, the slave device detects a synchronization pattern of the received synchronization signal, and shifts the phase of the detected synchronization pattern. By generating a plurality of synchronization patterns having different phases and detecting a plurality of synchronization patterns, and extracting a timing signal, it is possible to prevent a timing deviation of synchronization between apparatuses due to external noise or the like.

[Brief description of the drawings]

FIG. 1 is a block diagram of an inter-device synchronization apparatus according to an embodiment of the present invention;

FIG. 2 is a flowchart showing an operation example of the embodiment;

FIG. 3 is a block diagram showing a conventional inter-device synchronization device.

[Explanation of symbols]

 Reference Signs List 20 master device 21 synchronization unit 22a to 22n synchronization pattern generation circuit 23a to 23n phase shift circuit 24 slave device 25a to 25n synchronization pattern detection circuit 26a to 26n phase shift circuit 27 synchronization unit 31 to 3n synchronization pattern 40 synthesized signal 51 to 5n timing signal

Claims (6)

[Claims] 1. A master device having n (n is a natural number of 2 or more) synchronous pattern generating circuits for generating a synchronous pattern and a phase shift circuit for shifting the phase of the generated synchronous pattern and transmitting a synchronous signal And a slave device having n synchronization pattern detection circuits for detecting a synchronization pattern of the received synchronization signal and a phase shift circuit for shifting the phase of the detected synchronization pattern. An inter-device synchronization device, wherein n synchronization patterns having different phases are transmitted from the device, and a synchronization clock is extracted from the synchronization pattern received by the slave device. 2. The inter-device synchronization device according to claim 1, wherein the master device and the slave device have n phase shift circuits. 3. The master device further includes a synchronization unit that generates a synchronization signal for generating the synchronization pattern, and the slave device includes a synchronization unit that generates a synchronization signal from the synchronization pattern whose phase is shifted. The inter-device synchronization device according to claim 1, wherein the device synchronization device is provided. 4. A semiconductor device comprising: n (n is a natural number of 2 or more) synchronous pattern generating circuits for generating a synchronous pattern; a phase shift circuit for shifting a phase of the generated synchronous pattern; A transmitter for transmitting a synchronization signal, transmitting n synchronization patterns having different phases, and enabling the slave device to extract a synchronization clock from the received synchronization pattern. Master device of the device. 5. A receiver for receiving n synchronization signals, n synchronization pattern detection circuits for detecting a synchronization pattern of the received synchronization signal, and shifting the phase of the detected synchronization pattern. And a synchronizing clock which can be extracted from n synchronization patterns having different phases transmitted from the master device. 6. A synchronous pattern generating step of generating n (n is a natural number of 2 or more) synchronous patterns, a phase shifting step of shifting the phase of the generated synchronous pattern, and a transmitting / receiving step of transmitting / receiving a synchronous signal And a synchronization pattern detection step of detecting n synchronization patterns of the received synchronization signal; and a phase shift step of shifting the phase of the detected synchronization pattern. A method for synchronizing between devices, wherein n different synchronization patterns are transmitted, and a synchronization clock is extracted from a synchronization pattern received by a slave device.