JP2000068714A - Matching circuit for millimeter wave and communication module - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a low-loss matching circuit substrate using a millimeter wave. SOLUTION: The matching circuit of the active element of a millimeter wave band is constituted by using a coplanar line, a signal transmission line 102 and grand lines 103 and 104 on a highly resistant silicon substrate 101 having a substrate resistance of 1000 to 10000 Ω.cm to provide a matching circuit low in loss, low in cost, having a satisfactory thermal conductivity and a flat surface. The flatness of a surface has an effect of minimizing the length of a connecting electrode (bump) with an active element to be mounted and uniforming the connecting electrode to make the performance of an mounted element close to a designed value. In addition the loss of a signal can additionally be suppressed by forming silicon oxide, silicon nitride and polyimide of at least 10 μm and an insulation film such as a polymer film fluoride on the substrate 101 as a desirable method.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a communication module for a millimeter wave band, and provides a communication module with a high yield.

[0002]

2. Description of the Related Art A communication module for a millimeter wave band is an MMIC (microwave monolithic I) that directly handles a millimeter wave signal.
C), a matching circuit board for down-converting the millimeter wave signal to the IF band, and a mounting board for providing a bias to the MMIC and the matching circuit formed on the matching circuit board. Among these, the MMIC and the matching circuit board handle signals in the millimeter wave band, so it is necessary to pay attention to the loss of high-frequency signals.

In a device used in a millimeter wave band having a frequency of 30 GHz to 300 GHz, when a signal line is taken out from a chip such as an MMIC to an external matching substrate, an increase in inductance is a problem. Such wire bonding is disadvantageous because it increases signal loss. For this reason,
As disclosed in JP-A-9-74118,
The signal lines from the MMIC to the external matching circuit formed by the microstrip line are taken out by bump-shaped electrodes so that the chip surface faces the matching circuit substrate formed on the low dielectric constant polymer film on the silicon substrate. It has been proposed to implement a simple flip-chip mounting. With this method, the signal line can be made as short as possible, and the signal loss can be reduced. The conventional example will be described with reference to FIG.
In FIG. 10, reference numeral 1001 denotes a substrate using a silicon substrate, and 1002 denotes a ground plane made of Al, Si, Cu or the like (hereinafter, simply referred to as a ground layer). 1003 is S
iO _2, etc. of the insulating film, 1004 electrode pads of Au electrode wiring layer made of such as 1005 electrode wire 1004 constituting the microstrip line formed on the insulating substrate forming the insulating layer 1003, 1006 is made of Ni or the like The bumps, which are conductive protrusion-like masses, 1010 are insulating layers 100
3 shows through holes formed at desired positions, and these constitute a wiring board 1011.

The wiring substrate 1011 includes an insulating substrate having an electrode wiring layer 1004, and a bump 1006 overlapping the electrode pad 1005 of the electrode wiring layer 1004.
The bump 1006 is formed of a material harder than the electrode wiring layer 1004. Reference numeral 1007 denotes a semiconductor element mounted face down on the wiring board 1011; 1008, an electrode pad of the semiconductor element 1007; and 1009, a photocurable insulating resin. That is, the semiconductor element 1007 includes a wiring board 1011 on which the electrode wiring layer 1004 is formed and an electrode pad 100 on the electrode wiring layer 1004 via the bump 1006.
And a semiconductor element 1007 having
6 is formed of a material harder than the electrode wiring layer 1004, and presses the semiconductor element 1007 to form the electrode wiring layer 1004.
Are plastically deformed to press-fit the bumps 1006 into the electrode wiring layers 1004.

[0005]

As a result of various studies of the method shown in the conventional example, it has been found that the following problems occur.

In a microstrip line, the characteristic impedance is determined by the thickness of an insulating film formed on a ground plane, so that it is difficult to finely adjust the impedance and to achieve high-frequency matching of elements.

When the thickness of the insulating film is about 10 μm,
The signal loss was large and could not be used practically. A document disclosed by the same author as this reference (1996, General Conference of the Institute of Electronics, Information and Communication Engineers, p. 78 “Low-loss millimeter-wave flip chip using BCB dielectric film”) has a thickness of 9 μm for SiO _2.
It is shown that even if m, the signal loss is large in the millimeter-wave band and is unusable.

[0008]

According to the present invention, in order to solve the above-mentioned problems, a matching circuit is difficult to be formed by a microstrip line because a ground line is formed by coplanar lines on both sides of a signal transmission line. Can be finely adjusted, which facilitates matching with the element.

The loss can be reduced by using a high-resistance silicon substrate having a specific resistance of 1000 to 10000 Ω · cm as a matching circuit substrate for forming a matching circuit. Further, the substrate has a specific resistance of 1,000 to 10,000 Ω.
The loss can be further reduced by using a high-resistance silicon substrate of cm and an insulating film deposited thereon.

The loss can be more effectively reduced by setting the thickness of the insulating film to 10 μm or more.

[0011]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, the present invention will be described in detail with reference to embodiments.

[First Embodiment] FIGS. 1A, 1B and 1C are diagrams showing a first embodiment of the present invention.

FIG. 1A is a plan view of the matching circuit board 101. FIG. In FIG. 1A, reference numeral 102 denotes a signal transmission path;
3 and 104 are ground lines. The signal transmission line 102 and the ground lines 103 and 104 form a coplanar line. The signal transmission lines in other parts have the same form. Thus, the wiring pattern of the coplanar line on the matching circuit board has a wiring width of 30 μm,
The wiring interval is 30 μm. This matching circuit board is MM
Element mounting sections 105, 106 and 10 for mounting ICs
7. SiN11 formed by p-CVD with a thickness of 0.2 μm
MIM (metal-insulator-metal) capacitors 108, 109 and 110 using 3 as an insulating film are formed.

FIG. 1B shows the matching circuit board 101 shown in FIG.
It is sectional drawing in AA 'shown by (a). The matching circuit substrate 101 uses a high-resistance silicon substrate 111 having a specific resistance of 1000 to 10000 Ω · cm, and on its surface, a titanium wiring (not shown) having a thickness of 0.1 μm and a lower wiring made of gold having a thickness of 2 μm. 112 and 0.2 μm thick SiN
With the film 113 interposed therebetween, a multilayer wiring of a 0.1 μm thick titanium wiring (not shown) and a 20 μm thick upper wiring 114 made of gold is formed. The dimensions of the matching circuit board are
It is 15 mm × 15 mm square and the thickness is 300 μm. The line of the matching circuit adopts a coplanar line, and the intersection of the lower layer wiring 112 and the upper layer wiring 114 crosses by an air bridge 115.

The transmission characteristics with respect to the frequency of the 50Ω transmission line provided on the substrate were measured with a network analyzer in the frequency range from 1 GHz to 80 GHz. The measurement results of the change to the frequency of the S ₂₁ parameter shown in FIG. For comparison, FIG. 3 also shows the case where a low-resistance silicon wafer (specific resistance 5 Ω · cm) was used for the substrate.

On the low frequency side, there is no significant difference in the degree of loss due to the substrate, but it is shown that the increase in loss is suppressed in the substrate using high-resistance silicon as the frequency increases. I have.

[Second Embodiment] FIGS. 2A, 2B and 2C are diagrams showing a second embodiment of the present invention. Specific resistance 1000 to 10000Ω · c as matching circuit board
The subsequent configuration is the same as that of the first embodiment except that a substrate in which the SiO ₂ insulating film 212 has a volume of 1 to 15 μm by p-CVD is used for a high-resistance silicon wafer 211 of m.

FIG. 2A is a plan view of the matching circuit board 201. FIG. In FIG. 2A, reference numeral 202 denotes a signal transmission path;
3 and 204 are ground lines. The signal transmission line 202 and the ground lines 203 and 204 form a coplanar line. The signal transmission lines in other parts have the same form. As described above, the wiring pattern on the matching circuit board has a wiring width of 30 μm and a wiring interval of 30 μm.
μm. This matching circuit board is an MIM (Metal-Insulator-Metal) capacitor 208, 20 using element mounting portions 205, 206 and 207 for mounting MMIC and SiN 213 formed by p-CVD with a thickness of 0.2 μm as an insulating film.
9 and 210 are formed.

FIG. 2B is a view of the matching circuit board 201 shown in FIG.
It is sectional drawing in AA 'shown by (a). As the matching circuit substrate 201, a high-resistance silicon substrate 211 having a specific resistance of 1000 to 10000 Ω · cm is used, and on its surface, a titanium wiring (not shown) having a thickness of 0.1 μm and a lower layer made of gold having a thickness of 2 μm are provided. Wiring 213 and 0.2 μm thick SiN
With the film 214 interposed, a multilayer wiring of a 0.1 μm thick titanium wiring and a 20 μm thick upper wiring 215 made of gold is formed. The size of the matching circuit board is 15mm x 15
mm □, and the thickness of the substrate is 300 μm. The intersection of the lower wiring 213 and the upper wiring 215 intersects by an air bridge 216.

The transmission characteristics with respect to the frequency of the 50Ω transmission line provided on the substrate were measured by a network analyzer in the frequency range from 1 GHz to 80 GHz. The measurement results of the change to the frequency of the S ₂₁ parameter shown in FIG. It is shown that even when the same high-resistance silicon substrate as in the first embodiment is used, the loss is smaller when the SiO ₂ insulating film is deposited on the 10 μm substrate surface.

[Embodiment 3] FIG. 4 shows a specific resistance 3000
Thickness of an insulating film on a high-resistance silicon substrate of Ω · cm;
It is a diagram showing the relationship between the loss (the value of S ₂₁ of S parameters) in 0 GHz. In addition, SiO ₂ ,
SiN, polyimide, fluoropolymer (Perfluori)
The thickness was changed to 20 μm using a native Polymer: CYTOP; Although the loss can be reduced by depositing an insulating film,
Until the thickness of the insulating film increases, the loss decreases,
When the thickness is 10 μm or more, the loss is almost saturated in any of the insulating films. This shows that it is effective to form an insulating film having a thickness of 10 μm or more.

FIG. 5 shows the same 50Ω transmission line at 60 GHz.
S ₂₁ parameter in the diagrams discussed how the dependence on the resistivity of the silicon substrate. Similarly, the relationship between the specific resistance of the silicon substrate when the thickness of the SiO insulating film deposited on the silicon substrate is 10 μm and the loss at 60 GHz is also shown. The specific resistance of the silicon substrate is 5 to 1000
The test was performed up to 0Ω · cm. From FIG. 5, it can be seen that, with a high-resistance silicon substrate of 1000 Ω · cm or more, S ₂₁ is almost saturated regardless of the presence or absence of the insulating film (SiO ₂ ), and the loss can be suppressed in the structure of the present invention. .

FIG. 6 shows a specific resistance 5 having an insulating film formed on its surface.
FIG. 4 is a diagram showing the relationship between the thickness of an insulating film and the loss at 60 GHz on a low-resistance silicon substrate of Ω · cm. As the insulating film, SiN, SiO ₂ , polyimide, or a fluoropolymer was used. However, in the case of SiN or SiO ₂ , cracks occurred on the surface with a thickness of 30 μm or more and could not be formed. Even if these insulating films are deposited up to 30 μm, the degree of loss is improved but not saturated. [Embodiment 4] A method of manufacturing a matching circuit board and a method of mounting an active element according to the present invention will be described. I do.

In the present embodiment, titanium and gold are used as the wiring material. However, the same effects can be obtained with aluminum wiring and copper wiring. Therefore, the present invention is not limited by the wiring material. The steps are shown in FIGS.

As shown in FIG.
An SiO ₂ film 702 is deposited on a high-resistance silicon substrate 701 having a thickness of 10000Ω · cm by p-CVD so as to have a thickness of 10 μm. A resist 703 is applied, a lower wiring pattern 704 is formed by photolithography, and titanium 705 and gold 706 are deposited in this order by 0.1 μm.
m, and the resist 703 is removed with an organic solvent. Thus, a pattern of the lower wiring 707 is formed.

Next, as shown in FIG.
By VD, a SiN film 708 is deposited to a thickness of 0.2 μm, a resist 709 is applied thereon, and a hole pattern 711 connecting the lower wiring 707 and the upper wiring 710 (see FIG. 7D) is formed. , By photolithography. SiN film 70 exposed from resist 709
8 is etched using hydrogen fluoride to form a lower wiring 707.
To expose. After that, the resist 709 is removed with an organic solvent.

Subsequently, as shown in FIG. 7C, a resist is applied again, and the resist is left on a part of the lower wiring, and a rounded resist pattern 712 is formed by a heat treatment at 150 ° C.

Further, as shown in FIG. 7D, titanium 713 and gold 714 are applied over the entire surface of the wafer in this order for 0.05 times.
Power supply metal 7 deposited to a thickness of 0.1 μm and 0.1 μm
15 are formed. On top of that, 20μ for selective plating
An m-thick resist 816 is applied. An upper wiring pattern 717 is formed by photolithography, and electrolytic plating is performed in a gold plating solution. The conditions to be performed are, for example, when the wiring thickness is 20 μm, the current density is 0.05 mA / mm ^2.
And the time is 120 minutes.

Finally, after plating is completed, the resist 716 is removed with an organic solvent as shown in FIG.
The power supply metal is etched using the plated upper layer wiring as a mask. As the etchant, for example, the gold 714 is etched using an ammonium iodide solution, and the titanium 713 is etched using phosphoric acid.

In this way, a matching circuit having a wiring thickness of 30 μm and an MIM capacitor mounted thereon can be formed on a high-resistance silicon substrate.

[Fifth Embodiment] A heterojunction bipolar transistor (H) is mounted on the matching circuit substrate described in the fourth embodiment.
An example in which a communication module having a BT) chip mounted thereon will be described. As shown in FIG. 8, the HBT has, for example, a chip size of 400 μm × 400 μm, an active element portion 801 of the HBT is formed in an area of 150 μm × 150 μm at the center, and an element It is composed of four pad portions 802 of 100 μm × 100 μm for extracting signals to the outside, and a gold bump 803 having a height of 70 μm is formed in the pad portion. This gold bump 803
Makes the HBT pad 802 and the electrode of the matching circuit board contact with each other at the shortest distance when mounted. Original height is 70μm, but by flip chip method,
When the chip surface is brought into contact with the matching circuit surface, 30 to 4
It expands and contracts to 0 μm. FIG. 9 is a plan view of the mounted state.
FIG. 9B shows an AA ′ cross section of FIG. Multiple HB
The T chip 901 is mounted on the matching circuit board 902.

Assuming use in the millimeter wave band, HB
If the distance between the surface of the T chip and the high-resistance silicon matching circuit board is different for each element, there will be a difference between the signals input to and output from each chip. When the same mounting method is applied to a microwave band high-frequency device, a phase shift occurs in a signal input to each element or a phase shift occurs in a signal output from each element. Is not a problem because of its long length, and is an inherent problem in the millimeter wave band. This problem is caused by uneven bump height,
Although these problems also occur due to the reproducibility at the time of mounting, these problems have disappeared as major problems as the reproducibility of the mounting apparatus and the plating process has increased. Rather, the flatness of the matching circuit board is the first factor for achieving a uniform distance. When a high-resistance silicon wafer is used, the flatness of the surface is 15 mm × as used for a matching circuit board.
At 15 mm, the range of the highest value and the lowest value on the surface of the matching circuit board is 2 μm, which is 3 mm smaller than the bump size after mounting.
% Or less.

On the other hand, in a ceramic substrate generally used as a high-frequency matching circuit substrate, the range of the maximum value and the minimum value in a region of 15 mm × 15 mm is 40 μm.
Also reach. In the situation where the surface flatness of the matching circuit board is impaired, the distance between the chip and the matching circuit board becomes not only uneven when flip-chip bonding, but also there is a possibility that the chip and the matching circuit board may be in contact with each other, resulting in a significant decrease in yield. .

In the present invention, when a coplanar line is used for a millimeter wave matching circuit, the impedance of the coplanar line is smaller than that of a microstrip line in which the impedance is controlled by a dielectric thickness from a wiring to a ground line.
Since the wiring width and the wiring interval can be set, if the accuracy with respect to the wiring width can be realized, a matching circuit can be manufactured very easily. For example, it is necessary to achieve a dimensional accuracy of ± 3% or less for a wiring width of 100 μm. According to the method described in the present embodiment, since a wiring is formed on a high-resistance silicon substrate, lithography of a semiconductor can be applied.
Wirings having a width of μm to 100 μm can be formed, and the dimensional accuracy can be realized at about ± 3%.

This is because, in a wiring pattern forming method by screen printing on a ceramic substrate, which is generally used, a variation of ± 30 μm is generated with respect to a wiring width of about 100 μm with accuracy that is practically impossible. And 1
00 μm is almost the minimum line width that can be realized.
Wiring with a fine line width of about μm cannot be formed.
This is the accuracy that can be realized for the first time by the present invention using high-resistance silicon.

When the wiring width and the wiring interval are large, it is necessary to pay attention to the thickness of the matching circuit board. Even if a coplanar line is formed, the wiring interval is 100 to 2
When the thickness is 00 μm, the thickness of a general substrate is 300 to 50.
At 0 μm, the thickness of the substrate cannot be neglected with respect to the wiring interval, so that it acts like a microstrip line and deviates from the design value, resulting in a decrease in yield.

There is also a method in which a coplanar line is formed using a high-resistance semiconductor substrate, for example, a semi-insulating GaAs substrate to form a matching circuit substrate. However, GaAs has a poor thermal conductivity and an output element is mounted. In this case, the heat of the active element does not escape, causing a decrease in efficiency and a deterioration in element reliability. In this respect, when a high-resistance silicon substrate is used, the heat conductivity is good, so that heat can be smoothly released. Also,
Since the Si substrate can be obtained at lower cost and the existing silicon process line can be used, the manufacturing cost of the matching circuit substrate can be reduced.

Further, there is a method of using a ceramic single crystal substrate or the like as a coplanar line matching circuit substrate. However, in terms of surface flatness and thermal conductivity, it is inferior to a silicon substrate. It is highly likely that the length of the device will vary from device to device, and the characteristics of the device will be uneven when flip-chip mounted and the thermal conductivity will be poor, as in the case of using a GaAs substrate. This is inferior to the configuration of the present invention, because it causes a decrease in the properties.

[0039]

According to the present invention, the degree of freedom of impedance setting is increased as compared with a conventional microstrip line on a silicon substrate, and it becomes possible to easily form a matching circuit according to a mounted element. A high-performance matching circuit board can be provided.

Also, by using high-resistance silicon for the substrate, a low-loss coplanar matching circuit can be provided.

Further, by forming an insulating film on a high-resistance silicon substrate, a coplanar matching circuit with lower loss can be provided.

[Brief description of the drawings]

FIG. 1 is a diagram showing a configuration of a matching circuit board according to Embodiment 1 of the present invention.

FIG. 2 is a diagram illustrating a configuration of a matching circuit board according to the first embodiment of the present invention.

3 is a graph showing the frequency dependence of S ₂₁ parameter of the transmission line of the present invention.

FIG. 4 is a high-resistance silicon (3000 Ω · cm) of the present invention.
S ₂₁ parameters for the insulating film thickness of the upper (60 GHz)
It is a figure which shows dependency.

5 is a diagram showing the resistivity dependence of the silicon substrate S ₂₁ parameters (60 GHz) of the present invention.

FIG. 6 is a diagram showing the dependence of the thickness of an insulating film on low-resistance silicon (5 Ω · cm) of the present invention on the S ₂₁ parameter (60 GHz).

FIG. 7 is a diagram illustrating an example of a manufacturing process of the matching circuit board of the present invention.

FIG. 8 is a diagram showing an example (HBT) of an active element mounted on the matching circuit board of the present invention.

FIG. 9 is a diagram showing a state in which the HBT chip of the present invention is mounted on a matching circuit board.

FIG. 10 is a diagram showing a conventional semiconductor device.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 101 Matching circuit board 102 Signal transmission line 103 Ground line 104 Ground line 105 Element mounting part 106 Element mounting part 107 Element mounting part 108 MIM capacitor 109 MIM capacitor 110 MIM capacitor 111 High resistance silicon substrate 112 Lower layer wiring 113 SiN film 114 Upper layer wiring 115 Air bridge 201 Matching circuit board 202 Signal transmission path 203 Ground line 204 Ground line 205 Element mounting part 206 Element mounting part 207 Element mounting part 208 MIM capacitor 209 MIM capacitor 210 MIM capacitor 211 High resistance silicon substrate 212 SiO ₂ film 213 Lower wiring 214 SiN film 215 upper wiring 216 air bridge 701 high-resistance silicon substrate 702 SiO ₂ film 703 resist 70 The lower layer wiring pattern 705 Titanium 706 Gold 707 lower wiring 708 SiN film 709 resist 710 upper wiring 711 hole pattern 712 resist pattern 713 Titanium 714 Gold 715 feeding metal 901 HBT chip 902 matching circuit substrate 1001 silicon substrate 1002 ground plane 1003 SiO ₂ 1004 electrode wire Layer 1005 Electrode wiring 1006 Bump 1007 Semiconductor element 1008 Electrode pad 1009 Photocurable insulating resin 1010 Through hole 1011 Wiring board

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) H01P 5/08 H01L 27/04 F 11/00

Claims (5)

[Claims] 1. A matching circuit for a millimeter wave, wherein a transmission line is formed by a coplanar line in a matching circuit board. 2. The method according to claim 1, wherein the matching circuit board has a specific resistance of 1000 to 1000.
2. The matching circuit for millimeter waves according to claim 1, wherein the matching circuit is made of a high-resistance silicon substrate having a resistance of 10,000 Ω · cm. 3. The method according to claim 1, wherein the matching circuit board has a specific resistance of 1000 to 1000.
3. The matching circuit for millimeter waves according to claim 2, comprising a high resistance silicon substrate of 10,000 Ω · cm and an insulating film deposited thereon. 4. The millimeter wave matching circuit according to claim 3, wherein the thickness of the insulating film is 10 μm or more. 5. A communication module mounted on the millimeter-wave matching circuit board according to claim 1.