JP2000040076A - 多重コンピュ―タ・プロセスの制御 - Google Patents

多重コンピュ―タ・プロセスの制御

Info

Publication number
JP2000040076A
JP2000040076A JP11186382A JP18638299A JP2000040076A JP 2000040076 A JP2000040076 A JP 2000040076A JP 11186382 A JP11186382 A JP 11186382A JP 18638299 A JP18638299 A JP 18638299A JP 2000040076 A JP2000040076 A JP 2000040076A
Authority
JP
Japan
Prior art keywords
mutex
processor
processing
processing set
register
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11186382A
Other languages
English (en)
Japanese (ja)
Other versions
JP2000040076A5 (https=
Inventor
Emrys John Williams
エムリス・ジョン・ウィリアムズ
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sun Microsystems Inc
Original Assignee
Sun Microsystems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sun Microsystems Inc filed Critical Sun Microsystems Inc
Publication of JP2000040076A publication Critical patent/JP2000040076A/ja
Publication of JP2000040076A5 publication Critical patent/JP2000040076A5/ja
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/52—Program synchronisation; Mutual exclusion, e.g. by means of semaphores

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Hardware Redundancy (AREA)
  • Stored Programmes (AREA)
JP11186382A 1998-06-30 1999-06-30 多重コンピュ―タ・プロセスの制御 Pending JP2000040076A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/107972 1998-06-30
US09/107,972 US6499048B1 (en) 1998-06-30 1998-06-30 Control of multiple computer processes using a mutual exclusion primitive ordering mechanism

Publications (2)

Publication Number Publication Date
JP2000040076A true JP2000040076A (ja) 2000-02-08
JP2000040076A5 JP2000040076A5 (https=) 2005-05-26

Family

ID=22319498

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11186382A Pending JP2000040076A (ja) 1998-06-30 1999-06-30 多重コンピュ―タ・プロセスの制御

Country Status (3)

Country Link
US (1) US6499048B1 (https=)
EP (1) EP0969369A3 (https=)
JP (1) JP2000040076A (https=)

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JP2008542878A (ja) * 2005-05-24 2008-11-27 マラソン テクノロジーズ コーポレイション 対称型マルチプロセッサ・フォルトトレラントコンピュータシステム
JP2013164763A (ja) * 2012-02-13 2013-08-22 Mitsubishi Electric Corp 二重化システム系切替制御装置
US8583845B2 (en) 2008-08-07 2013-11-12 Nec Corporation Multi-processor system and controlling method thereof
JP2014059749A (ja) * 2012-09-18 2014-04-03 Yokogawa Electric Corp フォールトトレラントシステム

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US6829609B1 (en) * 2000-01-11 2004-12-07 Emc Corporation System, device, and method for providing mutual exclusion for computer system resources
US7908520B2 (en) * 2000-06-23 2011-03-15 A. Avizienis And Associates, Inc. Self-testing and -repairing fault-tolerance infrastructure for computer systems
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US7571439B1 (en) * 2002-05-31 2009-08-04 Teradata Us, Inc. Synchronizing access to global resources
US7111001B2 (en) * 2003-01-27 2006-09-19 Seiko Epson Corporation Event driven transaction state management with single cache for persistent framework
US7493618B2 (en) * 2003-09-19 2009-02-17 International Business Machines Corporation Fault tolerant mutual exclusion locks for shared memory systems
US20050138478A1 (en) * 2003-11-14 2005-06-23 Safford Kevin D. Error detection method and system for processors that employ alternating threads
US7761923B2 (en) 2004-03-01 2010-07-20 Invensys Systems, Inc. Process control methods and apparatus for intrusion detection, protection and network hardening
US7447919B2 (en) * 2004-04-06 2008-11-04 Hewlett-Packard Development Company, L.P. Voltage modulation for increased reliability in an integrated circuit
US7290169B2 (en) * 2004-04-06 2007-10-30 Hewlett-Packard Development Company, L.P. Core-level processor lockstepping
US7287185B2 (en) * 2004-04-06 2007-10-23 Hewlett-Packard Development Company, L.P. Architectural support for selective use of high-reliability mode in a computer system
US7296181B2 (en) 2004-04-06 2007-11-13 Hewlett-Packard Development Company, L.P. Lockstep error signaling
US7765547B2 (en) * 2004-11-24 2010-07-27 Maxim Integrated Products, Inc. Hardware multithreading systems with state registers having thread profiling data
US7823158B2 (en) * 2005-08-18 2010-10-26 International Business Machines Corporation Adaptive scheduling and management of work processing in a target context in resource contention
WO2007123753A2 (en) 2006-03-30 2007-11-01 Invensys Systems, Inc. Digital data processing apparatus and methods for improving plant performance
US7870544B2 (en) * 2006-04-05 2011-01-11 International Business Machines Corporation Insuring maximum code motion of accesses to DMA buffers
US8321872B2 (en) * 2006-06-28 2012-11-27 Nvidia Corporation Reusable, operating system aware hardware mutex
US8996152B2 (en) * 2006-06-28 2015-03-31 Nvidia Corporation Operating system aware hardware mutex
JP4874165B2 (ja) * 2006-07-07 2012-02-15 ルネサスエレクトロニクス株式会社 マルチプロセッサシステム及びマルチプロセッサシステムにおけるアクセス権設定方法
US8479201B2 (en) * 2006-09-18 2013-07-02 Innovasic, Inc. Processor with hardware solution for priority inversion
US8112675B2 (en) * 2006-09-28 2012-02-07 Nvidia Corporation Filesystem directory debug log
CN104407518B (zh) 2008-06-20 2017-05-31 因文西斯系统公司 对用于过程控制的实际和仿真设施进行交互的系统和方法
US8127060B2 (en) 2009-05-29 2012-02-28 Invensys Systems, Inc Methods and apparatus for control configuration with control objects that are fieldbus protocol-aware
US8463964B2 (en) 2009-05-29 2013-06-11 Invensys Systems, Inc. Methods and apparatus for control configuration with enhanced change-tracking
US8499299B1 (en) * 2010-06-29 2013-07-30 Ca, Inc. Ensuring deterministic thread context switching in virtual machine applications
US8769518B1 (en) 2010-06-29 2014-07-01 Ca, Inc. Ensuring determinism during programmatic replay in a virtual machine
US8732670B1 (en) 2010-06-29 2014-05-20 Ca, Inc. Ensuring determinism during programmatic replay in a virtual machine
US9058224B2 (en) 2011-06-03 2015-06-16 Apple Inc. Serialization of asynchronous command streams
KR102028663B1 (ko) * 2012-07-24 2019-10-04 삼성전자주식회사 에러 검출 방법 및 장치
US9026847B2 (en) * 2012-12-21 2015-05-05 Advanced Micro Devices, Inc. Hardware based redundant multi-threading inside a GPU for improved reliability
US9367372B2 (en) * 2013-06-18 2016-06-14 Advanced Micro Devices, Inc. Software only intra-compute unit redundant multithreading for GPUs
US10579536B2 (en) * 2016-08-09 2020-03-03 Arizona Board Of Regents On Behalf Of Arizona State University Multi-mode radiation hardened multi-core microprocessors
US11250124B2 (en) * 2019-09-19 2022-02-15 Facebook Technologies, Llc Artificial reality system having hardware mutex with process authentication
CN111880971B (zh) * 2020-07-30 2024-02-02 上海航天计算机技术研究所 三机异构冗余系统和控制方法
CN115878648B (zh) * 2023-02-22 2023-05-05 成都成电医星数字健康软件有限公司 数据逻辑时序自动调整方法、装置、电子设备及存储介质

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US6029190A (en) * 1997-09-24 2000-02-22 Sony Corporation Read lock and write lock management system based upon mutex and semaphore availability
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Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008542878A (ja) * 2005-05-24 2008-11-27 マラソン テクノロジーズ コーポレイション 対称型マルチプロセッサ・フォルトトレラントコンピュータシステム
US8583845B2 (en) 2008-08-07 2013-11-12 Nec Corporation Multi-processor system and controlling method thereof
JP5360061B2 (ja) * 2008-08-07 2013-12-04 日本電気株式会社 マルチプロセッサシステム及びその制御方法
JP2013164763A (ja) * 2012-02-13 2013-08-22 Mitsubishi Electric Corp 二重化システム系切替制御装置
JP2014059749A (ja) * 2012-09-18 2014-04-03 Yokogawa Electric Corp フォールトトレラントシステム
US9400666B2 (en) 2012-09-18 2016-07-26 Yokogawa Electric Corporation Fault tolerant system and method for performing fault tolerant

Also Published As

Publication number Publication date
EP0969369A2 (en) 2000-01-05
EP0969369A3 (en) 2004-01-07
US6499048B1 (en) 2002-12-24

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