ITMI911161D0 - Dram having peripheral circuitry in which the contact interconnection source-drain of a MOS transistor and 'made small by using a layer of Terrace and method of manufacturing it - Google Patents

Dram having peripheral circuitry in which the contact interconnection source-drain of a MOS transistor and 'made small by using a layer of Terrace and method of manufacturing it

Info

Publication number
ITMI911161D0
ITMI911161D0 IT91MI1161A ITMI911161A ITMI911161D0 IT MI911161 D0 ITMI911161 D0 IT MI911161D0 IT 91MI1161 A IT91MI1161 A IT 91MI1161A IT MI911161 A ITMI911161 A IT MI911161A IT MI911161 D0 ITMI911161 D0 IT MI911161D0
Authority
IT
Italy
Prior art keywords
terrace
dram
drain
manufacturing
layer
Prior art date
Application number
IT91MI1161A
Other languages
Italian (it)
Inventor
Hideaki Arima
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority to JP2115642A priority Critical patent/JP2524862B2/en
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Publication of ITMI911161D0 publication Critical patent/ITMI911161D0/en
Publication of ITMI911161A1 publication Critical patent/ITMI911161A1/en
Application granted granted Critical
Publication of IT1247303B publication Critical patent/IT1247303B/en

Links

Classifications

    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/10Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/105Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including field-effect components
    • H01L27/108Dynamic random access memory structures
    • H01L27/10844Multistep manufacturing methods
    • H01L27/10847Multistep manufacturing methods for structures comprising one transistor one-capacitor memory cells
    • H01L27/1085Multistep manufacturing methods for structures comprising one transistor one-capacitor memory cells with at least one step of making the capacitor or connections thereto
    • H01L27/10852Multistep manufacturing methods for structures comprising one transistor one-capacitor memory cells with at least one step of making the capacitor or connections thereto the capacitor extending over the access transistor
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/10Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/105Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including field-effect components
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/10Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/105Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including field-effect components
    • H01L27/108Dynamic random access memory structures
    • H01L27/10805Dynamic random access memory structures with one-transistor one-capacitor memory cells
    • H01L27/10808Dynamic random access memory structures with one-transistor one-capacitor memory cells the storage electrode stacked over transistor
    • H01L27/10817Dynamic random access memory structures with one-transistor one-capacitor memory cells the storage electrode stacked over transistor the storage electrode having multiple wings
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S257/00Active solid-state devices, e.g. transistors, solid-state diodes
    • Y10S257/903FET configuration adapted for use as static memory cell
ITMI911161A 1990-05-01 1991-04-29 Dram having peripheral circuitry in which the contact interconnection source-drain of a MOS transistor and 'made small by using a layer of Terrace and method of manufacturing it IT1247303B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2115642A JP2524862B2 (en) 1990-05-01 1990-05-01 The semiconductor memory device and manufacturing method thereof

Publications (3)

Publication Number Publication Date
ITMI911161D0 true ITMI911161D0 (en) 1991-04-29
ITMI911161A1 ITMI911161A1 (en) 1991-11-02
IT1247303B IT1247303B (en) 1994-12-12

Family

ID=14667697

Family Applications (1)

Application Number Title Priority Date Filing Date
ITMI911161A IT1247303B (en) 1990-05-01 1991-04-29 Dram having peripheral circuitry in which the contact interconnection source-drain of a MOS transistor and 'made small by using a layer of Terrace and method of manufacturing it

Country Status (5)

Country Link
US (4) US5486712A (en)
JP (1) JP2524862B2 (en)
KR (1) KR940005889B1 (en)
DE (1) DE4113932A1 (en)
IT (1) IT1247303B (en)

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US20050036363A1 (en) * 1996-05-24 2005-02-17 Jeng-Jye Shau High performance embedded semiconductor memory devices with multiple dimension first-level bit-lines
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US5712201A (en) * 1996-06-07 1998-01-27 Taiwan Semiconductor Manufacturing Company, Ltd. Fabrication method for integrating logic and single level polysilicon DRAM devices on the same semiconductor chip
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US6110818A (en) * 1998-07-15 2000-08-29 Philips Electronics North America Corp. Semiconductor device with gate electrodes for sub-micron applications and fabrication thereof
KR100276390B1 (en) * 1998-08-10 2000-12-15 윤종용 Semiconductor memory device and method of fabricating the same
US6015733A (en) * 1998-08-13 2000-01-18 Taiwan Semiconductor Manufacturing Company Process to form a crown capacitor structure for a dynamic random access memory cell
US6208004B1 (en) 1998-08-19 2001-03-27 Philips Semiconductor, Inc. Semiconductor device with high-temperature-stable gate electrode for sub-micron applications and fabrication thereof
US6596577B2 (en) * 1998-08-25 2003-07-22 Micron Technology, Inc. Semiconductor processing methods of forming dynamic random access memory (DRAM) circuitry
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JP2000311992A (en) * 1999-04-26 2000-11-07 Toshiba Corp Nonvolatile semiconductor memory device and manufacture thereof
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Also Published As

Publication number Publication date
ITMI911161A1 (en) 1991-11-02
US5486712A (en) 1996-01-23
IT1247303B (en) 1994-12-12
KR940005889B1 (en) 1994-06-24
US5949110A (en) 1999-09-07
DE4113932A1 (en) 1991-11-14
US5612241A (en) 1997-03-18
KR910020904A (en) 1991-12-20
JPH0412564A (en) 1992-01-17
JP2524862B2 (en) 1996-08-14
US5659191A (en) 1997-08-19

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Legal Events

Date Code Title Description
0001 Granted
TA Fee payment date (situation as of prs-date), data collected since 19931001

Effective date: 19970429