IT8319963A0 - Dispositivo a semiconduttore aforma di scheda piana con contatti elettrici su ambedue le facce eprocedimento per la sua fabbricazione. - Google Patents

Dispositivo a semiconduttore aforma di scheda piana con contatti elettrici su ambedue le facce eprocedimento per la sua fabbricazione.

Info

Publication number
IT8319963A0
IT8319963A0 IT8319963A IT1996383A IT8319963A0 IT 8319963 A0 IT8319963 A0 IT 8319963A0 IT 8319963 A IT8319963 A IT 8319963A IT 1996383 A IT1996383 A IT 1996383A IT 8319963 A0 IT8319963 A0 IT 8319963A0
Authority
IT
Italy
Prior art keywords
procedure
manufacture
sides
shape
semiconductor device
Prior art date
Application number
IT8319963A
Other languages
English (en)
Other versions
IT1212711B (it
Inventor
Giuseppe Marchisi
Original Assignee
Ates Componenti Elettron
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ates Componenti Elettron filed Critical Ates Componenti Elettron
Priority to IT8319963A priority Critical patent/IT1212711B/it
Publication of IT8319963A0 publication Critical patent/IT8319963A0/it
Priority to DE8484200052T priority patent/DE3470363D1/de
Priority to EP84200052A priority patent/EP0121268B1/en
Priority to US07/310,029 priority patent/US5032894A/en
Priority to US07/340,696 priority patent/US5102828A/en
Application granted granted Critical
Publication of IT1212711B publication Critical patent/IT1212711B/it

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49855—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers for flat-cards, e.g. credit cards
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07743—External electrical contacts
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49534—Multi-layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49121—Beam lead frame or beam lead device
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
    • Y10T29/49133—Assembling to base an electrical component, e.g., capacitor, etc. with component orienting
    • Y10T29/49135—Assembling to base an electrical component, e.g., capacitor, etc. with component orienting and shaping, e.g., cutting or bending, etc.

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • Theoretical Computer Science (AREA)
  • Credit Cards Or The Like (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
IT8319963A 1983-03-09 1983-03-09 Dispositivo a semiconduttore aforma di scheda piana con contatti elettrici su ambedue le facce eprocedimento per la sua fabbricazione. IT1212711B (it)

Priority Applications (5)

Application Number Priority Date Filing Date Title
IT8319963A IT1212711B (it) 1983-03-09 1983-03-09 Dispositivo a semiconduttore aforma di scheda piana con contatti elettrici su ambedue le facce eprocedimento per la sua fabbricazione.
DE8484200052T DE3470363D1 (en) 1983-03-09 1984-01-16 Flat-card-shaped semiconductor device with electric contacts on both faces and process for its manufacture
EP84200052A EP0121268B1 (en) 1983-03-09 1984-01-16 Flat-card-shaped semiconductor device with electric contacts on both faces and process for its manufacture
US07/310,029 US5032894A (en) 1983-03-09 1989-02-08 Semiconductor card with electrical contacts on both faces
US07/340,696 US5102828A (en) 1983-03-09 1989-04-20 Method for manufacturing a semiconductor card with electrical contacts on both faces

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT8319963A IT1212711B (it) 1983-03-09 1983-03-09 Dispositivo a semiconduttore aforma di scheda piana con contatti elettrici su ambedue le facce eprocedimento per la sua fabbricazione.

Publications (2)

Publication Number Publication Date
IT8319963A0 true IT8319963A0 (it) 1983-03-09
IT1212711B IT1212711B (it) 1989-11-30

Family

ID=11162681

Family Applications (1)

Application Number Title Priority Date Filing Date
IT8319963A IT1212711B (it) 1983-03-09 1983-03-09 Dispositivo a semiconduttore aforma di scheda piana con contatti elettrici su ambedue le facce eprocedimento per la sua fabbricazione.

Country Status (4)

Country Link
US (2) US5032894A (it)
EP (1) EP0121268B1 (it)
DE (1) DE3470363D1 (it)
IT (1) IT1212711B (it)

Families Citing this family (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4567545A (en) * 1983-05-18 1986-01-28 Mettler Rollin W Jun Integrated circuit module and method of making same
JPS625367U (it) * 1985-03-16 1987-01-13
JPS61188871U (it) * 1985-05-16 1986-11-25
FR2590052B1 (fr) * 1985-11-08 1991-03-01 Eurotechnique Sa Procede de recyclage d'une carte comportant un composant, carte prevue pour etre recyclee
FR2590051B1 (fr) * 1985-11-08 1991-05-17 Eurotechnique Sa Carte comportant un composant et micromodule a contacts de flanc
EP0253664B1 (en) * 1986-07-16 1992-10-14 Canon Kabushiki Kaisha Semiconductor photo-sensor and method for manufacturing the same
US4791473A (en) * 1986-12-17 1988-12-13 Fairchild Semiconductor Corporation Plastic package for high frequency semiconductor devices
US5417905A (en) * 1989-05-26 1995-05-23 Esec (Far East) Limited Method of making a card having decorations on both faces
US5328870A (en) * 1992-01-17 1994-07-12 Amkor Electronics, Inc. Method for forming plastic molded package with heat sink for integrated circuit devices
US5854534A (en) 1992-08-05 1998-12-29 Fujitsu Limited Controlled impedence interposer substrate
JP2774906B2 (ja) * 1992-09-17 1998-07-09 三菱電機株式会社 薄形半導体装置及びその製造方法
US5362679A (en) * 1993-07-26 1994-11-08 Vlsi Packaging Corporation Plastic package with solder grid array
DE4326816A1 (de) * 1993-08-10 1995-02-16 Giesecke & Devrient Gmbh Elektronisches Modul für Karten und Herstellung eines solchen Moduls
US6177040B1 (en) * 1993-11-24 2001-01-23 Texas Instruments Incorporated Method for making light transparent package for integrated circuit
US5701034A (en) * 1994-05-03 1997-12-23 Amkor Electronics, Inc. Packaged semiconductor die including heat sink with locking feature
US6254815B1 (en) * 1994-07-29 2001-07-03 Motorola, Inc. Molded packaging method for a sensing die having a pressure sensing diaphragm
DE19512191C2 (de) * 1995-03-31 2000-03-09 Siemens Ag Kartenförmiger Datenträger und Leadframe zur Verwendung in einem solchen Datenträger
US5646446A (en) * 1995-12-22 1997-07-08 Fairchild Space And Defense Corporation Three-dimensional flexible assembly of integrated circuits
DE19607212C1 (de) * 1996-02-26 1997-04-10 Richard Herbst Verbundkörper, Verfahren und Kunststoff-Spritzgießwerkzeug zur Herstellung eines solchen
US5956601A (en) * 1996-04-25 1999-09-21 Kabushiki Kaisha Toshiba Method of mounting a plurality of semiconductor devices in corresponding supporters
FR2753554B1 (fr) * 1996-09-16 2001-09-07 Fraunhofer Ges Forschung Carte a puce
US6085407A (en) 1997-08-21 2000-07-11 Micron Technology, Inc. Component alignment apparatuses and methods
US6803656B2 (en) * 1997-12-31 2004-10-12 Micron Technology, Inc. Semiconductor device including combed bond pad opening
DE10340129B4 (de) * 2003-08-28 2006-07-13 Infineon Technologies Ag Elektronisches Modul mit Steckkontakten und Verfahren zur Herstellung desselben
JP2009094189A (ja) * 2007-10-05 2009-04-30 Tokai Rika Co Ltd コネクタ付き半導体パッケージ
JP5740372B2 (ja) 2012-09-12 2015-06-24 株式会社東芝 半導体メモリカード

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3474297A (en) * 1967-06-30 1969-10-21 Texas Instruments Inc Interconnection system for complex semiconductor arrays
JPS4826069B1 (it) * 1968-03-04 1973-08-04
US3641401A (en) * 1971-03-10 1972-02-08 American Lava Corp Leadless ceramic package for integrated circuits
US3702464A (en) * 1971-05-04 1972-11-07 Ibm Information card
US3912852A (en) * 1974-05-31 1975-10-14 Westinghouse Electric Corp Thin-film electrical circuit lead connection arrangement
US4066851A (en) * 1975-10-30 1978-01-03 Chomerics, Inc. Keyboard switch assembly having foldable printed circuit board, integral spacer and preformed depression-type alignment fold
US4018491A (en) * 1976-03-08 1977-04-19 Rockwell International Corporation Carrier for devices
DE2712543C2 (de) * 1976-03-24 1982-11-11 Hitachi, Ltd., Tokyo Anordnung eines Halbleiterbauelements auf einer Montageplatte
US4147889A (en) * 1978-02-28 1979-04-03 Amp Incorporated Chip carrier
DE2939502A1 (de) * 1979-09-28 1981-10-08 Ferranti Ltd., Gatley, Cheadle, Cheshire Schaltungsanordnung
US4307438A (en) * 1980-01-04 1981-12-22 Augat Inc. Hinged back panel input/output board
US4459607A (en) * 1981-06-18 1984-07-10 Burroughs Corporation Tape automated wire bonded integrated circuit chip assembly
JPH0696356B2 (ja) * 1986-03-17 1994-11-30 三菱電機株式会社 薄型半導体カード

Also Published As

Publication number Publication date
EP0121268A1 (en) 1984-10-10
EP0121268B1 (en) 1988-04-06
US5032894A (en) 1991-07-16
DE3470363D1 (en) 1988-05-11
US5102828A (en) 1992-04-07
IT1212711B (it) 1989-11-30

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Legal Events

Date Code Title Description
TA Fee payment date (situation as of event date), data collected since 19931001

Effective date: 19970329