IN2014CN02789A - - Google Patents
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- Publication number
- IN2014CN02789A IN2014CN02789A IN2789CHN2014A IN2014CN02789A IN 2014CN02789 A IN2014CN02789 A IN 2014CN02789A IN 2789CHN2014 A IN2789CHN2014 A IN 2789CHN2014A IN 2014CN02789 A IN2014CN02789 A IN 2014CN02789A
- Authority
- IN
- India
Links
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/64—Impedance arrangements
- H01L23/66—High-frequency adaptations
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/181—Printed circuits structurally associated with non-printed electric components associated with surface mounted components
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/003—Constructional details, e.g. physical layout, assembly, wiring or busbar connections
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
- H05K1/0228—Compensation of cross-talk by a mutually correlated lay-out of printed circuit traces, e.g. for compensation of cross-talk in mounted connectors
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
- H05K1/023—Reduction of cross-talk, noise or electromagnetic interference using auxiliary mounted passive components or auxiliary substances
- H05K1/0234—Resistors or by disposing resistive or lossy substances in or near power planes
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/16—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
- H05K1/165—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor incorporating printed inductors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49175—Parallel arrangements
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3011—Impedance
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0263—High current adaptations, e.g. printed high current conductors or using auxiliary non-printed means; Fine and coarse circuit patterns on one circuit board
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/07—Electric details
- H05K2201/0707—Shielding
- H05K2201/0723—Shielding provided by an inner layer of PCB
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/07—Electric details
- H05K2201/0776—Resistance and impedance
- H05K2201/0792—Means against parasitic impedance; Means against eddy currents
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/08—Magnetic details
- H05K2201/083—Magnetic materials
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Structure Of Printed Boards (AREA)
- Coils Or Transformers For Communication (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE102011053680A DE102011053680A1 (en) | 2011-09-16 | 2011-09-16 | Circuit arrangement for reducing oscillation tendency |
PCT/EP2012/068191 WO2013037989A1 (en) | 2011-09-16 | 2012-09-17 | Circuitry arrangement for reducing a tendency towards oscillations |
Publications (1)
Publication Number | Publication Date |
---|---|
IN2014CN02789A true IN2014CN02789A (en) | 2015-07-03 |
Family
ID=47040660
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
IN2789CHN2014 IN2014CN02789A (en) | 2011-09-16 | 2014-04-11 |
Country Status (7)
Country | Link |
---|---|
US (1) | US8964400B2 (en) |
EP (1) | EP2756741A1 (en) |
JP (1) | JP2014528167A (en) |
CN (1) | CN103828490A (en) |
DE (1) | DE102011053680A1 (en) |
IN (1) | IN2014CN02789A (en) |
WO (1) | WO2013037989A1 (en) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP6106127B2 (en) | 2014-05-29 | 2017-03-29 | 株式会社ソニー・インタラクティブエンタテインメント | Switching converter and electronic device using the same |
JP6908012B2 (en) * | 2018-10-01 | 2021-07-21 | 株式会社デンソー | Semiconductor module |
JP7136023B2 (en) * | 2019-07-01 | 2022-09-13 | 株式会社豊田自動織機 | Circuit boards and circuit board modules |
TWI693682B (en) * | 2019-08-28 | 2020-05-11 | 財團法人工業技術研究院 | Electronic device package structure |
Family Cites Families (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6353540B1 (en) * | 1995-01-10 | 2002-03-05 | Hitachi, Ltd. | Low-EMI electronic apparatus, low-EMI circuit board, and method of manufacturing the low-EMI circuit board. |
US6166933A (en) * | 1999-10-01 | 2000-12-26 | Pillar Industries, Inc. | Snubber circuit for an inverter having inductively coupled resistance |
DE10123232A1 (en) | 2001-05-12 | 2002-11-21 | Infineon Technologies Ag | Semiconductor module used as a MOSFET, JFET or thyristor has a damping material having electromagnetically damping properties provided in a sealing composition arranged within a housing |
JP4587603B2 (en) * | 2001-06-11 | 2010-11-24 | 株式会社日本自動車部品総合研究所 | Electronic equipment |
JP3798959B2 (en) | 2001-09-27 | 2006-07-19 | 京セラ株式会社 | Multilayer wiring board |
DE10159851B4 (en) | 2001-12-06 | 2006-05-24 | Infineon Technologies Ag | Semiconductor device arrangement with reduced oscillation tendency |
DE10162637C1 (en) | 2001-12-20 | 2003-08-21 | Eupec Gmbh & Co Kg | Circuit arrangement with electronic components on an insulating carrier substrate |
CN1148864C (en) * | 2002-05-09 | 2004-05-05 | 艾默生网络能源有限公司 | Method and device for compensating ripple amplitude modulation |
JP2004022735A (en) * | 2002-06-14 | 2004-01-22 | Matsushita Electric Ind Co Ltd | Part-mounting board |
DE10333806A1 (en) * | 2003-07-24 | 2005-02-17 | Siemens Ag | Printed circuit board e.g. for mobile telephone components comprising screen for at least one component against electromagnetic radiation |
US20050068751A1 (en) * | 2003-09-30 | 2005-03-31 | Hyunjun Kim | Floating trace on signal layer |
KR100771146B1 (en) | 2006-11-30 | 2007-10-29 | 한국과학기술원 | System in package using single layer capacitor |
JP4343254B1 (en) * | 2008-06-02 | 2009-10-14 | 株式会社東芝 | Multilayer printed circuit board |
JP2010087024A (en) * | 2008-09-29 | 2010-04-15 | Nec Corp | Circuit board, manufacturing method for circuit board, and electronic equipment |
DE102009026479B4 (en) * | 2009-05-26 | 2016-12-29 | Infineon Technologies Ag | Power semiconductor module with reduced oscillation tendency |
-
2011
- 2011-09-16 DE DE102011053680A patent/DE102011053680A1/en not_active Withdrawn
-
2012
- 2012-09-17 CN CN201280044251.9A patent/CN103828490A/en active Pending
- 2012-09-17 EP EP12773247.7A patent/EP2756741A1/en not_active Withdrawn
- 2012-09-17 JP JP2014530250A patent/JP2014528167A/en active Pending
- 2012-09-17 WO PCT/EP2012/068191 patent/WO2013037989A1/en active Application Filing
-
2014
- 2014-03-14 US US14/210,697 patent/US8964400B2/en not_active Expired - Fee Related
- 2014-04-11 IN IN2789CHN2014 patent/IN2014CN02789A/en unknown
Also Published As
Publication number | Publication date |
---|---|
JP2014528167A (en) | 2014-10-23 |
WO2013037989A1 (en) | 2013-03-21 |
CN103828490A (en) | 2014-05-28 |
US20140192487A1 (en) | 2014-07-10 |
EP2756741A1 (en) | 2014-07-23 |
DE102011053680A1 (en) | 2013-03-21 |
US8964400B2 (en) | 2015-02-24 |