IL291230B1 - Indexing and replaying time travel traces using diphthongs - Google Patents

Indexing and replaying time travel traces using diphthongs

Info

Publication number
IL291230B1
IL291230B1 IL291230A IL29123022A IL291230B1 IL 291230 B1 IL291230 B1 IL 291230B1 IL 291230 A IL291230 A IL 291230A IL 29123022 A IL29123022 A IL 29123022A IL 291230 B1 IL291230 B1 IL 291230B1
Authority
IL
Israel
Prior art keywords
state
diffgram
instruction
instructions
named resources
Prior art date
Application number
IL291230A
Other languages
Hebrew (he)
Other versions
IL291230A (en
IL291230B2 (en
Original Assignee
Microsoft Technology Licensing Llc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Microsoft Technology Licensing Llc filed Critical Microsoft Technology Licensing Llc
Publication of IL291230A publication Critical patent/IL291230A/en
Publication of IL291230B1 publication Critical patent/IL291230B1/en
Publication of IL291230B2 publication Critical patent/IL291230B2/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/36—Prevention of errors by analysis, debugging or testing of software
    • G06F11/362—Debugging of software
    • G06F11/3636—Debugging of software by tracing the execution of the program
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/30—Monitoring
    • G06F11/3003—Monitoring arrangements specially adapted to the computing system or computing system component being monitored
    • G06F11/3017—Monitoring arrangements specially adapted to the computing system or computing system component being monitored where the computing system is implementing multitasking
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/30—Monitoring
    • G06F11/3003—Monitoring arrangements specially adapted to the computing system or computing system component being monitored
    • G06F11/302—Monitoring arrangements specially adapted to the computing system or computing system component being monitored where the computing system component is a software system
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/30—Monitoring
    • G06F11/34—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment
    • G06F11/3466—Performance evaluation by tracing or monitoring
    • G06F11/3471—Address tracing
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/30—Monitoring
    • G06F11/34—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment
    • G06F11/3466—Performance evaluation by tracing or monitoring
    • G06F11/3476—Data logging
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2201/00—Indexing scheme relating to error detection, to error correction, and to monitoring
    • G06F2201/865—Monitoring of software

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Quality & Reliability (AREA)
  • General Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • Computer Hardware Design (AREA)
  • Mathematical Physics (AREA)
  • Debugging And Monitoring (AREA)

Claims (20)

V 0285450788- CLAIMS:
1. A method, implemented at a computer system that includes at least one processor, for indexing a trace with a diffgram, the method comprising: accessing a replayable trace that records a prior execution of one or more threads of an entity; identifying, within a trace segment recording a prior execution of a sequence of a plurality of instructions of a first thread of the one or more threads, a subset of the sequence of instructions, the subset of instructions beginning with a first instruction and ending with a second instruction; replaying the subset of instructions to obtain state of one or more named resources, the one or more named resources having a first state at the first instruction and a different second state at the second instruction; based on replaying the subset of instructions, generating a diffgram for the subset of instructions, the diffgram comprising one or more reversible mathematical operations on the first state that transform the first state into the second state, such that addition of the diffgram at the first instruction by applying the one or more reversible mathematical operations to the first state brings the one or more named resources to the second state, and subtraction of the diffgram at the second instruction by applying a reversal of the one or more reversible mathematical operations to the second state brings the one or more named resources to the first state; and storing the diffgram in connection with the trace.
2. The method of claim 1, storing the diffgram in connection with the trace comprising at least one of (i) storing the diffgram into durable storage associated with the trace, or (ii) storing the diffgram into volatile memory associated with replay of the trace. V 0285450788-
3. The method of claim 1, the diffgram using a key frame as a baseline, addition of the diffgram to the key frame bringing the one or more named resources to the second state, and subtraction of the diffgram at the second instruction bringing the one or more named resources to a state stored in the key frame.
4. The method of claim 3, wherein the state stored in the key frame comprises the first state.
5. The method of claim 4, wherein the key frame is associated with the trace segment.
6. The method of claim 1, wherein the second state includes a state change made by a second thread of the plurality of threads after the first instruction.
7. The method of claim 1, wherein the second state omits a state change made by a second thread of the plurality of threads after the first instruction.
8. The method of claim 1, the subset of instructions comprising a first subset of instructions, and the diffgram comprising a first diffgram, the method further comprising: identifying, within the trace segment, second a subset of the sequence of instructions, the second subset of instructions beginning with a third instruction and ending with a fourth instruction replaying the second subset of the sequence of instructions to obtain state of the one or more named resources, the one or more named resources having a third state at the third instruction and a different fourth state at the fourth instruction; and based on replaying the second subset of instructions, generating a second diffgram for the second subset of instructions, the second diffgram being structured such that addition of the diffgram at the third instruction brings the one or more named resources to the fourth state, and subtraction of the diffgram at the fourth instruction brings the one or more named resources to the third state. V 0285450788-
9. The method of claim 8, the second diffgram using a key frame as a baseline, subtraction of the second diffgram at the fourth instruction bringing the one or more named resources to a state stored in the key frame.
10. The method of claim 8, the second diffgram using the first diffgram as a baseline, and subtraction of the second diffgram at the fourth instruction bringing the one or more named resources to the third state.
11. The method of claim 8, addition of the first and second diffgrams at the first instruction bringing the one or more named resources to the fourth state, and subtraction of the first and second diffgrams at the fourth instruction bringing the one or more named resources to the first state. 12 . A method, implemented at a computer system that includes at least one processor, for utilizing a diffgram to replay a trace, the method comprising: accessing a replayable trace that records a prior execution of one or more threads of an entity; identifying, within the replayable trace, a particular instruction within a trace segment recording a prior execution of a sequence of a plurality of instructions of a first thread of the one or more threads, the plurality of instructions including the particular instruction; identifying a set of one or more diffgrams for restoring a first state of one or more named resources that is needed for emulating the prior execution of the particular instruction; and , the set of one or more diffgrams comprising one or more reversible mathematical operations on the first state that transform the first state into a second state, such that addition of the diffgram by applying the one or more reversible mathematical operations to the first state brings the one or more named resources to the second state, and subtraction of the diffgram by applying a reversal of the one or more reversible mathematical operations to the second state brings the one or more named resources to the first state;
12. V 0285450788- applying the set of one or more diffgrams to restore the first state of the one or more named resources; and after applying the set of one or more diffgrams, emulating the prior execution of the particular instruction based on the restored first state of the one or more named resources.
13. The method of claim 12 , applying the set of one or more diffgrams to restore the first state of the one or more named resources comprising adding the set of one or more diffgrams to a state of the one or more named resources that is obtained from a key frame associated with the trace segment, or within another trace segment.
14. The method of claim 12 , applying the set of one or more diffgrams to restore the first state of the one or more named resources comprising adding the set of one or more diffgrams to a state of the one or more named resources that is obtained from another diffgram that restores state to an instruction that is at, or prior to, the particular instruction in the sequence of instructions.
15. The method of claim 12 , applying the set of one or more diffgrams to restore the first state of the one or more named resources comprising subtracting the set of one or more diffgrams from a state of the one or more named resources at an instruction that is subsequent to the particular instruction in the sequence of instructions.
16. The method of claim 12 , applying the set of one or more diffgrams to restore the first state of the one or more named resources comprising adding a plurality of diffgrams to a restored prior state of the one or more named resources, or subtracting the plurality of diffgrams from the restored prior state of the one or more named resources. V 0285450788-
17. The method of claim 12 , at least one diffgram being obtained from the trace, or from having previously replayed the trace segment.
18. The method of claim 12 , further comprising identifying, from the set of one or more diffgrams, one or more named resources that were modified by instructions covered by the set of one or more diffgrams.
19. The method of claim 12 , wherein applying the set of one or more diffgrams to restore the first state of the one or more named resources comprises restoring the first state of the one or more named resources without emulating any instructions.
20. A computer system comprising: a processor; and a computer-readable medium having stored thereon computer-executable instructions that are executable by the processor to cause the computer system to generate and utilize diffgrams during trace replay, the computer-executable instructions including instructions that are executable by the processor to cause the computer system to at least: access a replayable trace that records a prior execution of an entity; identify, within a trace segment recording a prior execution of a sequence of a plurality of instructions of the entity, a subset of the sequence of instructions, the subset of instructions beginning with a first instruction and ending with a second instruction; replay the subset of instructions to obtain state of one or more named resources, the one or more named resources having a first state at the first instruction and a different second state at the second instruction; based on replaying the subset of instructions, generate a diffgram for the subset of instructions, the diffgram comprising one or more reversible mathematical operations on the first state that transform the first state into the second state, such that addition of the diffgram at the first instruction by V 0285450788- applying the one or more reversible mathematical operations to the first state brings the one or more named resources to the second state, and subtraction of the diffgram at the second instruction by applying a reversal of the one or more reversible mathematical operations to the second state brings the one or more named resources to the first state; subsequent to generating the diffgram, identify, within the replayable trace, a particular instruction within the subset of instructions that is to be replayed; identify the generated diffgram for reaching the particular instruction; apply the diffgram at the second instruction to restore the first state of the one or more named resources; and after applying the diffgram at the second instruction, replay the subset of instructions, including replaying the particular instruction based on the restored first state of the one or more named resources.
IL291230A 2019-09-17 2020-06-17 Indexing and replaying time travel traces using diphthongs IL291230B2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US16/573,734 US11163665B2 (en) 2019-09-17 2019-09-17 Indexing and replaying time-travel traces using diffgrams
PCT/US2020/038252 WO2021055040A1 (en) 2019-09-17 2020-06-17 Indexing and replaying time-travel traces using diffgrams

Publications (3)

Publication Number Publication Date
IL291230A IL291230A (en) 2022-05-01
IL291230B1 true IL291230B1 (en) 2025-07-01
IL291230B2 IL291230B2 (en) 2025-11-01

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
IL291230A IL291230B2 (en) 2019-09-17 2020-06-17 Indexing and replaying time travel traces using diphthongs

Country Status (13)

Country Link
US (1) US11163665B2 (en)
EP (1) EP4031972B1 (en)
JP (1) JP7506736B2 (en)
KR (1) KR102947792B1 (en)
CN (1) CN114424171B (en)
AU (1) AU2020348574B2 (en)
BR (1) BR112022001753A2 (en)
CA (1) CA3150188A1 (en)
IL (1) IL291230B2 (en)
MX (1) MX2022003155A (en)
PH (1) PH12022550660A1 (en)
WO (1) WO2021055040A1 (en)
ZA (1) ZA202201949B (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9959194B1 (en) * 2017-03-08 2018-05-01 Microsoft Technology Licensing, Llc Indexing a trace by insertion of memory snapshots for replay responsiveness

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JP3192354B2 (en) * 1995-09-11 2001-07-23 株式会社日立製作所 Computer system retry processor
US5870607A (en) * 1996-09-11 1999-02-09 Brown University Research Foundation Method and apparatus for selective replay of computer programs
US7035866B1 (en) * 2001-10-09 2006-04-25 Microsoft Corporation System and method providing diffgram format
US9183116B1 (en) * 2014-04-23 2015-11-10 Microsoft Technology Licensing, Llc Call chain interval resource impact aggregation differencing
US9965376B1 (en) * 2017-01-06 2018-05-08 Microsoft Technology Licensing, Llc Speculative replay of executable code
US9934126B1 (en) * 2017-03-08 2018-04-03 Microsoft Technology Licensing, Llc Indexing a trace by insertion of reverse lookup data structures
US10185645B2 (en) * 2017-03-08 2019-01-22 Microsoft Technology Licensing, Llc Resource lifetime analysis using a time-travel trace
US9940369B1 (en) 2017-03-08 2018-04-10 Microsoft Technology Licensing, Llc Searching an indexed time-travel trace
US20210064512A1 (en) * 2019-08-27 2021-03-04 Veego Software Ltd. Selective memory tracing of program execution

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9959194B1 (en) * 2017-03-08 2018-05-01 Microsoft Technology Licensing, Llc Indexing a trace by insertion of memory snapshots for replay responsiveness

Also Published As

Publication number Publication date
AU2020348574A1 (en) 2022-03-10
US11163665B2 (en) 2021-11-02
MX2022003155A (en) 2022-04-11
JP7506736B2 (en) 2024-06-26
ZA202201949B (en) 2023-04-26
EP4031972B1 (en) 2026-02-25
KR20220059498A (en) 2022-05-10
EP4031972A1 (en) 2022-07-27
AU2020348574B2 (en) 2026-03-12
US20210081299A1 (en) 2021-03-18
CN114424171B (en) 2026-04-07
IL291230A (en) 2022-05-01
KR102947792B1 (en) 2026-04-02
PH12022550660A1 (en) 2023-03-27
WO2021055040A1 (en) 2021-03-25
CN114424171A (en) 2022-04-29
IL291230B2 (en) 2025-11-01
BR112022001753A2 (en) 2022-06-07
CA3150188A1 (en) 2021-03-25
JP2022548475A (en) 2022-11-21

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