HU186323B - Multimicroprocesszor system - Google Patents
Multimicroprocesszor system Download PDFInfo
- Publication number
- HU186323B HU186323B HU831408A HU140883A HU186323B HU 186323 B HU186323 B HU 186323B HU 831408 A HU831408 A HU 831408A HU 140883 A HU140883 A HU 140883A HU 186323 B HU186323 B HU 186323B
- Authority
- HU
- Hungary
- Prior art keywords
- microprocessor
- circuit
- output
- multimicroprocessor
- register
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
- G06F15/163—Interprocessor communication
- G06F15/173—Interprocessor communication using an interconnection network, e.g. matrix, shuffle, pyramid, star, snowflake
- G06F15/17337—Direct connection machines, e.g. completely connected computers, point to point communication networks
- G06F15/17343—Direct connection machines, e.g. completely connected computers, point to point communication networks wherein the interconnection is dynamically configurable, e.g. having loosely coupled nearest neighbor architecture
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F15/00—Digital computers in general; Data processing equipment in general
- G06F15/76—Architectures of general purpose stored program computers
- G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
- G06F15/8007—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors single instruction multiple data [SIMD] multiprocessors
- G06F15/8015—One dimensional arrays, e.g. rings, linear arrays, buses
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30076—Arrangements for executing specific machine instructions to perform miscellaneous control operations, e.g. NOP
- G06F9/30079—Pipeline control instructions, e.g. multicycle NOP
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
- G06F9/3887—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled by a single instruction for multiple data lanes [SIMD]
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
- G06F9/3889—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled by multiple instructions, e.g. MIMD, decoupled access or execute
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Software Systems (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- Mathematical Physics (AREA)
- Multi Processors (AREA)
- Advance Control (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| BG8256357A BG35575A1 (en) | 1982-04-26 | 1982-04-26 | Multimicroprocessor system |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| HU186323B true HU186323B (en) | 1985-07-29 |
Family
ID=3910644
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| HU831408A HU186323B (en) | 1982-04-26 | 1983-04-22 | Multimicroprocesszor system |
Country Status (11)
| Country | Link |
|---|---|
| US (1) | US4591981A (en, 2012) |
| JP (1) | JPS5917657A (en, 2012) |
| BG (1) | BG35575A1 (en, 2012) |
| DE (1) | DE3314917A1 (en, 2012) |
| DK (1) | DK178983A (en, 2012) |
| FR (1) | FR2525787A1 (en, 2012) |
| GB (1) | GB2122781B (en, 2012) |
| HU (1) | HU186323B (en, 2012) |
| IN (1) | IN157908B (en, 2012) |
| NL (1) | NL8301477A (en, 2012) |
| SU (1) | SU1420601A1 (en, 2012) |
Families Citing this family (36)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB2140943A (en) * | 1983-06-03 | 1984-12-05 | Burke Cole Pullman | Improvements relating to computers |
| JPS60101644A (ja) * | 1983-11-07 | 1985-06-05 | Masahiro Sowa | ノイマン型コンピュータプログラムを実行するコントロールフローコンピュータ |
| US4855903A (en) * | 1984-12-20 | 1989-08-08 | State University Of New York | Topologically-distributed-memory multiprocessor computer |
| JPH07104837B2 (ja) * | 1987-11-25 | 1995-11-13 | 富士通株式会社 | プロセッサの制御方法 |
| US5228127A (en) * | 1985-06-24 | 1993-07-13 | Fujitsu Limited | Clustered multiprocessor system with global controller connected to each cluster memory control unit for directing order from processor to different cluster processors |
| US4827403A (en) * | 1986-11-24 | 1989-05-02 | Thinking Machines Corporation | Virtual processor techniques in a SIMD multiprocessor array |
| JPH0787461B2 (ja) * | 1987-06-19 | 1995-09-20 | 株式会社東芝 | ロ−カルエリアネツトワ−クシステム |
| AU1993088A (en) * | 1987-06-19 | 1989-01-19 | Human Devices, Inc. | Multiply-installable, multi-processor board for personal computer and workstation expansion buses |
| FR2626091B1 (fr) * | 1988-01-15 | 1994-05-06 | Thomson Csf | Calculateur de grande puissance et dispositif de calcul comportant une pluralite de calculateurs |
| JPH01303543A (ja) * | 1988-05-31 | 1989-12-07 | Fujitsu Ltd | メモリアクセス制御装置 |
| US5111423A (en) * | 1988-07-21 | 1992-05-05 | Altera Corporation | Programmable interface for computer system peripheral circuit card |
| US5136717A (en) * | 1988-11-23 | 1992-08-04 | Flavors Technology Inc. | Realtime systolic, multiple-instruction, single-data parallel computer system |
| DE69032680T2 (de) * | 1989-01-06 | 1999-06-02 | Hitachi, Ltd., Tokio/Tokyo | Neuronaler Rechner |
| US5218709A (en) * | 1989-12-28 | 1993-06-08 | The United States Of America As Represented By The Administrator Of The National Aeronautics And Space Administration | Special purpose parallel computer architecture for real-time control and simulation in robotic applications |
| JPH05506113A (ja) * | 1990-01-05 | 1993-09-02 | マスパー・コンピューター・コーポレイション | 並列プロセッサメモリシステム |
| JPH07122866B1 (en, 2012) * | 1990-05-07 | 1995-12-25 | Mitsubishi Electric Corp | |
| US5355508A (en) * | 1990-05-07 | 1994-10-11 | Mitsubishi Denki Kabushiki Kaisha | Parallel data processing system combining a SIMD unit with a MIMD unit and sharing a common bus, memory, and system controller |
| EP0485594A4 (en) * | 1990-05-30 | 1995-02-01 | Adaptive Solutions Inc | Mechanism providing concurrent computational/communications in simd architecture |
| DE69131440T2 (de) * | 1990-08-20 | 2000-02-03 | Kabushiki Kaisha Toshiba, Kawasaki | Verbindungszustandsbestätigungssystem und -methode für eine Expansionseinheit |
| EP0485690B1 (en) * | 1990-11-13 | 1999-05-26 | International Business Machines Corporation | Parallel associative processor system |
| US5175858A (en) * | 1991-03-04 | 1992-12-29 | Adaptive Solutions, Inc. | Mechanism providing concurrent computational/communications in SIMD architecture |
| US5361367A (en) * | 1991-06-10 | 1994-11-01 | The United States Of America As Represented By The Administrator Of The National Aeronautics And Space Administration | Highly parallel reconfigurable computer architecture for robotic computation having plural processor cells each having right and left ensembles of plural processors |
| AU2939892A (en) | 1991-12-06 | 1993-06-28 | Richard S. Norman | Massively-parallel direct output processor array |
| CA2078912A1 (en) * | 1992-01-07 | 1993-07-08 | Robert Edward Cypher | Hierarchical interconnection networks for parallel processing |
| JP3290798B2 (ja) * | 1994-03-14 | 2002-06-10 | 富士通株式会社 | 並列コンピュータ |
| EP0752132B1 (en) * | 1994-03-22 | 2000-11-15 | Hyperchip Inc. | Cell-based defect tolerant architecture with beneficial use of unassigned spare cells |
| US6408402B1 (en) | 1994-03-22 | 2002-06-18 | Hyperchip Inc. | Efficient direct replacement cell fault tolerant architecture |
| JPH08249254A (ja) * | 1995-03-15 | 1996-09-27 | Mitsubishi Electric Corp | マルチコンピュータシステム |
| US5630161A (en) * | 1995-04-24 | 1997-05-13 | Martin Marietta Corp. | Serial-parallel digital signal processor |
| US5649179A (en) * | 1995-05-19 | 1997-07-15 | Motorola, Inc. | Dynamic instruction allocation for a SIMD processor |
| JPH09190423A (ja) | 1995-11-08 | 1997-07-22 | Nkk Corp | 情報処理単位、情報処理構造単位及び情報処理構造体並びにメモリ構造単位及び半導体記憶装置 |
| US5903771A (en) * | 1996-01-16 | 1999-05-11 | Alacron, Inc. | Scalable multi-processor architecture for SIMD and MIMD operations |
| US6079008A (en) * | 1998-04-03 | 2000-06-20 | Patton Electronics Co. | Multiple thread multiple data predictive coded parallel processing system and method |
| GB2399190B (en) * | 2003-03-07 | 2005-11-16 | * Zarlink Semiconductor Limited | Parallel processing architecture |
| US20040255096A1 (en) * | 2003-06-11 | 2004-12-16 | Norman Richard S. | Method for continuous linear production of integrated circuits |
| US8755515B1 (en) | 2008-09-29 | 2014-06-17 | Wai Wu | Parallel signal processing system and method |
Family Cites Families (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3308436A (en) * | 1963-08-05 | 1967-03-07 | Westinghouse Electric Corp | Parallel computer system control |
| US3753234A (en) * | 1972-02-25 | 1973-08-14 | Reliance Electric Co | Multicomputer system with simultaneous data interchange between computers |
| GB1481393A (en) * | 1974-02-28 | 1977-07-27 | Burroughs Corp | Information processing systems |
| US4149242A (en) * | 1977-05-06 | 1979-04-10 | Bell Telephone Laboratories, Incorporated | Data interface apparatus for multiple sequential processors |
| US4247892A (en) * | 1978-10-12 | 1981-01-27 | Lawrence Patrick N | Arrays of machines such as computers |
| DE2920994A1 (de) * | 1979-05-23 | 1980-11-27 | Siemens Ag | Datensende/-empfangseinrichtung mit parallel/seriell- und seriell/parallel- zeichenumsetzung, insbesondere zum datenaustausch zwischen kommunizierenden datenverarbeitungsanlagen |
| US4344134A (en) * | 1980-06-30 | 1982-08-10 | Burroughs Corporation | Partitionable parallel processor |
| US4412285A (en) * | 1981-04-01 | 1983-10-25 | Teradata Corporation | Multiprocessor intercommunication system and method |
-
1982
- 1982-04-26 BG BG8256357A patent/BG35575A1/xx unknown
-
1983
- 1983-04-21 IN IN466/CAL/83A patent/IN157908B/en unknown
- 1983-04-22 DK DK178983A patent/DK178983A/da not_active Application Discontinuation
- 1983-04-22 HU HU831408A patent/HU186323B/hu unknown
- 1983-04-25 DE DE19833314917 patent/DE3314917A1/de not_active Withdrawn
- 1983-04-25 FR FR8306768A patent/FR2525787A1/fr active Granted
- 1983-04-26 JP JP58072291A patent/JPS5917657A/ja active Pending
- 1983-04-26 SU SU837772960A patent/SU1420601A1/ru active
- 1983-04-26 GB GB08311311A patent/GB2122781B/en not_active Expired
- 1983-04-26 US US06/488,701 patent/US4591981A/en not_active Expired - Fee Related
- 1983-04-26 NL NL8301477A patent/NL8301477A/nl not_active Application Discontinuation
Also Published As
| Publication number | Publication date |
|---|---|
| DK178983A (da) | 1983-10-27 |
| DK178983D0 (da) | 1983-04-22 |
| NL8301477A (nl) | 1983-11-16 |
| GB2122781A (en) | 1984-01-18 |
| FR2525787A1 (fr) | 1983-10-28 |
| GB2122781B (en) | 1985-08-07 |
| JPS5917657A (ja) | 1984-01-28 |
| IN157908B (en, 2012) | 1986-07-19 |
| DE3314917A1 (de) | 1983-11-03 |
| BG35575A1 (en) | 1984-05-15 |
| US4591981A (en) | 1986-05-27 |
| SU1420601A1 (ru) | 1988-08-30 |
| GB8311311D0 (en) | 1983-06-02 |
| FR2525787B3 (en, 2012) | 1985-03-01 |
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