GB9626543D0 - Computers - Google Patents

Computers

Info

Publication number
GB9626543D0
GB9626543D0 GBGB9626543.4A GB9626543A GB9626543D0 GB 9626543 D0 GB9626543 D0 GB 9626543D0 GB 9626543 A GB9626543 A GB 9626543A GB 9626543 D0 GB9626543 D0 GB 9626543D0
Authority
GB
United Kingdom
Prior art keywords
computers
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
GBGB9626543.4A
Other versions
GB2308475A (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Memory Corp PLC
Original Assignee
Memory Corp PLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Memory Corp PLC filed Critical Memory Corp PLC
Publication of GB9626543D0 publication Critical patent/GB9626543D0/en
Publication of GB2308475A publication Critical patent/GB2308475A/en
Withdrawn legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/50Marginal testing, e.g. race, voltage or current testing
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 
GB9626543A 1995-12-22 1996-12-20 Delaying reading of memory comprising chips having dissimilar access times to ensure validity of data read Withdrawn GB2308475A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GBGB9526383.6A GB9526383D0 (en) 1995-12-22 1995-12-22 Computers

Publications (2)

Publication Number Publication Date
GB9626543D0 true GB9626543D0 (en) 1997-02-05
GB2308475A GB2308475A (en) 1997-06-25

Family

ID=10785977

Family Applications (2)

Application Number Title Priority Date Filing Date
GBGB9526383.6A Pending GB9526383D0 (en) 1995-12-22 1995-12-22 Computers
GB9626543A Withdrawn GB2308475A (en) 1995-12-22 1996-12-20 Delaying reading of memory comprising chips having dissimilar access times to ensure validity of data read

Family Applications Before (1)

Application Number Title Priority Date Filing Date
GBGB9526383.6A Pending GB9526383D0 (en) 1995-12-22 1995-12-22 Computers

Country Status (1)

Country Link
GB (2) GB9526383D0 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6067606A (en) * 1997-12-15 2000-05-23 Intel Corporation Computer processor with dynamic setting of latency values for memory access

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0212541A (en) * 1988-04-29 1990-01-17 Internatl Business Mach Corp <Ibm> Computing system and operation thereof
US5394541A (en) * 1990-07-17 1995-02-28 Sun Microsystems, Inc. Programmable memory timing method and apparatus for programmably generating generic and then type specific memory timing signals

Also Published As

Publication number Publication date
GB2308475A (en) 1997-06-25
GB9526383D0 (en) 1996-02-21

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Legal Events

Date Code Title Description
WAP Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1)