GB9100673D0 - Dram cell - Google Patents
Dram cellInfo
- Publication number
- GB9100673D0 GB9100673D0 GB919100673A GB9100673A GB9100673D0 GB 9100673 D0 GB9100673 D0 GB 9100673D0 GB 919100673 A GB919100673 A GB 919100673A GB 9100673 A GB9100673 A GB 9100673A GB 9100673 D0 GB9100673 D0 GB 9100673D0
- Authority
- GB
- United Kingdom
- Prior art keywords
- dram cell
- dram
- cell
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
- H10B12/31—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor
- H10B12/318—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor the storage electrode having multiple segments
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
- H01L28/40—Capacitors
- H01L28/60—Electrodes
- H01L28/82—Electrodes with an enlarged surface, e.g. formed by texturisation
- H01L28/86—Electrodes with an enlarged surface, e.g. formed by texturisation having horizontal extensions
- H01L28/87—Electrodes with an enlarged surface, e.g. formed by texturisation having horizontal extensions made by depositing layers, e.g. by depositing alternating conductive and insulating layers
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019900017705A KR920010908A (en) | 1990-11-01 | 1990-11-01 | DRAM cell having improved fin structure and manufacturing method thereof |
Publications (1)
Publication Number | Publication Date |
---|---|
GB9100673D0 true GB9100673D0 (en) | 1991-02-27 |
Family
ID=19305569
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB919100673A Pending GB9100673D0 (en) | 1990-11-01 | 1991-01-11 | Dram cell |
Country Status (5)
Country | Link |
---|---|
JP (1) | JPH079947B2 (en) |
KR (1) | KR920010908A (en) |
DE (1) | DE4101939A1 (en) |
GB (1) | GB9100673D0 (en) |
IT (1) | IT1245099B (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE19842684C1 (en) * | 1998-09-17 | 1999-11-04 | Siemens Ag | Integrated circuit high-permittivity capacitor arranged on support structure in semiconductor arrangement e.g. for DRAM circuit or ADC |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0295709B1 (en) * | 1987-06-17 | 1998-03-11 | Fujitsu Limited | Method of producing a dynamic random access memory device |
-
1990
- 1990-11-01 KR KR1019900017705A patent/KR920010908A/en not_active Application Discontinuation
-
1991
- 1991-01-11 GB GB919100673A patent/GB9100673D0/en active Pending
- 1991-01-21 DE DE4101939A patent/DE4101939A1/en not_active Ceased
- 1991-01-22 IT ITMI910132A patent/IT1245099B/en active IP Right Grant
- 1991-09-04 JP JP3253023A patent/JPH079947B2/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
ITMI910132A1 (en) | 1992-05-02 |
JPH0629479A (en) | 1994-02-04 |
JPH079947B2 (en) | 1995-02-01 |
IT1245099B (en) | 1994-09-13 |
ITMI910132A0 (en) | 1991-01-22 |
KR920010908A (en) | 1992-06-27 |
DE4101939A1 (en) | 1992-05-14 |
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