GB8903960D0 - Load and synchronize computer architecture and process - Google Patents
Load and synchronize computer architecture and processInfo
- Publication number
- GB8903960D0 GB8903960D0 GB898903960A GB8903960A GB8903960D0 GB 8903960 D0 GB8903960 D0 GB 8903960D0 GB 898903960 A GB898903960 A GB 898903960A GB 8903960 A GB8903960 A GB 8903960A GB 8903960 D0 GB8903960 D0 GB 8903960D0
- Authority
- GB
- United Kingdom
- Prior art keywords
- load
- computer architecture
- synchronize computer
- synchronize
- architecture
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/52—Program synchronisation; Mutual exclusion, e.g. by means of semaphores
- G06F9/526—Mutual exclusion algorithms
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/3004—Arrangements for executing specific machine instructions to perform operations on memory
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/3005—Arrangements for executing specific machine instructions to perform operations for flow control
- G06F9/30069—Instruction skipping instructions, e.g. SKIP
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30098—Register arrangements
- G06F9/30101—Special purpose registers
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
- G06F9/3824—Operand accessing
- G06F9/3834—Maintaining memory consistency
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2209/00—Indexing scheme relating to G06F9/00
- G06F2209/52—Indexing scheme relating to G06F9/52
- G06F2209/521—Atomic
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US16199788A | 1988-02-29 | 1988-02-29 |
Publications (2)
Publication Number | Publication Date |
---|---|
GB8903960D0 true GB8903960D0 (en) | 1989-04-05 |
GB2216306A GB2216306A (en) | 1989-10-04 |
Family
ID=22583728
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB8903960A Withdrawn GB2216306A (en) | 1988-02-29 | 1989-02-22 | Load and synchronize computer architecture and process |
Country Status (2)
Country | Link |
---|---|
KR (1) | KR890013552A (en) |
GB (1) | GB2216306A (en) |
Families Citing this family (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04106653A (en) * | 1990-08-28 | 1992-04-08 | Toshiba Corp | Parallel processing system |
US5835906A (en) * | 1996-07-01 | 1998-11-10 | Sun Microsystems, Inc. | Methods and apparatus for sharing stored data objects in a computer system |
US7802079B2 (en) | 1999-04-09 | 2010-09-21 | Clearspeed Technology Limited | Parallel data processing apparatus |
US7506136B2 (en) | 1999-04-09 | 2009-03-17 | Clearspeed Technology Plc | Parallel data processing apparatus |
US7966475B2 (en) | 1999-04-09 | 2011-06-21 | Rambus Inc. | Parallel data processing apparatus |
US8762691B2 (en) | 1999-04-09 | 2014-06-24 | Rambus Inc. | Memory access consolidation for SIMD processing elements using transaction identifiers |
US8171263B2 (en) | 1999-04-09 | 2012-05-01 | Rambus Inc. | Data processing apparatus comprising an array controller for separating an instruction stream processing instructions and data transfer instructions |
US8169440B2 (en) | 1999-04-09 | 2012-05-01 | Rambus Inc. | Parallel data processing apparatus |
US7627736B2 (en) | 1999-04-09 | 2009-12-01 | Clearspeed Technology Plc | Thread manager to control an array of processing elements |
GB2348975A (en) * | 1999-04-09 | 2000-10-18 | Pixelfusion Ltd | Parallel data processing systems |
JP5285828B2 (en) | 1999-04-09 | 2013-09-11 | ラムバス・インコーポレーテッド | Parallel data processor |
US8174530B2 (en) | 1999-04-09 | 2012-05-08 | Rambus Inc. | Parallel date processing apparatus |
US7526630B2 (en) | 1999-04-09 | 2009-04-28 | Clearspeed Technology, Plc | Parallel data processing apparatus |
AU2002247206A1 (en) * | 2001-02-24 | 2002-09-12 | Matthias A. Blumrich | Low latency memoray system access |
FI20020210A (en) | 2002-02-04 | 2003-08-05 | Nokia Corp | Hardware based signal for multiprocessor environment |
US7529895B2 (en) | 2003-08-22 | 2009-05-05 | International Business Machines Corporation | Method for prefetching non-contiguous data structures |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE2456534A1 (en) * | 1973-11-30 | 1975-08-21 | Cii Honeywell Bull | DATA PROCESSING SYSTEM |
GB1548401A (en) * | 1975-10-08 | 1979-07-11 | Plessey Co Ltd | Data processing memory space allocation and deallocation arrangements |
US4925311A (en) * | 1986-02-10 | 1990-05-15 | Teradata Corporation | Dynamically partitionable parallel processors |
-
1989
- 1989-02-22 GB GB8903960A patent/GB2216306A/en not_active Withdrawn
- 1989-02-27 KR KR1019890002326A patent/KR890013552A/en not_active Application Discontinuation
Also Published As
Publication number | Publication date |
---|---|
KR890013552A (en) | 1989-09-23 |
GB2216306A (en) | 1989-10-04 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
SG49819A1 (en) | A computer system and method of operating the system | |
HK76495A (en) | Structural member and process for forming same | |
GB2215871B (en) | Combination wristwatch and bicycle computer | |
SG43720A1 (en) | Three stage self alignment structure and method | |
KR940009098B1 (en) | Processor architecture and method | |
GB2238668B (en) | Improvements in computer cases | |
GB8903960D0 (en) | Load and synchronize computer architecture and process | |
EP0454726A4 (en) | Hindered linking agents and methods | |
EP0380248A3 (en) | Modified polydextrose and process therefor | |
GB8823286D0 (en) | Computer graphics system | |
AU108977S (en) | Personal computer | |
AU106405S (en) | Computer | |
GB2220295B (en) | Superconducting articles | |
GB8825780D0 (en) | Digital computer | |
GB8602964D0 (en) | Computer architecture | |
AU105161S (en) | Computer monitor and stand | |
HU896405D0 (en) | Method and arrangement | |
EP0343386A3 (en) | Method and arrangement to digitize | |
GB8902891D0 (en) | Computer system and method | |
IL85461A0 (en) | Superconductors and their production | |
GB8903231D0 (en) | Computer and video demagnetizers | |
AU106367S (en) | Computer | |
GB2263992B (en) | Noncorruptible read-writer and method | |
HU905915D0 (en) | Oxiditing and desalkyling process | |
AU108034S (en) | Computer |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
732 | Registration of transactions, instruments or events in the register (sect. 32/1977) | ||
WAP | Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1) |