GB8811528D0 - Cmos exclusive oring circuit - Google Patents

Cmos exclusive oring circuit

Info

Publication number
GB8811528D0
GB8811528D0 GB888811528A GB8811528A GB8811528D0 GB 8811528 D0 GB8811528 D0 GB 8811528D0 GB 888811528 A GB888811528 A GB 888811528A GB 8811528 A GB8811528 A GB 8811528A GB 8811528 D0 GB8811528 D0 GB 8811528D0
Authority
GB
United Kingdom
Prior art keywords
exclusive oring
oring circuit
cmos exclusive
cmos
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
GB888811528A
Other versions
GB2207572A (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of GB8811528D0 publication Critical patent/GB8811528D0/en
Publication of GB2207572A publication Critical patent/GB2207572A/en
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/20—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits characterised by logic function, e.g. AND, OR, NOR, NOT circuits
    • H03K19/21—EXCLUSIVE-OR circuits, i.e. giving output if input signal exists at only one input; COINCIDENCE circuits, i.e. giving output only if all input signals are identical
    • H03K19/215—EXCLUSIVE-OR circuits, i.e. giving output if input signal exists at only one input; COINCIDENCE circuits, i.e. giving output only if all input signals are identical using field-effect transistors
GB08811528A 1987-07-29 1988-05-16 CMOS exclusive ORing circuit Withdrawn GB2207572A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US7897687A 1987-07-29 1987-07-29

Publications (2)

Publication Number Publication Date
GB8811528D0 true GB8811528D0 (en) 1988-06-22
GB2207572A GB2207572A (en) 1989-02-01

Family

ID=22147346

Family Applications (1)

Application Number Title Priority Date Filing Date
GB08811528A Withdrawn GB2207572A (en) 1987-07-29 1988-05-16 CMOS exclusive ORing circuit

Country Status (4)

Country Link
JP (1) JPS6449423A (en)
DE (1) DE3824504A1 (en)
FR (1) FR2618962A1 (en)
GB (1) GB2207572A (en)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AT398870B (en) * 1991-05-28 1995-02-27 Austria Mikrosysteme Int INTEGRATED CIRCUIT ARRANGEMENT WITH JUNCTION, MOS AND BIPOLAR TRANSISTORS
KR970009612B1 (en) * 1993-01-25 1997-06-14 마쯔시다 덴기 산교 가부시끼가이샤 Manufacturing method of semiconductor device
JPH07142995A (en) * 1993-06-04 1995-06-02 Xilinx Inc Small electric current inverter according to request
KR970024601A (en) * 1995-10-27 1997-05-30 김주용 Exclusive OR circuit
KR101353212B1 (en) * 2011-06-14 2014-01-22 한국과학기술원 Inverter and switching circuit having the same

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1252036A (en) * 1968-08-20 1971-11-03
JPS60206222A (en) * 1984-03-29 1985-10-17 Toshiba Corp Exclusive or circuit
US4620117A (en) * 1985-01-04 1986-10-28 Advanced Micro Devices, Inc. Balanced CMOS logic circuits

Also Published As

Publication number Publication date
FR2618962A1 (en) 1989-02-03
DE3824504A1 (en) 1989-02-09
JPS6449423A (en) 1989-02-23
GB2207572A (en) 1989-02-01

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Legal Events

Date Code Title Description
WAP Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1)