GB559218A - Carrier-signal limiting system - Google Patents

Abstract

559,218. Wireless receiving circuits; frequency modulation. HAZELTINE CORPORATION. Aug. 5, 1942, No. 10949. Convention date, Oct. 28, 1941. [Class 40 (v)] A limiter comprises a pair of pushpull connected valves, the output circuits of which are highly selective against all harmonics of the carrier frequency applied to the input circuits, and an impedance included in the common portion of the input circuits for developing a negative selt-bias in accordance with the magnitude of the applied carrier signal, the impedance being chosen so as to give a constant output for carrier values in excess of that required to produce a self-bias to cut-off. Fig. 1 shows a limiter stage 15 connected between the I.F. amplifier 14 and frequency detector 16 of a frequency modulation receiver, and comprising a pair of push-pull connected pentodes 19, 20 having sharp anode current cut-off. The input circuit comprises the two halves of secondary 21 tuned to the mid-frequency by a condenser 23, the necessary band width being provided by resistances 24. A correspondingly tuned output circuit 28, 30, 31, 32, feeds the detector 16. A resistance 25 in the common part of the input circuits together with the inherent capacities 26, 26' provide a negative bias due to grid cathode rectification which, above a certain value of the applied carrier, biases the valves beyond cut-off to a degree dependent on carrier strength giving peak rectification. The tuned output circuit selects the fundamental frequency and it is shown by means of graphs that the amplitude is substantially constant over a wide range of input values, and is effective in suppressing transients.