GB2596872B - Handling injected instructions in a processor - Google Patents
Handling injected instructions in a processor Download PDFInfo
- Publication number
- GB2596872B GB2596872B GB2010703.3A GB202010703A GB2596872B GB 2596872 B GB2596872 B GB 2596872B GB 202010703 A GB202010703 A GB 202010703A GB 2596872 B GB2596872 B GB 2596872B
- Authority
- GB
- United Kingdom
- Prior art keywords
- handling
- processor
- injected instructions
- injected
- instructions
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3854—Instruction completion, e.g. retiring, committing or graduating
- G06F9/3856—Reordering of instructions, e.g. using queues or age tags
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30076—Arrangements for executing specific machine instructions to perform miscellaneous control operations, e.g. NOP
- G06F9/30087—Synchronisation or serialisation instructions
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/2205—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
- G06F11/2236—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested to test CPU or processors
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/26—Functional testing
- G06F11/263—Generation of test inputs, e.g. test vectors, patterns or sequences ; with adaptation of the tested hardware for testability with external testers
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/36—Preventing errors by testing or debugging software
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/36—Preventing errors by testing or debugging software
- G06F11/362—Software debugging
- G06F11/3648—Software debugging using additional hardware
- G06F11/3656—Software debugging using additional hardware using a specific debug interface
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
- G06F9/3851—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution from multiple instruction streams, e.g. multistreaming
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3854—Instruction completion, e.g. retiring, committing or graduating
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Software Systems (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Quality & Reliability (AREA)
- Multimedia (AREA)
- Debugging And Monitoring (AREA)
- Advance Control (AREA)
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB2010703.3A GB2596872B (en) | 2020-07-10 | 2020-07-10 | Handling injected instructions in a processor |
US17/336,060 US11635966B2 (en) | 2020-07-10 | 2021-06-01 | Pausing execution of a first machine code instruction with injection of a second machine code instruction in a processor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB2010703.3A GB2596872B (en) | 2020-07-10 | 2020-07-10 | Handling injected instructions in a processor |
Publications (3)
Publication Number | Publication Date |
---|---|
GB202010703D0 GB202010703D0 (en) | 2020-08-26 |
GB2596872A GB2596872A (en) | 2022-01-12 |
GB2596872B true GB2596872B (en) | 2022-12-14 |
Family
ID=72086886
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB2010703.3A Active GB2596872B (en) | 2020-07-10 | 2020-07-10 | Handling injected instructions in a processor |
Country Status (2)
Country | Link |
---|---|
US (1) | US11635966B2 (en) |
GB (1) | GB2596872B (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US11947445B2 (en) * | 2022-02-18 | 2024-04-02 | Mckinsey & Company, Inc. | Adjustment of operating parameters of arranged software assets |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20200065095A1 (en) * | 2018-08-21 | 2020-02-27 | Arm Limited | Control of instruction execution in a data processor |
US20200133680A1 (en) * | 2018-10-26 | 2020-04-30 | Marvell International Ltd. | Managing pipeline instruction insertion for received external instructions |
US20200201652A1 (en) * | 2018-12-21 | 2020-06-25 | Graphcore Limited | Handling exceptions in a multi-tile processing arrangement |
Family Cites Families (27)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5179702A (en) * | 1989-12-29 | 1993-01-12 | Supercomputer Systems Limited Partnership | System and method for controlling a highly parallel multiprocessor using an anarchy based scheduler for parallel execution thread scheduling |
US5872910A (en) * | 1996-12-27 | 1999-02-16 | Unisys Corporation | Parity-error injection system for an instruction processor |
US6076159A (en) * | 1997-09-12 | 2000-06-13 | Siemens Aktiengesellschaft | Execution of a loop instructing in a loop pipeline after detection of a first occurrence of the loop instruction in an integer pipeline |
US6279100B1 (en) * | 1998-12-03 | 2001-08-21 | Sun Microsystems, Inc. | Local stall control method and structure in a microprocessor |
US7320065B2 (en) * | 2001-04-26 | 2008-01-15 | Eleven Engineering Incorporated | Multithread embedded processor with input/output capability |
US7320063B1 (en) * | 2005-02-04 | 2008-01-15 | Sun Microsystems, Inc. | Synchronization primitives for flexible scheduling of functional unit operations |
US7313673B2 (en) * | 2005-06-16 | 2007-12-25 | International Business Machines Corporation | Fine grained multi-thread dispatch block mechanism |
IES20060559A2 (en) * | 2006-02-14 | 2006-11-01 | Fotonation Vision Ltd | Automatic detection and correction of non-red flash eye defects |
US9529596B2 (en) * | 2011-07-01 | 2016-12-27 | Intel Corporation | Method and apparatus for scheduling instructions in a multi-strand out of order processor with instruction synchronization bits and scoreboard bits |
US10078515B2 (en) * | 2011-10-03 | 2018-09-18 | International Business Machines Corporation | Tracking operand liveness information in a computer system and performing function based on the liveness information |
US9886396B2 (en) * | 2014-12-23 | 2018-02-06 | Intel Corporation | Scalable event handling in multi-threaded processor cores |
GB2569844B (en) * | 2017-10-20 | 2021-01-06 | Graphcore Ltd | Sending data off-chip |
GB201717303D0 (en) * | 2017-10-20 | 2017-12-06 | Graphcore Ltd | Scheduling tasks in a multi-threaded processor |
GB2569274B (en) * | 2017-10-20 | 2020-07-15 | Graphcore Ltd | Synchronization amongst processor tiles |
GB2569269B (en) * | 2017-10-20 | 2020-07-15 | Graphcore Ltd | Synchronization in a multi-tile processing arrangement |
GB2569273B (en) * | 2017-10-20 | 2020-01-01 | Graphcore Ltd | Synchronization in a multi-tile processing arrangement |
GB2569271B (en) * | 2017-10-20 | 2020-05-13 | Graphcore Ltd | Synchronization with a host processor |
GB2569098B (en) * | 2017-10-20 | 2020-01-08 | Graphcore Ltd | Combining states of multiple threads in a multi-threaded processor |
US11513839B2 (en) * | 2018-05-07 | 2022-11-29 | Micron Technology, Inc. | Memory request size management in a multi-threaded, self-scheduling processor |
US11513838B2 (en) * | 2018-05-07 | 2022-11-29 | Micron Technology, Inc. | Thread state monitoring in a system having a multi-threaded, self-scheduling processor |
GB2580135B (en) * | 2018-12-21 | 2021-01-20 | Graphcore Ltd | Handling exceptions in a multi-tile processing arrangement |
GB2580314B (en) * | 2018-12-27 | 2021-01-13 | Graphcore Ltd | Exchange of data between processor modules |
US11144417B2 (en) * | 2018-12-31 | 2021-10-12 | Texas Instruments Incorporated | Debug for multi-threaded processing |
GB2580428B (en) * | 2019-01-11 | 2021-08-25 | Graphcore Ltd | Handling exceptions in a machine learning processor |
US11175950B1 (en) * | 2020-05-18 | 2021-11-16 | Amazon Technologies, Inc. | Dynamic regulation of parallelism for job scheduling |
US11966998B2 (en) * | 2020-05-27 | 2024-04-23 | Intel Corporation | Ordering of shader code execution |
US12056029B2 (en) * | 2020-07-27 | 2024-08-06 | Intel Corporation | In-system validation of interconnects by error injection and measurement |
-
2020
- 2020-07-10 GB GB2010703.3A patent/GB2596872B/en active Active
-
2021
- 2021-06-01 US US17/336,060 patent/US11635966B2/en active Active
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20200065095A1 (en) * | 2018-08-21 | 2020-02-27 | Arm Limited | Control of instruction execution in a data processor |
US20200133680A1 (en) * | 2018-10-26 | 2020-04-30 | Marvell International Ltd. | Managing pipeline instruction insertion for received external instructions |
US20200201652A1 (en) * | 2018-12-21 | 2020-06-25 | Graphcore Limited | Handling exceptions in a multi-tile processing arrangement |
Also Published As
Publication number | Publication date |
---|---|
US11635966B2 (en) | 2023-04-25 |
GB202010703D0 (en) | 2020-08-26 |
GB2596872A (en) | 2022-01-12 |
US20220012061A1 (en) | 2022-01-13 |
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