GB2595476B - Exception handling - Google Patents

Exception handling Download PDF

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Publication number
GB2595476B
GB2595476B GB2007912.5A GB202007912A GB2595476B GB 2595476 B GB2595476 B GB 2595476B GB 202007912 A GB202007912 A GB 202007912A GB 2595476 B GB2595476 B GB 2595476B
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GB
United Kingdom
Prior art keywords
exception handling
exception
handling
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
GB2007912.5A
Other versions
GB2595476A (en
GB202007912D0 (en
Inventor
William Hanlon James
Pallister James
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Graphcore Ltd
Original Assignee
Graphcore Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Graphcore Ltd filed Critical Graphcore Ltd
Priority to GB2007912.5A priority Critical patent/GB2595476B/en
Publication of GB202007912D0 publication Critical patent/GB202007912D0/en
Priority to US17/322,598 priority patent/US11403108B2/en
Publication of GB2595476A publication Critical patent/GB2595476A/en
Application granted granted Critical
Publication of GB2595476B publication Critical patent/GB2595476B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3861—Recovery, e.g. branch miss-prediction, exception handling
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0706—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
    • G06F11/0721—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment within a central processing unit [CPU]
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
    • G06F11/0766—Error or fault reporting or storing
    • G06F11/0772—Means for error signaling, e.g. using interrupts, exception flags, dedicated error registers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3824—Operand accessing
    • G06F9/3826—Bypassing or forwarding of data results, e.g. locally between pipeline stages or within a pipeline stage
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3824—Operand accessing
    • G06F9/3826—Bypassing or forwarding of data results, e.g. locally between pipeline stages or within a pipeline stage
    • G06F9/3828—Bypassing or forwarding of data results, e.g. locally between pipeline stages or within a pipeline stage with global bypass, e.g. between pipelines, between clusters
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3824—Operand accessing
    • G06F9/3834—Maintaining memory consistency
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3854—Instruction completion, e.g. retiring, committing or graduating
    • G06F9/3858—Result writeback, i.e. updating the architectural state or memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3861—Recovery, e.g. branch miss-prediction, exception handling
    • G06F9/3865—Recovery, e.g. branch miss-prediction, exception handling using deferred exception handling, e.g. exception flags
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3867—Concurrent instruction execution, e.g. pipeline, look ahead using instruction pipelines
GB2007912.5A 2020-05-27 2020-05-27 Exception handling Active GB2595476B (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
GB2007912.5A GB2595476B (en) 2020-05-27 2020-05-27 Exception handling
US17/322,598 US11403108B2 (en) 2020-05-27 2021-05-17 Exception handling

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB2007912.5A GB2595476B (en) 2020-05-27 2020-05-27 Exception handling

Publications (3)

Publication Number Publication Date
GB202007912D0 GB202007912D0 (en) 2020-07-08
GB2595476A GB2595476A (en) 2021-12-01
GB2595476B true GB2595476B (en) 2022-05-25

Family

ID=71406310

Family Applications (1)

Application Number Title Priority Date Filing Date
GB2007912.5A Active GB2595476B (en) 2020-05-27 2020-05-27 Exception handling

Country Status (2)

Country Link
US (1) US11403108B2 (en)
GB (1) GB2595476B (en)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5109381A (en) * 1988-12-09 1992-04-28 International Computers Limited Apparatus and method for detecting errors in a pipeline data processor
EP1004959A2 (en) * 1998-10-06 2000-05-31 Texas Instruments Incorporated Processor with pipeline protection
US6243786B1 (en) * 1998-12-23 2001-06-05 Industrial Technology Research Institute Apparatus and method for generating an interrupt prohibited zone in pipelined data processors
US20190155328A1 (en) * 2017-10-20 2019-05-23 Graphcore Limited Synchronization in a multi-tile processing array

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6823448B2 (en) * 2000-12-15 2004-11-23 Intel Corporation Exception handling using an exception pipeline in a pipelined processor
US8677103B1 (en) * 2004-10-20 2014-03-18 Marvell Isreal (M.I.S.L) Ltd. Asynchronous pipelined data path with data transition
US7635987B1 (en) * 2004-12-13 2009-12-22 Massachusetts Institute Of Technology Configuring circuitry in a parallel processing environment
US7865769B2 (en) 2007-06-27 2011-01-04 International Business Machines Corporation In situ register state error recovery and restart mechanism

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5109381A (en) * 1988-12-09 1992-04-28 International Computers Limited Apparatus and method for detecting errors in a pipeline data processor
EP1004959A2 (en) * 1998-10-06 2000-05-31 Texas Instruments Incorporated Processor with pipeline protection
US6243786B1 (en) * 1998-12-23 2001-06-05 Industrial Technology Research Institute Apparatus and method for generating an interrupt prohibited zone in pipelined data processors
US20190155328A1 (en) * 2017-10-20 2019-05-23 Graphcore Limited Synchronization in a multi-tile processing array

Also Published As

Publication number Publication date
GB2595476A (en) 2021-12-01
US11403108B2 (en) 2022-08-02
US20210373900A1 (en) 2021-12-02
GB202007912D0 (en) 2020-07-08

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