GB2555601A - Data flow control - Google Patents

Data flow control Download PDF

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Publication number
GB2555601A
GB2555601A GB1618509.2A GB201618509A GB2555601A GB 2555601 A GB2555601 A GB 2555601A GB 201618509 A GB201618509 A GB 201618509A GB 2555601 A GB2555601 A GB 2555601A
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United Kingdom
Prior art keywords
line
logic state
transmitting
data
transmitting line
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GB1618509.2A
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GB201618509D0 (en
Inventor
Rumball David
Slater Chris
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Roli Ltd
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ROLI Ltd
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Priority to GB1618509.2A priority Critical patent/GB2555601A/en
Publication of GB201618509D0 publication Critical patent/GB201618509D0/en
Publication of GB2555601A publication Critical patent/GB2555601A/en
Application status is Pending legal-status Critical

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    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/42Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
    • G06F13/4295Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus using an embedded synchronisation
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/42Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
    • G06F13/4286Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus using a handshaking protocol, e.g. RS232C link

Abstract

A serial interface between two devices, such as integrated circuits, has two lines. The first device transmits on the first line and receives on the second line. The second device receives on the first line and transmits on the second line. The lines operate at two logic states. The first logic state may be a low state and the second may be a high state. When the first device has data to transmit, it changes the state of its transmit line from the first state to the second state. When it detects a change on its receive line from the first state to the second state, it transmits data on its transmit line. When it has finished transmitting, it changes its transmit line to the first state. It then waits for its receive line to change to the first state. The devices may have several ports connected to a single universal asynchronous transmitter/receiver via a multiplexor.

Description

Data flow control

Field

This disclosure relates to data communications. More specifically, but not exclusively, this disclosure relates to the management of data communications using flow control between a transmitter and a receiver which transfer data in an efficient manner that simplifies the communication interface.

Background

In standards for serial data communication like TTL (transistor-transistor logic) or RS-232, flow control of data is essential to coordinate a data transmission between a transmitting device, also referred to as a Data Terminal Equipment (DTE), and a receiving device, referred to as a Data Communication Equipment (DCE). It is generally controlled by a microcontroller managing the communication interface of the devices.

In the existing RS-232, four pins and corresponding lines are needed in the communication interface to control the transmission and reception of data: - two data transmission pins, comprising a transmitting pin or Tx for transmitting data from the DTE to the DCE, and a receiving pin to receive data when the DTE becomes a receiving device. A transmitting pin on a first device will always be connected to a receiving pin on a second device, - two signaling pins for controlling the data flow. A first Request to Send pin, or RTS pin on the DTE is provided to signal an upcoming transmission of data to the DCE, while a second Clear to Send pin, or CTS pin, is provided on the DCE to confirm that the data transmission may be carried on. Each device in a data communication will have both RTS and CTS pins, connected respectively to a CTS and RTS pin on the opposite device.

These pins can change logic states by either being at a high or low logic states, associated to different voltage levels. The logic states are also referred as “0” and “1” in data transmissions. By changing logic states, signaling as well as data transmission can be achieved. This is illustrated in Figure 7 showing the RTS and CTS signals changing level as data, shown through the Tx signal variations, is transmitted. This hardware implementation requires nevertheless four pins for each communication interface of a device, which has consequences on the integrated circuit layout carrying the microcontroller or other components involved in the flow control.

An alternative approach to reduce the number of pins consists in a software flow control, relying upon the Rx and Tx lines only. To replace the RTS and CTS roles, software flow control uses the Tx and Rx signals to send specific control characters named XOFF and XON. XON is used to start a data transmission while XOFF is used to stop it.

If the number of pins is reduced with software flow control, this approach still requires further programming of the microcontroller and the XON and XOFF characters can make the transmission less reliable than the hardware approach to flow control.

It would therefore be a substantial improvement over known systems to provide a new flow control technique which overcomes some or all of the above disadvantages.

Summary

An integrated circuit arrangement for hardware flow control of data transmission is disclosed. The integrated circuit arrangement comprises a first transmitting line and a first receiving line, wherein both lines being operable between a high and a low logic state, the first transmitting line resting at a first one of the logic state. The integrated circuit arrangement further comprises a UART (Universal Asynchronous Receiver/Transmitter) for transmitting data over the first transmitting line and a microcontroller providing data to transmit over the first transmitting line via the UART. The microcontroller is configured to, when data is ready to be transmitted over the first transmitting line: - control the first transmitting line to change its logic state from the first one to the second one of the logic states, - when detecting a receiving line from another integrated circuit arrangement connected with the first transmitting line changing its logic state to the second logic state in response, control the UART to transmit the data through the first transmitting line.

Thanks to the present integrated circuit arrangement, a hardware flow control is proposed. The hardware flow control operates with a reduced number of pins by transferring the signaling pins RTS and CTS functions to the data transmission pins Tx and Rx. The reliability of a hardware control is kept while using the compact layout of a software flow control. The present hardware flow control relies upon the observation that the Rx line of the DCE will follow the logic state of the Tx line of the DTE when available for receiving data, as detailed here after.

The present integrated circuit arrangement further teaches a method for controlling the flow of data transmission using a microcontroller in said integrated circuit arrangement that comprises a first transmitting line and a first receiving line, wherein both lines are operable between a high and a low logic state, the first transmitting line resting at a first one of the logic state, the integrated circuit arrangement further comprising a UART for transmitting data over the first transmitting line, the method being carried out by the microcontroller and comprising, when data is ready to be transmitted over the first line: controlling the first transmitting line to change its logic state from the first one to the second one of the logic states, - when detecting a receiving line from another integrated circuit arrangement connected with the first transmitting line changing its logic state to the second logic state in response, controlling the UART to transmit the data through the first transmitting line.

The present integrated circuit arrangement further discloses a microcontroller for providing data to be transmitted over a first transmitting line, the first transmission line being operable between a high and a low logic state, the first transmitting line resting at a first one of the logic state, wherein the microcontroller is configured to, when data is ready to be transmitted over the first transmitting line: - control the first transmitting line to change its logic state from the first one to the second one of the logic states, - when detecting a receiving line from another integrated circuit arrangement connected with the first transmitting line changing its logic state to the second logic state, control a Universal Asynchronous Receiver/Transmitter (UART) on the integrated circuit arrangement to transmit the data through the first transmitting line.

Brief Description of the Drawings

Exemplary arrangements of the disclosure shall now be described with reference to the drawings in which:

Figure 1 is a perspective view of an electronic touchpad device;

Figure 2 illustrates components of the electronic touchpad device of figure 1;

Figure 3 is a perspective view of an electrical connector of the electronic touchpad device of figure 1;

Figure 4 is schematic illustration of an integrated circuit arrangement according to the present system, showing six transmitting lines served by a microcontroller;

Figure 5 is a state diagram illustrating an arrangement of the present flow control as seen from the transmitting device and the receiving device;

Figure 6.1 is a diagram showing the logic states of the Tx and Rx lines of a transmitting device prior, during and after transmission;

Figure 6.2 is a diagram showing the logic state of the Tx line of a transmitting device and the response of the Rx line of a receiving device when presence of a receiving device is tested; and,

Figure 7 illustrates a prior art system.

Throughout the description and the drawings, like reference numerals refer to like parts. Specific Description

In the present disclosure, data communications are exchanged using an electrical connector provided as part of an exemplary electronic touchpad device for creating music electronically. Other electronic devices besides a touchpad device for creating music will benefit from the proposed hardware flow control to enable data transmission. The electrical connector presents a reduced number of contact pins (pins in short) for transmitting data, thanks to the present hardware flow control. The present connector will be illustrated as a genderless connector which can mate with a similar connector. This is for illustration purpose and other arrangements may benefit from the present hardware layout so as to require only two pins for communicating data while ensuring reliable data flow control.

When two touchpad devices are connected through a pair of mating connectors into a mating position, an inter-touchpad communication is enabled. To do so, the electrical connector of a first touchpad is arranged such that this first touchpad device can connect to one or more other devices with the same electrical connector in a “genderless” manner. That is, rather than a male-female connector arrangement which connects one type of connector to a second type, i.e. a first “gender” to a second “gender”, the electrical connector of the present disclosure has only one type and is therefore described as “genderless”. In contrast to a conventional pin-and-socket relationship, the electrical connector can connect to any other similar connector.

The genderless characteristic of the electrical connector may be particularly suited in a system of devices for creating music electronically. An example of a first device for creating music electronically is a touchpad device, which has an array of pressure sensors underneath a silicone layer forming the touchpad. When a user exerts a force at a certain location on the touchpad, the silicone layer transmits this force to the underlying sensors which record the pressure values at each sensor in the form of electronic signals. The touchpad device is connected to a computer and transmits the signals to the computer which operates software to interpret the electronic signals into audio signals. The audio signals will have different characteristics of pitch, tone, volume, timbre etc. depending on the particular electronic signals produced by the user’s input and the settings of the software. In this way, the user has the ability to produce an expansive range of sounds and coordinate these sounds to create musical expressions.

The possibilities for controlling how music is created are increased further by using further devices to add functionality. For example a second touchpad device may be used in collaboration with the first touchpad device, or a device of a different kind can be used such as a device with a number of conventional user input buttons. A second device can be used to modify the functionality of the first device and the way in which the two devices are arranged with respect to each other may affect the characteristics of the music produced. A user can therefore rearrange the positioning and orientation of the devices in the middle of recording or performing music to create new effects. The genderless connector of the present disclosure enables this by providing a secure way to disconnect and reconnect two or more devices. The feature that the connector is genderless means that the devices can connect with each other by any individual connector of the first device connecting to any individual connector of the second device. This enhances both the ease of use by the user and also increases the number of functions that devices can produce.

The connectors also transmit the signal from one device to another connecting device and vice versa. The devices can therefore be built up in a complex network and the signals produced by each device communicated across the network. The connectors also transmit power between devices. These connector features increase the versatility of the devices as not all of the devices need to be individually connected to an external power source, or connected to the computer which processes the signals produced by the devices. Instead, if a device is connected via one of the disclosed connectors to the network of devices, the signals and power can be passed to and from the rest of the network.

Furthermore, the present hardware flow control, as limited to two pins for control and signaling of data, enables a reliable data transmission while limiting the need for communication lines and further hardware components on the integrated circuit.

Once mated, two touchpad devices can exchange data through their respective communication interfaces comprising the present connector. In existing RS232 protocol, as explained previously, four communication pins would be needed to exchange data, with: - two pins to exchange data, a receiving pin Rx and a transmitting pin Tx, - two control pins to control the flow of data, a RTS (Request to Send) pin and a CTS pin (Clear to Send).

By proposing a hardware flow control that moves the RTS and CTS signaling onto the Tx and Rx lines respectively, the present pin arrangement and functionality reduce what normally would be four communication lines and corresponding pins to only two.

Another advantage of the present hardware flow control is the reduction in power consumption, by maintaining for instance the communication lines in a low logic state (low voltage) when not in communication.

Overview of a device for creating music A specific structure of an electronic touchpad device for creating music, which includes genderless electrical connectors and the present hardware flow control is discussed below in detail with reference to Figures 1 and 2.

Figure 1 illustrates an electronic touchpad device 100 which includes electrical connectors with a reduced number of contact pins thanks to the present flow control solution. The touchpad device 100 receives user input in the form of pressure input by a user on an upper surface of the touchpad and produces a signal which can be used to create music.

The touchpad device 100 comprises a casing 110 and a user interface surface 120 separated by a deformable layer 125. Underneath the deformable layer 125 is an array of pressure sensors (not shown) which produce a signal when a force is exerted by a user onto the user interface surface 120 and transmitted through the deformable layer 125 to the array of sensors. The measurements at the sensors can therefore detect both the location of the user input on the user interface surface 120 but also the force of the user input.

Between the user interface surface 125 and the casing 110 there is also an array of LEDs (not shown) which light up to indicate certain areas of the user interface surface 120 to a user. For example, the LEDs may produce different colors at different locations under the user interface surface 125 to indicate a visual feedback to the user on top of a particular musical note rendering. The light produced by the LEDs passes through the deformable layer 125 and out of the user interface surface 125 to be visible to a user.

As illustrated by Figure 1, the touchpad device is cuboid in shape, with a length and width approximately the same and height less than the length and width. For example, the height may be approximately a quarter of the length and width. In advantageous arrangements, the length and width are exactly the same so as to be easily moved around one another from a first mating position to another mating position. This produces a slab shape which can easily slide around a worktop or desk without tumbling or rolling. This maintains the orientation with the user interface surface 125 on the upper side of the touchpad device. On each side of the touchpad device 100 there is at least one electrical connector 300 which is arranged to interface with another similar connector of another device, for example a second touchpad device. The touchpad device according to Figure 1 includes 8 connectors, with two located on each side face of the touchpad device, thereby offering as many mating positions.

The connectors 300 include six electrical contacts 310 as seen in Figure 3. When each is connected to another connector it communicates data and power to the other connector. The connectors 300 are explained in further detail in Figure 3.

The touchpad device 100 also includes one or more functional buttons 130, 131 which may have a variety of uses. For example, one button may be a power button for turning the touchpad device on or off. Another button may be a mode toggle button for a user to switch the operation of the touchpad device between different modes of input and/or modes of music creation.

Figure 2 illustrates components of the electronic touchpad device 100 of figure 1. Touchpad device 100 includes a processor 210, a memory 220, a power supply 230, a user input interface 240 and communication interface 250. The processor 210 executes instructions to process data and control each of the components of the touchpad device. The instructions that the processor executes are stored in the memory 220. The memory 220 also stores data from user input interface 240 as sensed by the sensors in response to a user input or from one or more functional buttons 130, 131. Data from the memory 220 can be retrieved on request by the processor 210 or from an external processing device. The power supply 130 supplies power in the form of electrical energy to the components of the touchpad device 100. The power supply may be a battery which stores electrical energy. Alternatively it may be supplied by a power line to an external power source. The user input interface 240 receives user input from the user interface surface 125 in Figure 1 in the form of signals sensed by the sensors of the touchpad device. These signals can be sent to the processor 210, the memory 220 or the communication interface 250.

The communication interface 250 communicates to and from devices other than the touchpad device. The communication includes using electromagnetic radio via one or more antennas using a wireless protocol, for example WiFi or Bluetooth. The communication can also include using physical connections such as by USB, from a power socket, or via one or more connector 300. The communication interface 250 can communicate data from one or more of the processor 210, memory 220 or user input interface 240 to one or more other devices for example via the communication interface of another touchpad device 100. The communication interface 250 also transfers power to or from the power supply 230. The communication interface 250 can receive power from an external power source, such as from the mains or from another device via USB port. The communication interface 250 also transfers power via the connectors 300 to another connector associated with another device, for example another touchpad device 100. The communication interface, to enable the present hardware flow control, further comprises a microcontroller 410, a UART (Universal Asynchronous Receiver/Transmitter) 420, a multiplexer 430 and a plurality of receiving and transmitting contact pins 441-446 and 451-456 respectively as shown in Figure 4 and further detailed hereafter.

Connector arrangement

The connector 300 structure and function is discussed below with reference to Figure 3, which illustrates an electrical connector of the electronic touchpad device 100. The particular arrangement of the connector 300 is such that the connector can mate with another connector which is identical, or substantially similar to it. In this way a touchpad device 100 with a number of connectors according to the present disclosure on each side face can be rotated and connected to any side face of another touchpad device with matching connectors. This is solely for illustration purposes as the present hardware flow control may be implemented using conventional male/female connectors to allow power and data transmissions.

Connector 300 is located on a side wall of the touchpad device 100. There are six electrical contacts 1A-3A, 1B-3B each of which is connected to wiring or circuitry on the inside of the casing 110. Each of the electrical contacts has a function and is connected to components of the touchpad device according to their function. The electrical contacts are shown in Figure 3 as conducting pins. The six pins include: two power pins to transfer power 1A, 1B; two signal pins to transfer data 2A, 2B; and two ground pins that are grounded 3A, 3B. The pins are located on the casing in pairs, with a first pin of each pair located on one side of a plane of reflectional symmetry P and the other pin located on the other side of the plane P in a location symmetrical to the first pin. In Figure 3, this can be seen as there are three pairs of pins, an A pin and a B pin for each pair. The A and B pins are located symmetrically on either side of the plane of reflectional symmetry P. In the arrangement illustrated by Figure 3, the pins are arranged substantially linearly. This improves the manufacturing efficiency and is especially advantageous for including in a device which is has a smaller height than length and width. The linear arrangement in this case may be substantially horizontal. This linear arrangement of pins reduces the required height of the device and this allows for a device with a lower center of gravity which can be slid around a surface more easily without flipping or tumbling.

Furthermore each pair of pins has same the role as the other pin in its pair. In this way the two power pins 1 A, 1B are located symmetrically across the plane P of symmetry and likewise for the two signal pins 2A, 2B and the two ground pins 3A, 3B. Therefore when two connectors with an arrangement of pins as described above and the two connectors face each other pin-to-pin, the power pins, signal pins and ground pins respectively align with the power pins, signal pins and ground pins of the other connector. Once electrical contact is made between the pins, the signal pins can then transfer data across the connector, the power pins can transfer power across the connector and the two connectors share a common ground.

In general there are two types of electrical contacts that are included in a connector 300. A first type of electrical contact (e.g. type 1 pins) is one that to successfully connect it comes into contact with another electrical contact with the same role. For example, power pins will successfully connect with another power pin to transfer power and there is no distinction in the role between the two power pins. Likewise ground pins come into contact and share ground without distinguishing the roles between each pin. A second type of electrical contact (e.g. type 2 pins) is one that to successfully connect comes into contact with another electrical contact with a different but complementary role. For example, signal pins connect with one pin having a transmitting role Tx and the other signal pin having a receiving role Rx. As can be seen from Figure 3, only two signal pins are needed to transfer data between mated touchpad devices 300.

In addition, for a connector of a first touchpad device to connect with another connector of another touchpad device, with regards to the function of the electrical contacts and their respective roles, the physical shape of the electrical contacts must all be compatible. As can be seen in Figure 3, each electrical contact is either a protruding pin 31 or a recessed pin 32 located in a pin recess 33. When two connectors meet, the structure of the connector is designed such that a protruding pin 31 of a first connector will contact a recessed pin 32 of the second connector and vice versa. This is achieved by having one pin in each pair of pins being a protruding pin 31 and the other pin in each pair being a recessed pin. As discussed above, the first and second pins of each pair are located symmetrically across the plane of symmetry P. Therefore, when a second connector with the same pin arrangement approaches a first connector pin-to-pin, protruding pins 31 will align with recessed pins 32 and the two connectors can physically mate. The connector arrangement of Figure 3 is such that the six pins alternate between recessed pins 3A,1A,2B and protruding pins 2A,1B,3B thereby creating a more secure engagement with a second connector.

When two connectors physically mate, the pins from a first connector physically contact the corresponding pins of a second connector. The two connectors may be held together by securing mechanism such as by using an arrangement of magnets surrounding the electrical contacts. Other pin shapes may be used to ensure proper mating of the connectors.

Communication interface arrangement to enable hardware flow control Figure 4 presents a schematic layout arrangement of two communication interfaces 250 as in Figure 2, each comprising a plurality of connectors 300of Figure 3. One communication interface is for transmitting data 400 while another one is for receiving data 401. Only the data communication through pins is illustrated as the wireless communication of a communication interface 250 is beyond the scope of the present disclosure. The layout of a communication interface of a transmitting touchpad device (often referred as the Data Terminal Equipment or DTE in serial data transmission such as RS-232 standard) is shown on the left hand side of Figure 4, while the layout of a communication interface of a receiving touchpad device (often referred as the Data Communication Equipment or DCE) is shown on the right hand side.

Looking at the transmitting device DTE, its communication interface for transmitting data is illustrated as an integrated circuit 400 comprising 6 connectors. Only the transmitting lines connecting to the transmitting pins Tx1 to Tx6 of each connector are represented for simplification purposes. The transmitting lines and their transmitting pins correspond to same reference numbers 441 to 446 respectively. To address the different transmitting lines, a multiplexer 430 is provided on the integrated circuit 400 and is controlled by microcontroller 410 addressing for instance the different lines through a port number referenced or associated with the data transmission. The signals that control the multiplexer 430 will also be referred to hereafter as a data bus for addressing the different transmission lines. The microcontroller 410 is itself operated by the processor 210 of Figure 2 (not represented in the Figure 4). At least one UART (Universal Asynchronous Receiver/Transmitter) 420 is provided on the integrated circuit 400 to take bytes of data received from microcontroller 400 and transmits the individual bits in a sequential fashion over one of the available Tx lines.

The UART may be a separate element on the integrated circuit 400 or part of the microcontroller 410. The present arrangement allows the DTE to serve data to up to 6 different touchpad devices when attached to the 6 different connectors 300 similar to the one described in Figure 3.

Looking now at the receiving device DCE, its communication interface for receiving data is illustrated as an integrated circuit 401 comprising 6 connectors. Only the receiving lines connecting to the receiving pins Rx1 to Rx6 are represented for simplification purposes. The receiving lines and their receiving pins correspond to the same reference numbers 451 to 456 respectively. To connect to the different receiving lines, a multiplexer 431 is provided on the integrated circuit 401 and is controlled by microcontroller 41. The microcontroller 411 is configured to drive the multiplexer 431 to connect to a transmitting line on integrated circuit 400 once a change in its logic state is detected. The signals that control the multiplexer 431 will also be referred to hereafter as a data bus for receiving data from the different receiving lines. The microcontroller 411 is itself operated by a processor similar to the processor 210 of the DTE in Figure 2 (not represented in the Figure 4). At least one UART (Universal Asynchronous Receiver/Transmitter) 421 is provided in the integrated circuit 401 to transform the serial data received over one of the receiving lines into parallel bytes conveyed to the microcontroller 401. Here too, the UART 421 may be a separate element on the integrated circuit 400 or part of the microcontroller 410. The present arrangement allows the DTE to receive data from up to 6 different touchpad devices when attached to the 6 different connectors 300.

As the roles of the DTE and DCE may be switched, each device comprising one type of communication interface may be equipped with the other one of the two types of communication interfaces. For instance, both UARTs 420 and 421 have each a transmitting side and a receiving side. The DTE, as in control of the transmission of data, is seen for its transmission capabilities, while the DCE, as in control of the reception of the data is seen for its receiving capabilities, for simplification purposes. Furthermore, six inter-touchpad device connections are shown only for illustration purposes as a UART may serve data to or receive data from an arbitrary number of connected touchpad devices.

Detailed description of the hardware flow control

In RS-232 serial data communication, devices can either receive or transmit data using serial signaling consisting of voltage variations of the Tx and Rx lines. The microcontroller 400, either directly using GPIOs (General Purpose Input/Output) pins or by controlling the UART 401, can supply two distinct voltage levels that correspond to two different logic states: a low logic state corresponding to a low voltage, also referred to as a data bit of value 1, and; a high logic state corresponding to a high voltage, also referred to as a data bit of value 0.

One may note that a similar though reversed logic is proposed by TTL (transistor-transistor logic) serial signaling, using different voltage levels. Indeed, the low logic state corresponds to the high voltage value, while the high logic state corresponds to the low voltage value. Nonetheless, the present teachings apply also to this alternative logic. A microcontroller, like the microcontrollers 410 and 411, can control the logic state of the Tx pins on the integrated circuit, to either transmit data or to convey signaling as in the present disclosure. A Rx line, on the other hand, will follow the logic state of the Tx line it is connected to. In other words, the logic state of a Tx line in a DTE will vary based on the data and signaling while the logic state of a Rx line will depend upon the status of the mating Tx line on the opposite DCE.

Figure 5 illustrates a state diagram of a method to control the data flow using the present two data pin hardware arrangement. The present method will be firstly illustrated in the context of one transmitting line Tx of a DTE seeking transmission of data with one receiving line Rx of a DCE. In other words, only two touchpad devices are in communication through two mating connectors 300. Reference will be made to Figure 6.1 illustrating the variations of the logic states for both the Tx and Rx pins of the DTE.

Furthermore, steps 500 to 550 on the right side of Figure 5 are illustrated as seen from the microcontroller 410 of the DTE. The microcontroller 411 of the DCE executes the steps 505 to 555 illustrated in the left side of Figure 5.

In a preliminary step 500 of the present method, both Tx and Rx lines of the transmitting device DTE are resting in a first logic state, here the low logic state, e.g. with its UART 420 disconnected. Therefore the Tx and Rx lines of the receiving device DCE are resting in the same low state in step 505. The Rx and Tx of both devices are resting in an idle state. This corresponds to initial phase in Figure 6.1 wherein both Tx and Rx lines of the DTE are resting in a low logic state at references 610 and 615 respectively.

In a further step 510, data for transmission for a specific communication port becomes available to the microcontroller 410 of Figure 4. To signal that data is available for transmission, the microcontroller 410 will control the transmitting line Tx to change its logic state to the second logic state. The transmitting line may be selected from the port number referenced in the data available for transmission. To control this first transmitting line, microcontroller 410 may drive the transmitting side of the UART 420 to connect to the transmitting line Tx at the specific port, e.g. Tx4 referenced 444 in Figure 4. Consequently, the logic state of the transmitting line Tx4 changes to a high logic state. This corresponds to the “Request to Send” from the known RTS pin in RS-232 standard. This is illustrated in Figure 6.1 by the Tx level going up at 620 from its initial low level at 610. In response, if the DCE is ready to receive, its own Rx line will change in a further step 515 to a high logic state, e.g. receiving line Rx4 454, thereby signaling to the transmitting device that a data transfer may start. This corresponds to the “Clear to Send” from the known CTS pin in existing RS-232 standard. A time-out may be needed at this stage in case no change in logic state of the Rx is detected at the first transmitting line of the DTE. This is illustrated with additional step 560 with the microcontroller 410 disconnecting the first transmitting line and its returning to the initial idle state 500 after an exemplary time out of 50ms has lapsed.

Provided the Rx of the DCE is detected as going high by the microcontroller 410, a successful Tx_Handshake in step 520 of Figure 5 is detected and the transmission can occur in a further step 540. The successful Tx_Handshake is matched with a corresponding successful Rx_Handshake on the DCE side in step 525. This corresponds to the transmission 620 by the Tx line going high in Figure 6.1. In a further arrangement, in order to avoid any contention when both devices DTE and DCE try to send data simultaneously, the transmitting device DTE connects the receiving side of its UART 420 to its Rx line while it is transmitting data on the Tx line in 540. This readies the DTE to receive data should the DCE attempt to transmit any. As part of receiving data at step 545, the DCE may put its own Tx line up in a further step 535 following the Rx handshake of step 525. As it is not initiating transmission, there is no risk of contention, so it may do this using a GPIO pin. This will cause the Rx line of the DTE (in contact with the Tx line of the DCE) to go up in step 530, as seen in Figure 6.1 at reference 625 with the Rx line of the DTE in its high logic state throughout most of the transmission 620.

Once the data transmission of step 540 is terminated (disconnection of the DCE during transmission) or finished (no more data to transmit), the microcontroller 410 of the DTE will disconnect its UART from the transmitting line Tx 444 to switch it back to its low logic state in a further step 550. The Rx line of the DCE will also return to the low logic state in step 555. The DTE will also disconnect the UART from its Rx line. Detecting an end of transmission, the microcontroller 411 of the DCE will pull its Tx line down to the low logic state by disconnecting its Tx line from e.g. the GPIO pin in corresponding step 555. As a direct consequence, the Rx line of the DTE, following the change of state from the DCE Tx line, will also return to its low logic state in step 550. The flow control will finish in step 500 and 505 respectively with both lines from the transmitting device and the receiving device back to their idle state. This is seen in Figure 6.1 with the levels back to the low level at reference 630 first for the Tx line and 635 shortly after for the Rx line of the DTE.

The proposed integrated circuit for the communication interface of the present arrangement enables one UART to service an arbitrary number of inter-touchpad connections, provided that the total data rate does not exceed the capacity of a single UART. This arrangement enables a reduction in use of integrated circuits and consequently lower cost of manufacturing.

The low logic state obtained by disconnecting the UART is particularly useful in that it reduces the power consumption from the present integrated circuit. Indeed, by dividing the attention of the UART between several connections, and disconnecting the transmitting or receiving lines not in use, the current required to operate the circuit is reduced. A UART generally runs at a high clock speed (several times the speed of an inter-touchpad connection) and in order to run fast, requires consequently operating with a low impedance load for reliability. But cutting down the number of UARTs to one to service the data lines, as well as resting these at a low logic level when idle, low consumption is enabled as no current flows through the lines.

Testing the presence of a DCE

To save time, the communication interface of the DTE may quickly test for the presence of a remote DCE device on the data bus 430 without transmitting data. This is useful to indicate quickly either that a device has been newly connected to a connector 300, or that a previously-connected device has been powered down or unplugged.

As seen previously, the microcontroller 410 of the DTE device is configured to drive a first transmitting line to change its logic state from a low level to a high level, for instance by connecting the UART to this first transmitting line. Alternatively, as the microcontroller may also have a number of General Purpose Input/Output (GPIO) pins available, the microcontroller may drive the first transmission line to change logic level using for instance an available GPIO pin. The UART 420 remains disconnected from the first transmission line and may be deployed to another second transmission line at a different port of the DTE. This mechanism may be seen as a test for detecting the presence of DCEs at the different ports and corresponding connectors. If the microcontroller detects at the first transmission line a change of logic state from a receiving line of a DCE, in response to the first transmission line changing logic state itself, the microcontroller 410 will tag the first transmission line as connected to a receiving line in a mapping table. This is illustrated in Figure 7, left side of the Figure, showing the Rx line of the DCE going to the high logic state in response to the Tx line of the DTE driven to its high logic state by a GPIO pin. If no receiving line Rx of the DCE is detected as changing logic state in response, the transmitting line will be tagged as not connected to a receiving line in the mapping table. This corresponds to Figure 7, right side of the figure.

This test relies upon the same mechanism (Tx of DTE going up, followed by the Rx of the DCE going up) as the one used in the hardware flow control of the present system, though no data is exchanged. The mapping table listing the transmitting lines at different port of the DTE, tagged as connected or not, may be used to improve the management of the data transmission, as the microcontroller may only go for the handshake for transmission lines tagged as connected. This reduces the risk of step 560 happening, when no change in logic state is detected at the transmitting line in response to said line going to the high logic state.

Although the above describes a particular hardware flow control, the principles disclosed herein can be implemented in a variety of other ways. For instance, the high or low logic states may be implemented differently, e.g. through different voltage levels, depending for instance on the standard TTL or RS-232 being deployed in the integrated circuit arrangement.

Claims (11)

CLAIMS:
1. An integrated circuit arrangement for hardware flow control of data transmission, the integrated circuit arrangement comprising: a first transmitting line, a first receiving line, wherein both lines are operable between a high and a low logic state, the first transmitting line resting at a first one of the logic state, the integrated circuit arrangement further comprising: - a Universal Asynchronous Receiver/Transmitter (UART) for transmitting data over the first transmitting line, - a microcontroller providing data to transmit over the first transmitting line via the UART, wherein the microcontroller is configured to, when data is ready to be transmitted over the first transmitting line: control the first transmitting line to change its logic state from the first one to the second one of the logic states, when detecting a receiving line from another integrated circuit arrangement connected with the first transmitting line changing its logic state to the second logic state in response, control the UART to transmit the data through the first transmitting line.
2. An integrated circuit arrangement according to the previous claim, wherein the first one of the logic state corresponds to the low logic state, with the UART disconnected from the transmitting line, the microcontroller being configured to connect the UART to the transmitting line to change its logic state to the high logic state.
3. An integrated circuit arrangement according to the previous claim 2, wherein the microcontroller is further configured to: - control the first transmitting line to change its logic state from the first one to the second one of the logic states when the UART is disconnected, - when detecting a receiving line from another integrated circuit arrangement connected with the first transmit line changing its logic state to the second logic state in response, tag the first transmitting line as connected to a receiving line.
4. An integrated circuit arrangement according to the previous claim, further comprising: - at least second transmitting and receiving lines, the plurality of transmitting lines formed by the first and at least second transmitting lines being each associated to a distinct port, a multiplexer for addressing a transmitting line based on a port referenced with the data transmission, the microcontroller being further configured to control the multiplexer to select the first transmitting line based on the port referenced with the data ready to be transmitted.
5. An integrated circuit arrangement according to one of the previous claims, wherein the first receiving line is also resting at the first one of the logic states when no data is transmitted, the microcontroller being configured to connect the UART to first receiving line while data is transmitted through the transmitting line.
6. A method for controlling the flow of data transmission using a microcontroller in an integrated circuit arrangement comprising a first transmitting line and a first receiving line, wherein both lines are operable between a high and a low logic state, the first transmitting line resting at a first one of the logic state, the integrated circuit arrangement further comprising a Universal Asynchronous Receiver/Transmitter (UART) for transmitting data over the first transmitting line, the method being carried out by the microcontroller and comprising, when data is ready to be transmitted over the first line: controlling the first transmitting line to change its logic state from the first one to the second one of the logic states, - when detecting a receiving line from another integrated circuit arrangement connected with the first transmitting line changing its logic state to the second logic state in response, controlling the UART to transmit the data through the first transmitting line.
7. The method according to the previous claim, wherein the first one of the logic state corresponds to the low logic state, with the UART disconnected from the transmitting line, the method further comprising connecting the UART to the transmitting line to change its logic state to the high logic state.
8. The method according to the previous claim 7, further comprising: controlling the first transmitting line to change its logic state from the first one to the second one of the logic states when the UART is disconnected, - when detecting a receiving line from another integrated circuit arrangement connected with the first transmit line changing its logic state to the second logic state in response, tagging the first transmitting line as connected to a receiving line.
9. The method according to the previous claim 8, wherein the integrated circuit arrangement further comprises: at least second transmitting and receiving lines, the plurality of transmitting lines formed by the first and at least second transmitting lines being each associated to a distinct port, a multiplexer for addressing a transmitting line based on a port referenced with the data transmission, the method further comprising controlling the multiplexer to select the first transmitting line based on the port referenced with the data ready to be transmitted.
10. The method according to one of the previous claims 6 to 9, wherein the first receiving line is also resting at the first one of the logic states when no data is transmitted, the method further comprising connecting the UART to the first receiving line while data is transmitted through the transmitting line.
11. A microcontroller for providing data to be transmitted over a first transmitting line of an integrated circuit arrangement, the first transmission line being operable between a high and a low logic state, the first transmitting line resting at a first one of the logic state, wherein the microcontroller is configured to, when data is ready to be transmitted over the first transmitting line: - control the first transmitting line to change its logic state from the first one to the second one of the logic states, - when detecting a receiving line from another integrated circuit arrangement connected with the first transmitting line changing its logic state to the second logic state in response, controlling a Universal Asynchronous Receiver/Transmitter (UART) in the integrated circuit arrangement to transmit the data through the first transmitting line.
GB1618509.2A 2016-11-02 2016-11-02 Data flow control Pending GB2555601A (en)

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20010023468A1 (en) * 2000-02-22 2001-09-20 Oh Jin Geun Method for the serial transfer of data between two electronic bus stations and bus station for use in said method
US20130238825A1 (en) * 2012-03-09 2013-09-12 Canon Kabushiki Kaisha Information processing apparatus, serial communication system, method of initialization of communication therefor and serial communication apparatus
US20140115209A1 (en) * 2012-10-18 2014-04-24 Hewlett-Packard Development Company, L.P. Flow Control for a Serial Peripheral Interface Bus
US20160098073A1 (en) * 2014-10-03 2016-04-07 Qualcomm Incorporated Clock-free dual-data-rate link with built-in flow control

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20010023468A1 (en) * 2000-02-22 2001-09-20 Oh Jin Geun Method for the serial transfer of data between two electronic bus stations and bus station for use in said method
US20130238825A1 (en) * 2012-03-09 2013-09-12 Canon Kabushiki Kaisha Information processing apparatus, serial communication system, method of initialization of communication therefor and serial communication apparatus
US20140115209A1 (en) * 2012-10-18 2014-04-24 Hewlett-Packard Development Company, L.P. Flow Control for a Serial Peripheral Interface Bus
US20160098073A1 (en) * 2014-10-03 2016-04-07 Qualcomm Incorporated Clock-free dual-data-rate link with built-in flow control

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