GB2540034A

GB2540034A - Packaging for MEMS transducers

Info

Publication number: GB2540034A
Application number: GB1609497.1A
Authority: GB
Inventors: Hans Hoekstra Tsjerk
Original assignee: Cirrus Logic International Semiconductor Ltd
Current assignee: Cirrus Logic International Semiconductor Ltd
Priority date: 2014-06-10
Filing date: 2014-06-10
Publication date: 2017-01-04
Anticipated expiration: 2034-06-10
Also published as: US20170121173A1; GB2529134B; GB2543443B; EP3154897A1; GB2529134A; GB201410263D0; GB2542979B; GB2542979A; WO2015189598A1; GB201609497D0; GB201700038D0; GB2538177A; GB2538177B; US20170295434A1; CN106794980A; GB2543443A; KR20170016944A; GB201700040D0; GB2540034B; GB201610686D0

Abstract

A MEMS microphone package comprises a die 200, a transducer diaphragm 202, integrated CMOS circuitry 203, a barrier structure 304 surrounding the MEMS transducer membrane, and a package lid 302. The lid, barrier and diaphragm structures define an acoustic volume in communication with an acoustic port 305 formed in the package lid. A die attach film 301 is used to form a rear device seal. The package structure has no further packaging features and so provides a compact footprint corresponding to the size of the die 200.

Description

Packaging for MEMS transducers

Th:S application relates to methods and apparatus for packaging of a MEMS transducer arid to packages for or comprising a MEMS transducer, and, in particutar, for providing a package for a MEMS transducer, such as a MEiVIS microphone, formed orr an integrated circuit die.

Backoroyr^d

Consyrrter electronics devices are continualSy getting smaiter and, with advances In technology, are gaining ever-increasing performarice and fonctionaiity. This is dearly evident in the technology used irs coirsumer elsdronic products and especially, but not eKCiusiveiy, portable products such as mobile phones, audio piaye.ri, video players, PDAs, mobile computir?g platforms such as laptop computers or tablets and/or games devices. Requirements of the mobile phone industry for example, are driving the componants to become smaller with higher functionality and reduced cx5St. It is therefore desirable to Integrate functions of etectronic circuits together and combine them with transducer devices such as microphones and speakers. yicro-eiectromechanlcal-sysiem (MEMS) transducers, sud? as MEIvIS microphones are finding application in many of these devices. There is therefore also a continual drive to reduce the size and cost of the MENS devices.

Microphone devices formed usirig MEMS fabrication processes typically comprise one or more membranes with electrodes for read-out/drive deposited on the membranes and/or a substrate. In the case of MEMS pressure sensors and mfcrophorres, the read out is usually accomplished by measuring the capacitance between the electrodes. In the case of output transducers, the membrane is moved by electrostatic forces generated by varying a potential difference applied across the electrodes.

To provide protection the MEMS transducer will be contained within a package. The package effectively encloses the MEMS transducer arid can provide envirorrmental protection and may also provide shielding for electromagnetlo interference (EMI) or the like. For microphones and the like the package will topically have a sound port to allow transmissiort of sound waves to/from tno trarisducer within the package and the transduces’ may be configured so that the flexible merrsbrane is located bebw'een first and second volumes, le. spscss/cavltles that, may be filled with air (or some other gas suitable for trarismlssion of acoustic waves), and which are sized sufficiently so that the transducer provides the desired acoustic response. The sound port acousticsiiy couples to a first volume on one side of toe transducer membrana, wttloh may sometimes be referred to as a front volume. ΊΊϊθ second volume, sometimes referred to as a beck νοίυηϊο, on the other side of the one of more membranes is generally required to aiiow the membrane to move freely in response to Incldsnt sound or pressure waves, and this back volume may be substantially sealed (aithough it will be appreciated by Oi-e skilled in the art that for MEMS microphones and the like the first and second volumes may be corinected by one or more flow paths, such as small holes In the rrsemb-'ane, that are cofifigured so as present a relatively high acoustic impedance at the desired acoustic frequencies but which allow for low-frequency pressure equalisation between the two volumes to account for pressure differentials due to temperature changes or the ilke.

Figure la Illustrates one- conventlorsal MEMS microphone package 100a. A MEMS transducer 101 attached to a first surface of a package substrate 102. The MEMS transducer may typically be formed on. a senvconductor die by known MEk/lS fabrication teefeniques. The package substrate 102 may be silicon or PCS or any other suitable material. A cover 103 is located over the transducer 101 attached to the Hrst surface of the package substrate 102, The cover 1Q3 may be a metallic lid. An aperture 104 \n the cover 103 provides the sound port and allows acouslic signals to enter the package, in tt^s example the transducer 101 is wire bonded to the substrafe 102 via terminal pads on 105 on the package substrate 102 and transducer 101.

Figure 1b Illustrates another kiiown MEMS transducer package 100b, Again a transducer 101, which may be a MEMS microphone, is attached to the first surface of a package substrate 1Q2. in this example the package also contains an Integrated circuit 106. The integrated circuit 1Q6 may be provided for operation of the transducer and may for example be a lovwnoise amplifier for amplifying the signal from a MEMS microphone. The integ.mted circuit 106 is eieotrically connected to electrodes of the transducer 101 and is also attached to the first surface of the package substrate 102.

The integrated circuit 106 is bonded to the transducer 101 via wire-bonding, A cover 107 is located on the package substrate so as to enclose the transducer 101 and the integrated circuit 106. in this package the cover 107 comprises an upper pari or lid portion 10?a and two side walls 107b which are all formed of PCB. The cover 10? has a sound port 104 in the upper part 1Q7a which allows acoustic signals to enter the package.

Embodiments of the present invention relate to improved packaging methods for MEMS transducers and to improved packages for MEMS transducers

According to the present invention tliere is provided a MEMS transducer package comprising a first integrated circuit die, the first integrated circuit die comprising: an integrated MEMS transducer; and integfaied electronic circuitry for operation of the MEMS transducer; wherein footprint of the yEMS transducer package is substantially the same size as the footprint of the irstegrated circuit die.

In sorr^e embodiments the MEMS transducer package may further comprise a first package cover which overlies the MEMS transducer, wherein at least part of the outer surface of the MEMS transducer package is formed by the first package cover, A barrier may also be provided around the tdEMS traiisducer between ttie first package cover arid the first integrated circuit die. A first volume may be defined by the first iritegrated circuit die, the barrier and the first package cover. The barrier may comprise a layer of an adhesive maierial. in some embodiments the first padrage cover comprises an aperture. A sealing ring may be provided on the outer surface of the first package cover surrounding the aperture. In some embodiments the iVIEivIS transducer package may further comphse a water-resistant membrane disposed across said aperture. !π some embodiments the MEMS transducer package comprises a package substrate which is electricaiiv connected to the firet integrated circuit die. The package substrate may be bonded to the electronic drcultry of the first integrated circuit die v;a at least one bump bond. The package substrate may be bonded to the electronic circuitry of the first integrated circuit die via a plurality of bump bonds, and ead) of said bump bonds may be located witt?:n a region located towards one end of the first integrated circuit die in some embodiments the package substrate coinprises a ground plane. The first package cover may comprise the package substrate, in some embodiments the package substrate comprises a second integrated circuit die which at least partiaiiy overiies the first integrated circuit die. The first integrated circuit die may comprise analogue circuitry and the second integrated circuit die may comprise digiiai drcuitsy. The first irdegrated circuit die may be formed from a different manufacturing process node to the secorid integrated circuit die.

In some embodiments iiie package substrate may comprise the second integrated circuit die and a support layer, wherein the second integrated circuit die may be attached to the support layer and the suppo.ri layer may form at least pert of the outer surface of the package. The first Integrated circuit die may be bump bonded to said support layer, and said second integrated circuit die may be siectricaliy connected to the support layer. The first integrated circuit die may be bump bonded to the second integrated circuit die.

Sn some embodiments eiectrica! cordacts nray be provided on a surface of the package substrate for eiectricaliy connecting to the first integrated circuit die. Vias may be provided through die package substrate connecting the electrical coritacts to the electronic circuitry. in some embodiments the MEUS transducer package comprises a liiSer layer of material disposed between the first package cover and at least part of the electronic circuitry of Itie first irHegrated circuit die. \r\ some embodiments the MEMS trarisducer Is formed ai a first surface of the first integrated circuit die* The first integrated circuit die may comprise a cavity wherein the MEyS transducer at least partly overiaps irVith the cavity. The cavity may extend through the first integrated circuit die from the MEMS transducer to an opening at a second surface of the nrst Integrated circuit die, in so<me ensuodimerrls the MEMS transducer package may further comprise a second packrage cover at the second surface of the first integrated circuit die to pmvide a volume defined by the cavity in the first integrated circuit die. Ti'se second package cover may comprise a sealing layer for sealing the cavity in the first integrated circuii die. The sealing layer may comprise a die attach film, in some embodiments, together the first integrated circuit die, the first package cover and the second package cover form at leas! pari of a side wail of the package,

The first integrated circuit dies may comprise at least one via eiectdcaily connected to the Integrated electronic drouitnr, the at least one via may run through the first integrated die to the second surface. Tiie second package cover may comprise the package substrate and may be electricaiiy connected to said at ieast one via of the first integrated circuit die at the second surface.

The area of the cavity at the MEMS transducer may smaller than at the second surface of the first integrated circuit die. l"he cavity may extend underneath the alecironic circuitry, in some embodiments at least part of the outer surface of the ME.MS trarisducer package is formed by the integrated circuit die.

In some embodiments the first integrated circuit die comprises a shield structure for at least one of light shielding and EMi shielding. The shieid structure may comprise a first area vi/hich comprises a plurality of metallic layers spaced in a first direction perpendicular to the surface of the first Integrated circuit die. The rneiaiiic layers may be connected by conductive vias. The metallic layers and conductive vias may be

Gonnecfecl iQ a sjround contact on the SL^rface of tiie first integrated circuit die. The ground contact may be connected to a ground contact of tire first package cover.

The metaliic layers and conductive vias may be connected to a ground piaree within the first integrated circuit die that underlies at least part of the eiecironic circuitry.

In some emixidimenls the metaliic Sayers arud conductive vias are arranged such ttrat substanfiaily any path crossing through the shield structure in a direction perpendicrnar to the first direction passes through at least one of said metallic layers and'or o ie oi said conductive vias. in sonne embodimenis lire MEMS transducer package comprises muitipie f^flEMS transducers on the first integrated circuit die. At least one of said muitipie MEMS transducers may be a different type of transducer to at least one other of said multiple MEMS transducers.

The MEMS transducer may be a MEMS micropt^one,

Ar? electronic device may comprises a MEMS transducer package as prevtousiy described.

The eiecironic apparatus may be: a poriabie device; a battery power device; a computing device; a communications device; a gaming device; a mobile telephone; a persona! media player; a laptop, labiet or notebook computing dewe.

In another aspect of the present invention there is provided a MEMS transducer package comprising an integrated circuit die, the first integrated circuit die comprising; an integrated MEMS transducer; and integrated electronic drcuilry for operation of the MEMS transducer, wherein at least part of the outer surface of the MEMS transducer package is formed by the integrated circuit die. !n another aspect of the present invention there is provided a MEMS transducer package comprising an integrated circuit die; the integrated circuit die comprisirig: an integrated MEMS transducer; and integrated eieotronic circuitry for operation of ttie MEiVIS transducer, wherein in at ieast one plane the cross secitonai area of the package is the same as the cross sectional area of the integrated circuit die.

In armttier aspect of the pfesent invention there is provided a MEMS transducer package comprising: a first semiconductor die; and a second semiconductor die; wherein; the first semiconductor die comprises an integrated MEMS transducer and integrated analogue electronic circuitry for operation of the MEMS transducer: the second semiconductor die comprises digitai circuitry, and the first and second semicoriduclor dies are eiectricaily connected together such that the second serrsioonductor die at ieast pertiy overiapa the first semiconductor die.

In another aspect of the present invention there is provided a MEMS transducer apparatus comprising: an Integrated circuit die having a cavity tfierein; a MEMS transducer formed on a first surface of ti'se integrated circuit die, wherein said MEMS transducer at least partly overlaps with the cavity: and a sealing layer attached to a second surface of the integrated circuit die so as to form a seal at the opening of the cavity irr the second sun^ce; wherein the sealing iayer comprisOvS a die attach film attached to the second surface of the integrated circuit die, in another aspect of the present invention ttiere is provided a MEMS transducer apparatus comprising: an integrated circuit die, a MEMS transducer formed at a first location on a first surface of the integrated circuit die, electronic drcoitry foroied at 3 second location on the first sysface of the Integrated circuit die for operation of the MEMS trarssducer, and at leas? two bond ternilnels iorn?ed on the integrated circuit die for bunsp bondirjg the integrated circuit die to e further substrate, wherein the at fees! two bond terminals are formed within a region located towards one end the integrated circuit die such that the opposite end of the integrated circuit die is not constrained from exparidir^g and/or contractirio by arsy busrip bondirsg. in another aspect of the present invention there is provided an integrated circuit die comprising; a semiconductor substrate, an integrated MEMS transducer formed on the substrate, integrated electronic circuitry formed on ihe substrate for providing operation of the MEMS transducer, and a shield structure for providing at least one of EMI shielding and light shielding, wherein the shield structure is formed at least partly within the substrate.

The shield structure may comprise a first area which comprises a plurality of metal layers spaced in a first directiors perpendicular to the surface of the integrated circuit die. The meiaiiic layers may be connected by conductive vias.

The metallic layers and conductive vies may be connected to a ground contact on the surface of the first integrated circuit die. The metallic layers and conductive vias may be connected to a ground plane vdthin the integrated circuit di>a that underlies at least pad of tile electronic circuitry.

The metallic layers and conductive vias may be arranged such that sSubstantially any path crossing through the shield structure in a direction perpendicular to the first direction passes through at least one or said metallic layers and/or one of said vias.

For a better understanding of the prosont irsvention, and to si^sow how it may be put into effect, reference wifi now be made, by way of exampie. to the accompanying drawings, in whict?:

Figure la and 1b Illustrate prior art MEMS transducer packages;

Figure 2a Hlustratee a crocs secliors of eri iritegrated circuit die coniprlslng a kflEblS transducer;

Figure 2b illustrates a three dimensional top view of the integrated circuit die showri in figure 2a;

Figure 2c illustrates a tfiree dimenslorial view of the underside of the integrated die;

Figure 3a illustrates a MEMS transducer package according to an embodiment of the present invention;

Figure 3b illustrates a cross section of an integrated circuit die having a sealing layer;

Figure 3c illustrates a three dimensional view of the underside of ars integrated circuit die of figure 3b;

Figure 3d illustrates a three dimensiorial view of a package substrate as may be used in the package of figure 3a;

Figure 3e illustrates a three dimer^sional view of an integrated circuit die as may be used In the package of figure 5a;

Figure 3f illustrates a three dimensionai view of the MEMS transducer package of figure 3a,

Figures 4a and 4b illustrate plan views of the exampie integrated circuit dies;

Figure 5a illustrates a package substrate according to an embodiment of ihQ inventior?;

Figure 5b lllustretes a cross sectional view of the package substrate of figure 5a;

Figure Sc illustrates a three diroensionai view of the package substrate shown in figure 5b with a barrier layer;

Figure 5d illustrates a three dimensional view of ihe MEMS transducer package illustrated in figure 5a;

Figure 6a iliustrates a fvtEfdS transducer package according to a further embodirnent of the invention;

Figure 6b illustrates a cross ssstlonai viev·/of the package substrate of figure 6a;

Figure 6c illustrates a three dimensional viev/ of Itie MEMS transducer package lilustraied in figure 6a;

Figure 7 illustrates klEMS transducer package according to a further embodiment of the invention;

Figure 8 Hlustrates a fviEMS transducer package where sound is received via the die substrate cavity according to a furitier embodiment of the invention;

Figure 9 iliustrates a IVIEK'IS transducer package according to a further embodiment of the invention 'where a package substrata is eiectricaiiy connected to the transducer die by vies in the transducer die;

Figure 10a iliustrates a conventional seal-ring structure and figure 10b illustrates a seai*ring structure that may be formed in the integrated circuit die according to an embodiment of the invention; and

Figures 11a to 11d illustrates plan viev^s of further example of integrated circuit dies according to err^bodiments of the invention. β|τδΰί.'ΜΪ«Π

Embodimefils of the present invention provide improved MEMS transducer packages containing an integratec circuit die with an integrated MEMS transducer. The integrated circuit die may also comprise integrated electronic circuitry for operation of the IVtEMS transducer. In some embodiments the size of MEMS transducer package may be reiatively small and/or reduced as compared to conventional packages and in some embodiments the footprint of the package may be substantially the same size as the footprirst of the integrated circuit die comprising the MEMS transducer, in soma embodiments at least part of the outer surface of the MEMS transducer package Is formed by the Integrated circuit die, for example part of a sidewall of the MEMS package, in some embodiments therefore the integrated circuit die comprises structures for providing shielding such as light shielding and/or EMI shielding Additionally or alternatively some embodiments relate to MEMS transducer packages that may reduce the number of fabricatiofr steps needed to form the package vrilh respect to conventional methods. Embodiments also relate to MEMS traresducer packages housing a plurality of integrated circuit dies.

Throughout this description any features which are slmiiar to features in other figures have been given Itm same reference numerals.

In embodiments of the invention the MEMS transducer may be formed on an integrated circuit die together with at least some electronic circuitry. Figure 2a iliustrates a cross section of an integrated circuit die 200 comprising a MEMS transducer that may be used in an embodiment of ttie inventiors. Figures 2b and 2c show perspective views of the upper and lower surfaces respectively of the die 200. A die substrate 201, which may comprise a, semiconductor, e.g. sliicon, substrate, comprises an integrated transducer 202 formed in a transducer region of the die and integrated electricai circuitry 203 formed in an electronics region of ttie die. The traresducer 202 and electrical circuitry 203 may be formed by any suitable processing techniques, for instance by using CMOS compatible MEMS fabrication techniques, it will of course be appreciated that components of the MEMS transducer 202 and/or electronic circuitry 203 may extend beyond the plane of the upper surface 204 of the die substrate 201.

The iraiiKducer 202 rrsay be e MEh'IS transducer such as a MEMS microphone. The electronic circuitry may, at least partly, cempriss circuitry for operation of the MEMS transducer and may, for example, comprise a low iioise amplifier or pre-amplifier ......circuit.

Note that as used in this specification the upper surface 204 of the transducer die 201 shai! iakeri to mean the surface of Itie die oo/iri wtiich the transducer 202 and electronic circuitry 203 is fabricated as illusirated in figure 2a. However it shouid be understood that the term upper shouid not be in any way construed as limiting to any particuiar orientation of the transducer die 201 dunrig any fabrication step and/or It orientaiion in any package, or indeed the orientation of the package in any apparatus. The relative terms lower, above, below, underside, underneath etc. shall be construed accordingly, A cavity 205 is formed in the die substrate 201 on ttie underside of the transducer 202. In other words the transducer is formed at a first, e.g. upper, surface of the integrated circuit die and the cavity may extend from through the integrated circuit die from the MEMS transducer to an opening at a second, e.g. iower, surface of the Integrated circuit die. In embodiments of the present invention the cavity 205 may he configured so es to form el least part of a back volume in use, to allow the transducer membrane to move freely. As mentioned above transducers such as MEMS microphones may comprise a Hexible membrane that can move in response to a pressure differential across the mem.brane. In use ttie membrane is typically disposed behween first and secor.d volumes, I.e. spaces or cavities that allow the membrane to deflect. Typically the first and second volumes fill with air In use but in some application the volumes could be filled with some other gas or liquid suitable for transmission of acc:.;stic waves arid/or responding to pressure differences. For a MEMS microphone a sound port, Le, acoustic aperture, couples to lire first volume to allow transmission of acoustic waves to one side of ti'se membrane of the transducer. The first volume may be referred to as a front volume. The second volume on the other side of the membrane may be referred to as a back-volume.

It should be noted that the terms front and back-volume do not define any particular orientation of the transducer die. For example in some MEMS packages the back-voiume may, at ieasi parity be formed by die cavity in the die substraie but in other packages the cavity in the die substrate may be coupied to a sound port arid may form at least part of a front voiume.

St stiouid atso be noted that the terms front and back- voSume do not denote any pariiouiar type of transducer constryction. Sn particuiar for a MESvtS capacitive transducer having a flexibie membrane, the flexible membrane wlH typicalSy support a first electrode reiative to a second, substantialiy fixed, electrode. The second electrode may be supported by a support structure, which is separated from the fiexible membrane by a transducer cavity or gap. The support structure supporting the second electrode is sometimes referred to as a back-plate and is typically designed to fsave a reiativeiy low acoustic impedance at the frequencies of interest In some designs of transducer the back-piate may be located above the membrane (when fabricated on the substrate) and thus the cavity 205 in the substrate extends beneath ttie membrane. In other designs txjwever a back-plate may be located under the membrane and the cavity 205 in the die substrate may therefore extend through the die substrate to ttie membrane. Such a support structure, or back-ptate, may therefore be located in the front volume or in the back volume,

Tile cav-ty 205 in Lite substrate die 201 may be formed in any known way. Advantageously the cavity may have a cross sectional area that Increases towards the lower side of die die substrate 201. Thus the cavity immediately underlying the irartsducer 202 may have a first cross sectional area so that the area of the membrane is defined accurately. Towards the lower side of the die substrate 201 the cross sectional area of the cavity 205 may be larger so as to maximise the part of the back volume provided by the cavity 205, in some embodiments there may be a step change in tiie slope profile of the walls of the c^avity 205, Such a cavity profile may be achieved by a fr?ulti-siage etching process such as described in the patent GB2451909. In the example shown in figure 2a fbe area of the cavity 205 towards the lower surface of the die substrate 201 extends such that part of the cavity underiies at least part of the electranics region of the die substraie 201. In some embodiments however the cavity may be configured such that it may not extend under the electrical circuitry 203, as illustrated by the dotted line 205a.

The eieciricai circuitfy 203 may be connected ίο the transducer electrodes for operation of the transducer 202.

Figure 3a iliustrafes a MEMS transducer package 300 according to an embodiment of the present invention. The package comprises arj integrated circuit die 200 sucti as described above In respect to figures 2a to 2c, and thus comprises a die substrate 201, iieving formed thereon an integrated transducei 202 integrated electrical circuitry

The integrated circuit die 200 is located between a first package cover which in this embodiment is provided by package substrate 302 and a second package cover whicii in this embodiment is provided by sealing layer 301. in this erribodirnert! the cavity 205 In the die substrate is sealed with a sealing layer 301 at the lower surface of the integrated circuit die. The sealing layer rnay be any suitable material such as RGB or a semiconductor layer or tf?e like. Figures 3b and 3c illustrate respectively a cross-section of integrated circuit die 200 having a sealing layer 301 attached and a perspective vievr of the underside of such a die. In some embodiments however the sealing layer 301 n?ay comprise die attach film (DAF). As one skilied In the art will be aware DAF is known which may be attached to a processed wafer before dicing. For example DAF may be used to attach the wafer to some dicing tape. The wafer may then be diced and heat applied to the dicing tape to cause it to expand and separate the individual dies. In embodiments of the present invention DAF may be used not oniy for the purposes of dicing but the DAF may form a functional part of the package Itself. The use of DAF as a seaiing layer for sealing the cavity 205 In ttie -substrate die 201,1.e. as a second package cover, represents one novel aspect of embodiments of the present invention, in some embodiments the DAF which comprises the sealing layer 301 may be provided during the process of dicing the wafer and may be configured so that it can be retained on an individual die after a dicing to provide the sealing iayer. This can reduce Itie number of processing steps redoirwd to form the package 300. In some embodiments therefore ttie fabrication of a packsg® according to an embodiment of the present invention may start with taking an integrated circuit die with a seaiing layer such as illustrated in figures 3b and 3c.

Whatever material is used for the second package cover, i.e. sealing layer 301. in the embodiment illustrated in figure 3a the cavity 205 in the substrate die provides a volume, for example a back-volume, for the transducer dsifined by ttie cavity 205, The sealing layer 301 thus encloses ihe back volume 20S and provides a stable acoustic environment for the eiectroda membrana of the transducer 202 to vibrate. The sealing layer 301 has an area which Is sufficient to cover the opening of the cavity 205 In the lower surlace of the substrate die 201. In some ernbodimefus the footprint of the sealing layer 301 is not substantially greater than the footprint of the integrated circuit die 200 - although in some embodiments, especially where ti^e sealing layer Is PCB or the like, the sealing layer may be arranged to extend beyond the edges of the integrated circuit die 200. .As mentioned other materials may be used to provide the sealing layer 301, whether in additional to or as ari alternative to DAF. For example the sealing layer may comprise one or more of silicon and/or some other semiconductor, PCB, ceramic, laminate and/or plastic material,

Referring back to figure 3a the package 3Q0 further comprises a package substrate 302. The package substrate 302 overlies the transducer 202 and a surface of the package substrate (the upper surface 303 as Illustrated in figure 3a) forms an outer surface of the package 300. The package substrate thus forma the first package cover. The package substrate may be forftigd from any suitable material such as PCB or the (ike.

As used herein the term package substrate shall refer to a pari of the package to which the integrated circuit die 200 Is electrlcaiiy connected for the transfer of signals and/or power for operation of the transducer. The package substrate will therefore Itself typically have eiectrical connections for connecting the package, and thus the trrinsducer and electronic circuitry, to external drcuitp/, for example to a PCB of a tiost device say.

The package substrate 302 thus forms part of the outer surface of the package, i.e, the first ^ckege cover. In embodiments of the preserd inverstiori however the Integrated circuit die 200 iiseif also forms part of the outer surface of the package, in pariicular part of a side waii of the package.

As can be seen in figure 3a, the sidewaSi of the package 300 is predominantly formed from the die substrate 201 which forms part of the integrated circuit die 200. Therefore, in this embodiment, the overall footprint of the microphone package 300 can be the same as the footprint of the integrated circuit die 200, In other words the footprini of the package substrate 302, i,e. the total area of the package in plan view, may be subsiantialiy the same as and/or substantially no greater than the footprint of the integrated circuit die 200. This results in a package having a relatively very small footprint which can be advantageous in many applications. A small package will require less space in a device. Packages according to embodiments of the present invention also avoid tfie cost associated with a separate sidewall structure such as required with conventional package.s.

The package thus comprises the integrated circuit die 200 located between the package substrate 302 and the second package cover formed by die sealing layer 301. In en'ibodiments of the Invention the package substrate is not directly coupled to the second package cover as In the conventional approach but only via the die substrate 201,

It win be appreciated that in some embodiments the package substrate 302 and/or sealing layer 301 may extend beyond ttie edges of the integrated circuit die 200, However, even in these cases, a cross section of the package 300 will have an area of substantially the same size as the area of a cross section of the integrated die 200. in some embodiments the footprint of the package substrate 302 and/or sealing layer 301 may be greater than the footprint of the integrated circuit die 200 bLti the overall footprint of the package may still be relatively small, and smaller there wouid be achievable for a conventional package. For instance the footprint of the package may be no greater than 20% of the footprint of the Integrated circuit die having the MEMS transducer, in some embodiments the footprint of the package may be no greater than 15% or no greater than 10% or no greater than 5% of the footp.nnt of the integrated circuit die. !π Oie embodimerit iliustrated in figure 3a a first barrier 304 is provided between the package substrate 302 arid the upper surface 204 of the integrated circuit die. The first barrier 304 surrounds the transducer 202 and defines, together with the package substrate 302, a volume on the upper side of the MEMS transducer which forms at least part of a front volume Ibr the transducer and provides an environmental banler. The package substrate tfius may have an aperture 305 providing a sound port for the MEMS transducer, the aperture being located within the penmeier of the first barrier 304. It can be seen frorri figure 3a that the first barrier 304 may provide a barrier between ttie volume above the transducer region and the area above the electronic circuitry 203 and/or may pro^de itself part of the side waH of the package 300. The barrier 304 may conveniently comprise a layer of adhesive material wtiich may, for instance be deposited, for instance using various printing techniques, in a desired location on ti'.e first integrated circuit die and/or the inside surface of the package substrate 302. Figure 3d iiluslrates a perspective view of the inner surface of the package substrate 3C2 and illustrates that the first barrier 304 may be printed in a desired iocaUon on the package substrate 304 before bonding the package substrate to the integrated circuit die 200. Examples of suitable adhesive comprise, for example Epoxy, Silicone, Polyurethane, Acrylate, and/or Acrylic or composiiioi?s thereof.

The integrated circuit die is attached to the package substrate 302 and, as mentioned above, is electricaliy connected to the package substrate 302 to allow for operation of the transducer 202. In the embodiment illustrated in figure 3a the integrated circuit die 200 is bonded to the package substrate 302 by one or bump bonds 306, although any other suitable type of bond may be used. Figure 3e iliusiraies ifsai one or more bails of suitable material for bump bonding may be deposited on contact pads on tiie integrated circuit die 200. it will of course be appreciated that material may additionally or alternatively be provided on inner contacts 307 of the package substrate 302.

The bump bonds connect the electronic circuitry 203 of the integrated circuit die to inner eiectrica) connections 307, e.g. bump bond pads, on the inside surface of the package substrate 302. The Inner electrical connections may be electrically coupled to package eiectrioaS contacts 308 on the outer surface of the package 300, for instance by Vlas 309 through the package substt-ate. The package electrical contacts 309 allow for ihe package ίο be electricaiiy connected \n a host device for eisctrioa! connection with the ©isctronsc circuitry 203 and/or transducer 202 within the package 300.

In this embccliment, a ground plane 310 is provided within the package substrate 302, The ground plane, 'which may be a metaiiic or other conduotive iaye- may be configured to provide shielding against eiectromagnetic interference (EMi), The ground plarse may be cormeoted to a ground contact 311 for grounding in use. in some embodirrsents the ground plane 31Q may itself be eiectricaiiy conriecied to the Integrated circuit d-e 200 Uirough a bump bond 306 for conr?ection witb one or more EMI shielding layers vvithin the integrated circuit die as will be described in more detail later, in some embodiments a sealing ring 312 may be provided on the upper surface 303 ot the package substrate 302 surrounding the ape?lure, e.g, sound port 305. For example If the package 300 is flip chip bonded onto a mother board or similar, a hole in the motherboard wouid be provided which would substantially i:ne up with the aperture 305 in the package substrate 303. The seeling ring 312, which rrsay be e meteilzed ring, i,e. a metaiized annular bond pad, may be provided to aid in forming an acoustic channei in an assembled host device. For distance the package in use may be attached to a motherboard having an aperture for an acoustic channel. The provision of an aosustic sealing ring 312 can aid In forming an acoustic channel from within the package 300 to the other side of the motherboard.

Note that in some embodiments an environmental barrier 313 which Is substantially acousticelly transparent may be located across the aperture 305. This environmental barrier 313 may, for example, comprise a waterproof gauze or liie like forming a waterproof membrane across the port to prevent moisture from entering Into the first volume formed between the package substrate and the die substrate 201.

The waterproof gauae 313 may be screen-printed onto the package substrate, eltfier on the inside surface - in whidt case it could be printed on an appropriate part of the inner surface of the package substrate. In one embodirTient the waterproof membrane may be formed on or attached to the Inner surface of the package substrate, for example by printing, to cover the aperture 305, as part of a printing process together with adhesive barrier 3tM, 5n other embodimeiits however the waterproof membrane may additionaiiy or aiternatively be formed on or attached to the outer surface of the package substrate, in Vtihich case the seal ring 312 may be provided orr top of at ieasi one environmental membrane Sayer, it would of course also be possible to use a muitllayer package substrate wtiere at least one envirorrirrervial barrier layer is provided as an intermediate layer across the sound port aperture.

In some embodiments a second banter layer Is formed to protect and isolate toe region of the electronic circuitry from the environment, in toe embcdiment litustrated In figure 3a a filler layer of material 314 is provided betw'een the package substrate and at least part of ttie electronic clrcultryof the integrated circuit die. This material could be backfilled into the gap betvreen the package substrate and the Integrated circuit die after bonding of the package substrate to the integrated circuit die. Alternatively a barrier layer similar to Itie barrier layer 304, and which could comprise the same and be deposited at toe same material as the barrier layer 304, could be provided to surround the area of Ibe electronic circuitry. In order to protect the electronic circuitry 203 from the presence of the barrier 304 or filler material 314 a passifylng layer or the iike could be located over at least some of the electrical drcuitry. The filler materia! 314 may be the same or similar material to that forming the barrier layer 304 or any suitable materia! that can protect the underlying circuitry, for' example the filler material may comprise at least one of Epoxy, Silicone, Polyurethane, Aoylate and/or Acrylic or compositions thereof.

Figure 3f iilustrates a three dimensional view of the MEMS transducer package 300 where the layer of filler material 314 has been omitted for clarity.

As mentioned above embodintonts of the invention therefore provide packages for MEMS transducers, and especially to MEivIS transducers on integrated circuit dies with Integrated eieclronics, where the integrated circuit die forms part of the outer surface of the package. The package provides environmental protection as with conventional packages but Ihe footprint of the package is much reduced compared to conventiona! packages. In addition the package may save on materials and the method of fabricating the package may require fewer steps than for conventional packages.

As itientioned therefore the size and shape of the package itiay be at least partly deHned by the iiUegratsd circuit die, which may be itself at least partly dictated by iha arrangement of the transducer and integrated electronic circuitry on the die. One skilled In the art. will appreciated that there are rmany different ways in which elactmnic circuitry may be formed on a die together vdth aJylEiylS transducer, Figures 4a and 4fo Hlustrate two examples and iliustrate aitemats plan views of tiie upper sudace of the integrated circuit die iliustrated In figure 2,

Figure 4a illustrates an example of a die 200 where ttie transducer 202 is formed towards one side of the die and the electronic circuitry 203 Is fomsed in a region towards an opposite side of the die, with electrical interconnects {not shown) connecting the electrodes of the transducer to appropriate parts of the circuitry. In other words the electronic circuitry 203 is subslantiaily aii located on one side of the transducer. Formed in Ihe electronic circuitry region are pads or ferminats for formirig the bump bonds 306 vrith the package substrate, in the example iilusb'ated in figure 4a aii of the burrep bonds 305 are formed towards one end of the die substrate 201. This can have advantages in terms of stress performance of the package. Referring back to figure 3a it can be seen that the die substrate 201 is attached to the package substrate by bump bonds 306 and by adhesive barrier iayer 304 and possibly by filler material 314, The bump bonds 306 form relatively rigid bonds between the die substrate 201 arid the package substrate 302, whereas toe adhesive barrier iayer 304 may have a degree of ^exibility. In some embodiments the die substrate 201 may comprise different m3terial(s) to the package substrate 302 and thus may have a different thermal coefficient of expansion. By locating the relatively inflexible bump bonds 306 al one end of ttie integrated circuit die this means that the other end is not constrained from expanding or contracting by bump bonding to the package substrate which nsay help reduce stress in the package in use. This means that the other end of the substrate 201 can expand and contract freely under different temperatures and pressures reducing any stress on the bump bonding 306

In some embodiments therefore ail the bump bonds 306 may be formed within a region towards one end of the integrated circuit die 200. For example the bump bonds may ail be located so that that each bump bond is located a distance from a first edge of the die which is no greater than 25% or 15% or 10% of the distance from the first edge to the opposite edge of the die substrete 201 (e.g, the width of the die). If the die is substantially rectangular in shape the first edge may be one of the short edges. In some embodiments, where there are at least three bump bonds, the bump bonds may be arranged to lie in a straight line so that any constraint on the expansion/contractlon of the die substrate 201 applies In one direction only. However in some embodiments it may be preferred to arrange the bump bonds so that not ail the borsds lie ifi a straigtit line, in figure 4a three bump bonds 306 are shown. As mentioned these may be located to lie in a straight line, i.e, when the middie bond, defined by an appropriate terminai/contact pad/solder bail etc. is in the position illustrated by 401a, or in any other desired configuration, for example when ttre middle is in the position iliustraied 401b,

In some embodiments tiowever it may be desirable to have bump bonds between the integrated circuit die and package substrate at two sides of the integrated circuit die to give the package a degree of structural stability. In some embodiments therefore there may be at least some bump bonding towards a first side of the integrated circuit die 200 and also some bump bonding towards a second opposite side. At least some of the bump bonding on one side could, in some embodiments, be purely for structural reasoris and may not make an eiectrical conrsection. it would be possible to locate a bump bond remotely from the electronic circuib^' region and connect toe bond pad to the circuitry by suitable connections. However in some embodiments the eiectocal circuitry 203 could be located in more ttian one defined region orr the Integrated circuit substrate 2D1. Figure 4b illustrates one example where there are two sections of electrical circuitry 203 on either side of the transducer 202. These sections of eiectrical circuitry 203 may be electrically connected together or may be separate, in this example there are bump bonds 306 located wlthlr? both sections of electrical circuitry 203, In this embodiment the barrier layer 304 surrounding the transduc,ar 202 would thus be located towards the centre of the package substrate. There may also be through vias on both ends of the package substrate for connecting to the bump bonding 306 on both secfions of the eiectrical circustry 203.

It wli! be appreciated that in the example illustrated In both figures 4a and 4b a greater or fewer number of bump bonds 306 could be present, it wil! aiso be appreciated, as will be described later, that there may be more than one transducer formed on the integrated circuit die and,tor that the shape of the integrated circuit die may also vary.

Whilst the embodiments described atxjve are particulariy reievarU to packing an integrated circuit die comprising at least one MEMS transducer and Integrated eiectfonic circuitry, the same principles can be applied to packaging of dies comprisifig just one or more MEMS transducers without any associated electronic circuitry.

Embodiments of die present invention also relate to packages that include a first integrated circuit die on which is formed a MEMS transducer in a package with a sercond integrated circuit die. The second integrated circuit die may comprise additional circuitry.

Figure 5a illustrates a package 500 according to an embodiment of the invention. The first integrated circuit die 200 is bofided to a package substrate 501 forming a first package cover in a similar fashion to fte embodiments deiscribed above. In this embodiment however the package substrate 501 comprises a support layer 502 and a second integrated circuit die 503.

Figure 5b iiUjstrales a cross section of the package substrate 501, The second integrated circuit die 503 may comprise electronic circuitry for operation of the transducer on the first integrated circuit die 200 and may work with or complement the electronic circuitry on the first irriegrated circuit die 200. For example if the MEMS transducer 202 is a MEMS microphone the eiectronio circuitry 203 integrated on the first integrated circuit die 2Q0 may comprise some analogue eiecbonics for reed-out of the MEMS microphone, a.g, low noise amplifier or pre-amplifier or the like. As one skiiied in the art will appreciate the signals from MEMS sense transducers such as microphones a.m typically very smell signals and It can be advantageous to integrate an amplifier with the transducer to avoid unwanted capadtences due to bond pads and the iike which can adversely affect the signal to noise ratio. The second integrated circuit die may comprise electronic circuifry for processing the amplified signal from the first Integrated circuit die and may for instance coniprise at least some digifa! electronic circuitry. By providing two integrated circuit dies in the passage the circuitry on each die can be optimised for a given purpose. For example the circuitry on the first integrated circuit die may be formed using a different manufacturing process node to the second integrated circuit die, i.e. a different type of semiconductor processing with a different minimum feature size. For example a 65nm, or lower, process may be suitable for forming dlgita! Cifcoitry but may not be suited or coat effective for the required analogue circuitry, in erribodlments of the present invention the analogue circuitry on the first integrated oirouit die can be formed using a suitable process for analogue circuitry and the digila! circuitry on the second integrated circuit die can be formed using a suitable process for digital circuitry. Typically the digital circuitry will have a iower process node, i.e, gate length (W/L), than the analogue circuitry. It will of course be appreciated ttiat ttie first integrated circuit die may addtilonaily comprise some digital circuitry and the on the second integrated circuit die may addltlonaily or alternative comprise analogue circuitry, in sonre embodiments the second Integrated die may be an ultra thin integrated circuit die, Uitratbin semiconductor processing is a known technology.

The second irMegrated circuit die is attached to a support iayer 502 of the package substrate 501 within the package. An outer surface of the support iayer 501 thus forms the top surface of the package on which the terminal pads 308 and acoustic sealing ring 312 are disposed. Inner contact 307 for bump bonding may then be provided on the surface of the secorid irstegrated die 503. The second integrated die 503 may be wire-bonded 504 to the support iayer 502 of package substrate. Vlas In the support layer may connect the circuitry of the second integrated circuit die to outer package contacts 308. The support layer may be any suitable materiai such as RGB, a plastic material, a semiconductor iayer etc.

As described above a barrier layer 304, e.g, of a suitable adhesive, r?iay be provided to surround the transducer, in this embodiirent, the barrier 304 may be provided with the wire-bonding S04 contained within its perimeter. It may therefore be formed at least partiaiiy on the second integrated circuit die 503. The digilal electronics of tiie second integrated circuit die 503 may therefore be protected by a passivation iayer. Again the barrier iayer may be deposited, e.g. by printing techniques, on the package substrate prior to bonding the package substrate to the first integrated circuit die 200, Figure 5o iiiustrales a perspective view of the package substrate with deposited barrier iayer, Additionaily or aiternatively the barrier 304 could be deposited on tfie first integrated circuit die, it viould also be possible for the whole of the second irnegrated circuit die. and the wire bonding, to fail outside of tt'.e cavity defined by the barrier 304,

Additionally other connection techniques, such as using vias through the second integrated circuit die 503 couid be used to conriect to ttie support layer 502.

Again there may be a layer of filSer material disposed between the package substrate and ttie first iritegrated circuit die outside of the barrier 304, which in the embodiment would be located between the first and second integrated circuit dies 200 and 503. Alternativeiy, as shown in figure 5a a second barrier layer 505 is provided around the peripherally of the package, i.e. the periphery of the fij-st integrated circuit die and/or package substrate outside the transducer barrier layer 304.

It will be appreciated ttiat in this embodiment the second integrated circuit die 503 of the package substrate 501 at least partly overiies the first integrated circuit die. In some embodiments the whole of the second integrated circuit die may overlie the first integrated circuit die such that the footprint of the package may again be defined by the footprint of the first integrated circuit die. in this embodiment where the sound port is for.med in the package substrate 501 the second integrated circuit die may be smaller than the first integrated circuit die so that the sound port is formed in the support iayer 502. In the embodiment iilustrateo in figure 5a part of the second integrated circuit die also forms pari of the outer surface of the package, forming part of the sidewatis of the package on one side of the package. Figure 5d iilustrstes a perspective view of the package of figure 5a, A ground pane similar to that shown Irs figure 3a may be provided in the package substrate support layer 502.

Figure 6a iliustraies an alternative MEMS transducer package 600 according to an embodiment of the invention. The embodiment of figure 6a is similar to that described w'ith reference to figure 5a and again the package substrate (which forms the first package cover) comprises a support layer 502 and a secorid integrated circuit die 503. In ttie embodiment of fsgure 6a however the first integrated circuit die substrate 201 is bunsp bonded to the support layer 502. The second integrated circuit die may be electrically connected to ttie support layer via wire-bonding 504 or any suitable electrical connection. Figure 6b illustrates a perspective view of the package substrate in this embodiment, it veil be appreciated that In this embodiment there is an area of support layer 502 which Is not covered by the second integrated circuit die 503 \fttiich, ir? use. overlies pari of the electronic circuitry 203 on the first integrated circuit die 200.

As with figure 3a. it will be appreciated that the package substi^ta 501 and/or cover 3Q1 couid extend beyond the edges of the integrated circuit dia 200.

Figure 7 iiiuslrates MEMS frasisducer package 700 according to a further embodiment of the inventions. in this embodlsnent a second integrated circijit die 503 Is prowded. which overlies the wfioie of ti'e irartsducer region of the fs.i^t integrated circuit die. Hence, the aperture 305 which forms the sound port is formed in tfie second irttagrated circuit die 503,. in this smbodimeni, if the secorsd integrated circuit die 503 has aufficieot structural iitiegrity, the second integrated circuit die may provide the package substrate without the need for an additional supporting layer 502, In such an embodiment the top outer surface of the package may be provided by a surface of the second integrated circuit die 503 and it is the second Integrated circuit die that forms the package substrate and acts as the first package cover. The barrier 304 around the transducer 202 is thus iocated between the first and second integrated circuit dies 200 arid 503.

The second integrated circuit die may also extend over the electrical circuitry 203 on Uie first integrated circuit die and be bump bonded thereto be bump bonds 306. Vlas through the second Integrated circuit die may provide connections to outer eiectricai connections of the package (not shown in figure 7). The second integrated circuit die may comprise a conducting layer to act as a ground plane. in other embodiments, particularly if the second Integrated circuii die 503 is ultra thin and unable to provide the required supivod on Its own. a sunoort layer 502 friay also be provided which can support at least a poriion of the second integrated circuit die 503 as described above, in this case the aperture 305 will pass through both the support layer 502 and the second integrated circuit die 503.

In embodiments havirig a support, layer the sesond integraied drculi may not extend over all of the hrst Integrated circuit die and the bump bonding may be directly to the support layer 502 as discussed above in relation to Isgure 6a.

In the embodirnerris described above the inti^rated circuit die 200 is effectively flip-chip bonded to the package substrate 302/501. Generally this means that the voiume formed on one side of the transducer between the surface of ttie die substrate 201 arid the package substrate is not very large. In the embodiments described above therefore this volume is formed as part of the front voiume and the sound port is formed In the package substrate. This voiume between the package substrate and the integrated circuit die is thus in acoustic communication with a volume outside of the package so that acceptable acoustic performance can be achieved. The volume on the other side of the transducer, i.e. formed at least partly by the cavity 205 in foe die substrate 201, Is typically a larger volume due to the fact that the cavihy extends, from the transducer, ail the way through the die sSubstrate 201 and, as mentioned, may have a cross seciionaS area that increases through the die substrate 201. Thus the cavity 205 rTiay be of sufficient size to act as a satisfactory back-volume. Such embodiments, vrhere the sound port is formed in the package substrate, may sometimes be referred to as being a bottom port arrangement. Typically the package substrate is used to connect to further components, such as e PCB of a host, device, it would however be possible lo use a Hrst package cover that comprises a package substrate with at least one spacer layer such that the volume between foe package substrate 302.^501 arfo the Irnegrated circuit die 200 in the region of the trarisducer Is large enough to function as a sa^sfactory bad^-voluma, as illustrated in figure 8.

Figure 8 shows a package 800 wherein the integrated circuit die 200 is bonded to a package substrate 302 that includes a reialively thick spacer layer SOI In itie vicinity of the electronic circuitry 2Q3 but which dees rict extend over the transducer 2Q2, and a further outer layer 802 which extends across the whole area of the package. The spacer layer 801 may cornprise an integrated circuU die such as described above with reference to figures 5 and 6 and/or may coniprise one or more layer of materials susti as PCB or foe like. This may result in extending the overall height of foe package compared to the ernbodlnrents without such a spacer layer but it will be noted that the spacer layer is connected ίο the integrated circuit die 200 and the footprint of the package can stiil be defined by the footprint of the integrated circuit die 200.

The integrated circuit die 200 may be bump bonded to the spacer iayer of the package substrate, which may be eiectricaiiy connected to the outer ieyer 802 for connecting to the eiectrical connections 308 for the package,

Ttie package substrate may be substantlaiiy seaied, i.e, there is no aperture in the package substrate iayer 802, The cavity 803 between the package substrate 302 and the integrated circuit die 200 may thus be substantiaily seaied from the outside of the package. The sound port may then be formed by aperture 305 being formed in the sealing iayer 301. This provides a top*port embodiment with flip-chip bonding of the integrated circuit die 200 to the package substrate 302, in this embodiment the sealing layer 301 may comprise a material such as PCB, ceramic or a semiconductor later or the like and may be provided with sea! ring 312, in some embodiments the cavity 205 in the die substrate 201 may be arranged as back volume in use, but the cavity 205 may be sealed by the package substrate as illustrated in figure 9. In other words the package substrate may be used as the second package cover. Figure 9 shows a package 900 vvtiere the aeallrsg layer 301 is provided as the first package cover on ttie upper side of the integrated circuit die 200. The sealing iayer, which may for instance comprise PCB or the like, may be attached to the upper surface of the integrated circuit die substrate 201 by adhesive barrier layers 304 and 505 as described previously. An aperture 305 Ir; the seating layer 301 provides the sound port. Thus the volume formed between tfse upper surface of the integrated circuit die 200 and the sealing layer may be relatively small as this cavity Is acoustlcaliy coupled to a volume outside of the package.

The package substrate in this errsbodiment is connected to the lower side of the integrated circuit die 200 to form the second package cover. The package substrate thus seals cavity 205 to provide a back-volume in use. To provide an electrical connection between the circuitry 203 of the integrated circuit die and the package substrate 302 vias OOlmay be formed through the integrated circuit die substrate 201. Such vias, viitiich may be through-siiicon vias (TSVs), could, for instance, be formed when perforniing the deep etch to fomn cavity 205, The vias may terminate at the lower end wltii feall-diops and/or euteiic pads of the like suitable for connection to the package substrate. The package substrate may therefore be bump-bonded or similar to the underside of the integrated circuit die 200 and an adhesive layer S02, which may e simiiar to layer 304, may be used to adhere the package substrate to the integrated drcuit die 200 and seai the cavity 205, This aliows for a top port embodiment without the need for a spacer layer on the upper side of the integrated circuit die,

Again it should be noted that the term upper surface is used in relation to the integrated circuit die 200 with regard to the sudace of the die on/ln which the transducer 202 and electronic circuitry 203 are fabricated and no particuiar orientation of the transducer die 201 during any fabrication step- and/or it orientation in any package, or indeed the orientation of the package in any apparatus in implied by this term. The term lower suitace tiius refers to the opposite surface of the die substrate 201.. in the embodiments described above the sealing layer 301 may be a subslaiiOally planar layer, it wiii be appreciated however that the sealing layer could form pari of a cover having a recess formed therein to expand the stee of the front or back volume in use. For example the scaling layer 301 could comprise a spacer layer around the periphery of the sealing iayer, in a simiiar manner as described above wth reference to the package substrate of figure 8,

As mentioned previousiy in embodiments of the present invention part of the outer surface of the package may be formed by the integrated circuit die 200, In conventional packages the integrated circuit die is housed in an enclosure formed by a separate structure and the housing can be designed to protect tfse integrated circuit not only from moisture, dust and other possible environmental contaminants but also from unwanted interference, in particular the conventional housing can shieid the integrated circuit die from electromagnetic interference and/or can shieid the sensitive electronic sirculiry from iigtit. As will be understood by one skilled m tt^e art the electfonic circuitry should ideally bo substantlaiiy shielded top prevent photons from reaching the circuitry and potentially resulting in erro.f's in operation.

In some smbodiiiients ths packages described above may therefore be provided with one or more conformal ooeting layers on the oulslde of l.he package to provide light and/or EMI shielding. For example a metallic layer on or within a base layer such as a polyomr layer may be coated on the outside of the packages discussed above, A relatsveiy thin coating layer may be used such that the footprint of the package may stiil be substantially defined by tt?e footpnnt of the integrated circuit die. in some embodiments however at least one stiield structure may be fonned within the integrated circuit die 200 itself, in some embodiments the shield structure may comprise at least part of seal ring structure, such as a CfvlOS seal ring. it Is known In the fabrication of integrated circuits, such as In CMOS processing, k form a structure known as a seal ring around the circuit components. The seai ring strur;ture Is fomied during fabrication of the electronic circuitry and typically comprises a series of overlapping regions of metallisation connected by vies. Figure 10a illustrates a conventional seal ring structure. The left hand side of figure 10a illustrates that a seal ring structure 1001 may be formed in a region between the electronic circuitry 203 and a peripheral region 1002 of the die, wfiere scribe lines for dicing may be formed iri the wafer before didng. The seal ring structure comprises various layers of metal 1003 connected by vies 1004 in the inter'-meta! dieiectric 1005. Tfie lower part of the seal ring structure may be connected to a p well 1006 with the areas outside of the seal ring being Held oxide 1007.

The seal ring structure is topically provided to surround the region of active circuitry and Is located between the active circuitry and scribe lanes used for dicing vyafers into individual dies. The sea! ring structure serves to keep the various layer of the iritegraled circuit together and helps prevent detamination of the various inter-fTietal dielectric layers during a dicing process. in embodiments of the present Invention a seal-ring like structure Is provided to provide light andfer EM! shielding for the Integrated circuit die in a package according to embodiments of the present Invention. Such a structure could be in addition to a conventional seal-ring structure but in some embodiments the seal-rind structure may be configured to provide shielding in additlot^ to preventing delanrination during dicing. in embodiments of the invention therefore a shieid structure may be formed using conventional processing steps, thus avoiding the ned for any substantial additionai process steps.

The conventionai seai ring structure shown in figure I0s is not grounded and provides limited, if any, EMI shielding. Also the seai siring structure does not act to block light from passing through the dielectric material into Ujc ssrisitive electronic areas. The right hand side oi figure 10a illustrates in plan view hwo typical arrangements of the vias 1004 viewed from the direction indicated by arrow 1G0S, i.e. a direction which -s perpendicular to the normal to the surface of the integrated circuit die..

In embodiments of the Invention the seai ring slruoture is modified from the conventional arrangement to provide EMI shielding and/or light shielding. Figure 10b illustrates a portion of integrated circuit die 200 f^aving a shield structure based on a seal-ring according to an embodiment of the invention. The shieid structure is formed in a first region 1001 which may be arranged to at least partly sumound ttie serrsitlve areas, such as the region of electronic circuitry 203. The shieid structure comprises, in a first direction perpendicular to the upper sotface of integrated circuit die, a plurality of metallic layers 1003 conrtected by conductive vias 1004. in embodiments of the present invention the metelilc layers end vies may be arranged so as to provide substantial light shielding, a.g. to block a substantial portion of any light from passing to the sensitive circuit areas. The metaiiic layers and vias rrsay be arranged suets tiiat substantially any path crossing through the shieid structure irs a direction perpendicular to the first direction passes Uirough at least one or said metallic layers and/or ογ:ο of said vias. Thus the vias may be arranged such that the majority of paths through the shieid structure in a side~on direction, i,e. perperidicuiar to the (global) normal to the surface of the die, will encounter at least metallic layer or via. In other words the straight line paths for light to get into the sensitive areas are substantially blocked.

For exampie the vias may be formed as exteitoed vias witii a relative offset between vias such that, when viewed from the direction 1008, a continuous area of metai/vias is perceived. Additionally or alternatively at least some of the via may be arranged as continuous walls.

Additionally or alternatively a contact 1009 may ba provided to alio'vV for tha saai ring to be electncaliy connected to a ground plane or ground contact. As illuetrated in figure IQb the contact may be at the upper surface of the die substrate 201 but in some embodiments there may addltioneily or alternatively by a ground contact at the ioivor aide of the die substrate 201, Typically the seal ring structure is formed only in the CMOS layers of the die substrate and does not extend ail the way through the die substrate but a through-silicon via could be provided to connect to a ground terminal.

The ground contact 10D9 may, in use, be connected to a metal layer that overlies the circuitry region 203 to provide an upper EMI shield. Additionally or alternatively the ground contact could be connected to a ground plane in the package substrate {or cover layer depending on the embodiment}. The lower part of the seal ring structure may be connected to a ground plane mMn the silicon substrate, e.g. a well region 1007. A grouiid plane could extend through the die substrate under the circuitry region.

In this way the CMOS seal ring structure may be used to provide mechanical strength to the circuitry to help prevent deiamlnetion as is known in the art but may also provide EMI stileidirsg amVor ligtil shieldir^g. Thus the CMOS seal ring may have a dual functionality in shielding from EMI and light, or In other words, a combined shielding effect for protection against electromagnetic radiation from a plurality of different band'widths in the electromagnetic spectrum.

As discussed previously the Integrated circuit die comprising the MEMS transducer may comprise more than one M£MS transducer. Figures 11 ~ lid lllusirate example of various integrated circuit dies that could be packaged in embodiment of the present invention.

Figure 11a Illustrates a plan view of one example of an integrated circuit die 200. to this enibodimeot two transducers 1101 and 1102 are provided with electrical circuitry 1103 disposed between them. This electrical circuitry 1103 may be either shared or separate electrical circuitry. The electrical circuitry rttay be analogue or digital.

Figure 111s iliusirates a plan view of another example of an integrated drcolt die 200. !n this embodiment four transducers 1104,1105.11G6 arsd 1107 are provided with eieclricai cifcuitry 1108. Again this eiectricai circuitry may be individual circuitry for each transducer, or a shared eiectricai circuitry. The elecihca! circuitry may be arsalogue or digital.

Figure 11c liiuslraies a plan view of a further example of an integrated circuit die 200.

In this embodiment two transducers 1109 and 1110 are provided with electrical circuitry 1111 to one side of the die substrate 201. This embodiment couid be easily combined with tise embodiment described with respect to figure 4a wherein any bump bonding is contained within a certain proportion of one end of the die substrate 201. Again, the electrical circuitry 1111 may be individual eiectricai circuitry for each transducer, or shared eieclricai circuitry.

Figure lid iiiustrales a plan view of the inlegratad circuit die 2G0. in this embodiment 4 transducers 1112-1115 are provided with eiectricai circuitry 1116 to one side of the subsb’ete 201. in this embodiment the four transducers are dlifereni types of transducers, tor example an absolute pressure sensor, a microphone, an ultrasonic sensor and an accelerometer, although it will be appreciated that other types of transducers or any other combination of transducers couid be used.

It wiil be appreciated that any of the embodiments with multiple transducers, including those not directly illustrated, couid be implemented with atry of the embodiments describing the full MEiyiS package that have been illustrated thus far, albeit with certain niodifications such as providing separate barriers for each transducer.

Embodiments of the present Invention are particularly appilcabie to packing for MEMS sensor transducers, especially capacitive transducers such as MEMS microphones. It will also be appreciated that other types of MEMS capacitive sensors could be Implemented, for example accelerometers, pressure sensors, proxknsiy sensors orfiow meters.

Embodiments may be implemented in a host device, especially a portable and/or battery powered host device such as a mobile telephone, and audio player, a video player, a PDA, a mobile computing platform such as a laptop computer or iaPlet and/or 3 games device for exer?mla or In ari accesaorv^ device, such a headset, earbuci (possibly noise-cancelling), of microphone assembly, designed for wired, or wireless connection with such host devIcOsS , possibly vte multi-wire cables, muiti-poie jacks, or optical fibres and connectors.

It should be noted that tfre ebove-nrerstiorsed ernbod-oients iltustrate rail-e?· than ilrnli. the Invention, and that those skilled in the art will be able to design many alternative embodiments without departing from the scope of the appended claims. The word ''comprising'' does not exclude the presence of elements or steps other thars those listed in a claim, ns" or ”arf’ does not exclude a plurality, and a single feature or other unit may fulfil the functions of severel ursts recited irt the claims. Any referance numerals or labels In the claims shall not be construed so as to limit their scope.

Claims

1. A MEMS transducer package coniprising an Integrated circuit die, the first iiUegrated circuit dia comprising; an integrated MEMS transducer; integrated electronic circuitry for operation of the MEMS trensducsr; a first package cover which overiisa l\m MEMS trensducer, wherein at i<::aaL pari of the outer sunaoe of the MEMS transducer package is formed by the fii sl package cover; and a barrier provided around the MEMS transducer, the first integrated circuit die, the barrier and the first package cover defining a first volume above the MEMS transducer, wherein the barrier extends between smd first voluirie and the area above the electronic circuitry, and wherein at least part of the outer surface of the MEMS transducer package is formed by the integrated circuit die.

2. A MEMS transducer package as claimed in daim1, wherein the barrier comprises a layer of an adhesive material,

3. A MEMS transducer package as ciaimed in claim 1 wherein the first package cover comprises an aperture.

4. A MEMS transducer package as claimed in claim 3 further comprising a seaiing ring on the outer surface of the first package cover surrounding the aperture.

5. A MEMS transducer package as claimed in claim 3 or claim 4 further comprising a water-resistant membrane disposed across said aperture,

6. A MEMS transducer package as claimed sn any preceding claim comprising a package substrate which Is electricaliy connected to the first integrated circuit die.

7. A MEMS trarssducer package as claimed in claim β wherein the package substrate is bonded to tha elactronic circuitry of the first integrated circuit die via at least one bump bond. B. A MEMS transducer package as claimed In dasn 7 Vs'herein the package substrate is bonded to the electronic circuitry of the first integrated circuit die via a plurality of bump bonds, and each of said bump bonds is located within a region located towards one end of the first integrated circuit die

9, A MEtvtS trarssducer package as claimed ir? any one of claims 6 ~ 8 wherein the package substrate cornpnses a ground plane,

10- A ME MS transducer package as dairned irs any one of claims 6 ™ 9 wherein the Host package cover comprises the package substrate. i 1 A MEMS transducer package as ciained in claim 10 wherein the package substrate comprises a second integrated circuit die which at least partlaiiy overlies tl'se first integrated circuit die.

12. .A MEMS transducer package as claimed in claim 11 wherein said first integrated circuit die comprises analogue circuitry arsd said second integrated circuit die comprises digital circuitry.

13. A MEMS transducer package as claimed in claim 11 or claim 12 wfterein said first integrated circuit die is formed tram a different manufacturing process node to the second integrated circuit die.

14, A MEMS transducer package as claimed in any of claims 11 to 13 wherein said package substrate comprises the second integrated circuit die and a support layer, wherein the secorsd integrated circuit die is attaotred to the support layer and the .support layer forms at least part of the outer surraoe of ttie package.

15, A MEMS transducer package as claimed in ciairri 14 wherein said fir.st integrated circuit die is bump bonded to said support layer, and said second integrated circuit die is eieotrlcaily coririeoted to the support layer.

16, A MEMS transducer package as daimed in any oi' claims 11 to 15 wherein said fsrst integrated drcdi die is bump bonded to said second integrated circuit die.

17, A MEtvtS transducer package as daimed in any one of claims 10-16 mrlher comprising eiectricai contacts on a surface of the package substrate for electricaily connecting to the first integrated circuit die.

18. A klEMS transducer package as daimed in claim 17 wherein the package substrate comprises vias through the package substrate connecting tns etectdcal contacts to it^e electronic circuitry,

19. A k'lEMS transducer package as ciaimed irs any preceding claims comprising a filler layer of material disposed between the first package cover arid at least part of the electronic circuitry o? the first integrated circuit die, 2D, A MEMS trarisducar package as ciaimsd in any preceding claim wherein: the MEMS transducer Is fonvied at a hrst surface of the first integrated circuit die; the first integrated circuit die comprises a cavity whereirs said MEMS transducer at least padJy overlaps with the cavity; arvd the cavity extends through the first Integrated circuit die from the MEMS transducer to an opening at a second surface of the first Integrated circuit die.

21. A MEMS transducer package as daicied in any preceding claim further comprising a second package cover at the second surface of the first integrated circuit die to provide a volume defined by the cavity in the first integrated circuit die. 22 A MEMS transducer package as claimed ir; claim, 21 vyherein the second package cover comprises a sealing layer for seallr^g the cavity in the first integrated circuit die.

23. .A MEMS transducer package as clainiod in claim 22 wherein the sealing layer comprises a die attach film.

24. Λ MEMS transducer package as ctasmed :n any of dairris claim 21 to 23, wherein together the first integrated circuit die, the first package cover and the second package cover forrr? at toast part of a side wait of the package, 2¾. A tvlEMS transducer package as claimed in any of daims claim 21 to 24 when dependent on any of ctaitris 6 to 9 wtierein; the itrst ίίΊίβρίοΙοϋ circuit dies comprises a? least orre via etectrically connected to the Integrated eiectronic circuitry, tt?e at least one via running through the first Integrated die to the second surface; and whereiri the second package cover comprises the package substrate and is electrically connected to said at least one via of the first ir^egrated circuit die at the second surface.

26. A MENS transducer package as claimed in any of claims 20 to 25 wherein the area of \he cavity at the MEMS transducer Is smaller than at the second surface of the first Integrated circuit die,

27. A MEMS transducer package as claimed In any of claims 20 to 26 wherein the cavity extends underrteath the alectrorj-c circuitry,

28. A MEMS transducer package as claimed in any preceding claim wherein at least part of the outer surface of the MEMS transducer package is formed by the integrated circuit die. 29. A. MEMS Ifansducer package as claimed In any preceding claim whereirt the first integrated circuit die comprises a shield structure for at least one of light shielding and EMI shielding,

30. A MEMS trarisducar package as claimed In claim 29 wheram said sfs-eld structure comprises a first area which comprises a plurality of metallic layers spaced in a first direction perpendicular to the surface of the first irstegrated circuit die. said metallic layers being connected ay conductive vias.

31. A MEMS transducer package as dakned in dakn 30 wherein said rnetaliic layers and conductive vies are connected to a ground contact on the suslace of the fsrst integrated circuit die,

32. A MEMS transducer package as ciairned Irs da-fr? 31 wherein said ground contact is connected to a ground contact of the first package cover.

33. A MEMS transducer package as claimed in any of claims 30 to 32 wherein said rneiailic layers artd conductive vias are connected to a ground plane within the first integrated circuit die that underlies at least part of the electronic circuitryc

34. A MEMS transducer package as claimed in any of claims 30 to 33 wherein ttse metalilc layers and conductive vlas are arranged such that substantially any path crossktg through the shield structure -n a direction perpendicular to the first direction passes through at least one or said metallic layers and.for one of said conductive vlas.

35. A MEfvtS transducer package as claimed in any of the precedlrsg claims comprising multiple MEMS transducers on the fsrst integrated circuit die.

36. A MEMS transducer package as clairried in claim 35 wherein at least or^e of .s.aid multiple MEMS transducers is a different type of transducer to at least one other of said multiple MEMS transducers.

37. A MEkiS transducer package as claimed Ir^ amy preceding claim wherein said ME MS transducer is a ME MS microphone.

36. Ars electronic device corripris-ng a ME MS transducer package as claimed in any precedliig ciaim,

39. .An electronic apparatus as claimed in claim 40 wherein said apparatus is at least one of: a portable device; a battery power dev-ce: a computing device; a communications device; a gaming dev-ce; a mobile telephone; a personal media player; a laptop, tablet or notebook computing device.