GB2529887B - Antenna impedance matching circuit tuning system - Google Patents

Antenna impedance matching circuit tuning system Download PDF

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Publication number
GB2529887B
GB2529887B GB1415784.6A GB201415784A GB2529887B GB 2529887 B GB2529887 B GB 2529887B GB 201415784 A GB201415784 A GB 201415784A GB 2529887 B GB2529887 B GB 2529887B
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Prior art keywords
impedance matching
matching circuit
circuit
connected
transceiver
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GB2529887A (en
GB201415784D0 (en
Inventor
Hu Sampson
Gao Xiang
Wang Zhengpeng
Thind Surinder
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Smart Antenna Tech Ltd
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Smart Antenna Tech Ltd
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Classifications

    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01QANTENNAS, i.e. RADIO AERIALS
    • H01Q1/00Details of, or arrangements associated with, antennas
    • H01Q1/12Supports; Mounting means
    • H01Q1/22Supports; Mounting means by structural association with other equipment or articles
    • H01Q1/24Supports; Mounting means by structural association with other equipment or articles with receiving set
    • H01Q1/241Supports; Mounting means by structural association with other equipment or articles with receiving set used in mobile communications, e.g. GSM
    • H01Q1/242Supports; Mounting means by structural association with other equipment or articles with receiving set used in mobile communications, e.g. GSM specially adapted for hand-held use
    • H01Q1/243Supports; Mounting means by structural association with other equipment or articles with receiving set used in mobile communications, e.g. GSM specially adapted for hand-held use with built-in antennas
    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01QANTENNAS, i.e. RADIO AERIALS
    • H01Q1/00Details of, or arrangements associated with, antennas
    • H01Q1/12Supports; Mounting means
    • H01Q1/22Supports; Mounting means by structural association with other equipment or articles
    • H01Q1/24Supports; Mounting means by structural association with other equipment or articles with receiving set
    • HELECTRICITY
    • H03BASIC ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H7/00Multiple-port networks comprising only passive electrical elements as network components
    • H03H7/38Impedance-matching networks
    • H03H7/40Automatic matching of load impedance to source impedance
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B1/00Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/02Transmitters
    • H04B1/04Circuits
    • H04B1/0458Arrangements for matching and coupling between power amplifier and antenna or between amplifying stages
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B1/00Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/06Receivers
    • H04B1/16Circuits
    • H04B1/18Input circuits, e.g. for coupling to an antenna or a transmission line
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B1/00Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/38Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
    • H04B1/3827Portable transceivers

Description

ANTENNA IMPEDANCE MATCHING CIRCUIT TUNING SYSTEM

[0001] This invention relates to a tuning a reconfigurable antenna. Particularly, but not exclusively, the invention relates to a tuning control circuit for a reconfigurable multipleinput multiple-output (ΜΙΜΟ) antenna for use in a portable electronic device such as a mobile phone handset, laptop, tablet, femtocell, wireless router or other radio communications device.

BACKGROUND

[0002] Multiple-input multiple-output (ΜΙΜΟ) wireless systems exploiting multiple antennas as both transmitters and receivers have attracted increasing interest due to their potential for increased capacity in rich multipath environments. Such systems can be used to enable enhanced communication performance (i.e. improved signal quality and reliability) by use of multi-path propagation without additional spectrum requirements. This has been a well-known and well-used solution to achieve high data rate communications in relation to 2G and 3G communication standards. Multi-port antennas can be used to improve the performance of the whole system, and it would be desirable to configure these antennas to operate with several frequency bands simultaneously. However, multi-port antennas in a ΜΙΜΟ system are much more complex to control than conventional one port or two port antenna systems. Accordingly, there is a need for a tuning control circuit and a tuning method for a reconfigurable multi-port antenna.

BRIEF SUMMARY OF THE DISCLOSURE

[0003] Viewed from a first aspect, there is provided a tuning control circuit configured for use with an antenna device having at least one signal port connected to an impedance matching circuit, the impedance matching circuit in turn being connected to a transceiver, wherein the impedance matching circuit includes a tuneable component that can be adjusted so as to allow the at least one signal port to be impedance matched to the transceiver, wherein the tuning control circuit comprises: i) a monitor circuit connected across the impedance matching circuit, the monitor circuit comprising an operational amplifier with first and second inputs and an output connected to an analogue/digital converter, wherein each of the first and second inputs of the operational amplifier are respectively connected to either side of the impedance matching circuit by way of a peak or envelope detector circuit so as to provide detection potentials that are compared by the operational amplifier to detect a potential difference representative of power loss across the impedance matching circuit, and wherein the analogue/digital converter is configured to output a digital signal representative of power loss across the impedance matching circuit; and ii) a digital controller connected to the analogue/digital converter to receive the digital signal representative of power loss and also connected to the impedance matching circuit, wherein the digital controller is configured to tune the impedance matching circuit by adjusting the tuneable component in response to the detected power loss across the impedance matching circuit so as to reduce the detected power loss; wherein the digital controller is configured to apply differently-sized tuning steps to the tuneable component of the matching circuit depending on the output received from the operational amplifier and A/D converter in the monitor circuit.

[0004] The circuit may further comprise a baseband processor configured to determine a received signal strength indication, RSSI, and a signal-to-noise ratio, SNR, for signals at the signal port; wherein the baseband processor is configured to send the determined RSSI and SNR values to the digital controller, and wherein the digital controller is configured to tune the matching circuit so as to obtain RSSI and SNR values that meet predetermined RSSI and SNR requirements for the transceiver.

[0005] The digital controller may be provided with a lookup table, and measured RSSI and SNR values may be saved in the lookup table together with their related switch and/or matching circuit settings.

[0006] The baseband processor may be connected to the transceiver, and may determine the RSSI and SNR of the received signals after they have been passed from the respective signal ports to the transceiver.

[0007] The baseband processor may additionally be configured to determine a bit error rate, BER, for signals at each signal port, and the digital controller may be configured to operate the switches and/or tune the matching circuits so as to obtain BER values that meet predetermined requirements.

[0008] The digital controller may be provided with a lookup table and measured RSSI, SNR and, optionally, BER values may be saved in the lookup table together with their related switch and/or matching circuit settings. For any given situation, the digital controller may subsequently select the best RSSI, SNR and, optionally, BER values from the lookup table and set the switches and/or tune the matching circuits accordingly. This can result in improved speed of control. The lookup table can be frequently updated to adapt to changing operating conditions of the antenna.

[0009] The digital controller may be configured as a microcontroller, a field-programmable gate array, FPGA, a PIC, a digital signal processor, DSP or any other suitable device. The digital controller may be implemented on a chip or integrated circuit.

[0010] The matching circuits may be monolithic microwave integrated circuits, MMICs, low-temperature co-fired ceramic circuits, LTCCs, surface mount component circuits or any other suitable tuneable circuits.

[0011] For a given signal port, the digital controller may monitor the matching circuit by way of a monitor circuit. The monitor circuit may be connected across the matching circuit, and may comprise an operational amplifier and an analogue/digital converter in combination with appropriate capacitors and diodes.

[0012] The operational amplifier is used to detect a potential difference across the matching circuit. The potential difference will be substantially zero if the matching circuit is able to match the antenna input impedance to a standard 50 ohm transmission line. If there is a mismatch, the potential difference will be non-zero, and will increase as the mismatch increases. Accordingly, if the digital controller detects that the output signal from the operational amplifier, converted to digital format by the A/D converter is increasing as the matching circuit is tuned, this will indicate that the matching circuit is being tuned in the wrong direction. In response, the digital controller can tune the matching circuit in the other direction. If the digital controller detects that the output signal from the operational amplifier, converted to digital format by the A/D converter is decreasing as the matching circuit is tuned, this will indicate that the matching circuit is being tuned in the correct direction.

[0013] The digital controller may tune the matching circuit by adjusting one or more variable capacitors in the matching circuit, or by any other tuning mechanism as will be known to those of ordinary skill in the art.

[0014] For each operational signal port and matching circuit, it is desired to match the signal port to a standard 50 ohm transmission line.

[0015] Viewed from a second aspect, there is provided a method of tuning an impedance matching circuit connected to at least one signal port of an antenna device, the impedance matching circuit in turn being connected to a transceiver, wherein the impedance matching circuit includes a tuneable component that can be adjusted so as to allow the at least one signal port to be impedance matched to the transceiver, the method comprising: i) with a monitoring circuit, detecting a potential difference corresponding to a power loss across the impedance matching circuit and generating a digital signal representative of the power loss, the monitoring circuit comprising an operational amplifier with first and second inputs and an output connected to an analogue/digital converter, wherein each of the first and second inputs of the operational amplifier are respectively connected to either side of the impedance matching circuit by way of a peak or envelope detector circuit so as to provide detection potentials that are compared by the operational amplifier, the analogue/digital converter outputting the digital signal representative of the power loss; ii) inputting the digital signal representative of the power loss to a digital controller; iii) with the digital controller, determining whether or not the potential difference is above a predetermined value; and iv) if the potential difference is above the predetermined value, retuning the impedance matching circuit by adjusting the tuneable component under control of the digital controller so as to reduce the detected potential difference to below the predetermined value; wherein the digital controller applies differently-sized tuning steps to the tuneable component of the matching circuit depending on the output received from the operational amplifier and A/D converter in the monitor circuit.

[0016] Where the antenna device has multiple signal ports each connected to a respective impedance matching circuit by way of a respective switch, the respective impedance matching circuits in turn being connected to the transceiver, the method may further comprise: i) with the digital controller, switching on a first switch to connect a first signal port to the transceiver by way of a first impedance matching circuit; ii) with the baseband processor, determining a received signal strength indication, RSSI, and a signal-to-noise ratio, SNR, for signals at the first signal port; iii) determining, by the digital controller, if the RSSI and SNR at the first signal port meet the requirements of the transceiver; iv) if the RSSI and SNR at the first port do not meet the requirements of the transceiver, the digital controller switching off the first switch and switching on a second switch to connect a second signal port to the transceiver by way of a second impedance matching circuit; v) with the baseband processor, determining the RSSI and SNR for signals at the second signal port; vi) determining, by the digital controller, if the RSSI and SNR at the second signal port meet the requirements of the transceiver; and vii) if the RSSI and SNR at the second port do not meet the requirements of the transceiver, repeating steps iv) to vi) for all of the signal ports in turn.

[0017] In order to illustrate how the present tuning control circuit may be implemented, an example will now be described. All the switches between the signal ports and the matching circuits may initially be switched off except for the switch connecting a first signal port to a first matching circuit. The baseband processor will then measure the RSSI and SNR values for the first signal port. If the measured RSSI and SNR values meet the requirements of the transceiver at that particular time, then the control process need go no further (at least while the measured RSSI and SNR values continue to meet transceiver requirements). If, on the other hand, the measured RSSI and SNR values do not meet transceiver requirements, the digital controller can then switch off the first switch and switch on a second switch to connect a second signal port to a second matching circuit. The RSSI and SNR values for the second signal port will then be measured by the baseband processor. This process can be repeated for all the signal ports and their associated matching circuits until acceptable RSSI and SNR values are obtained. However, if none of the signal ports and matching circuits is able to provide adequate RSSI and SNR, then the digital controller will select the signal port with the best RSSI and SNR values, and then tune the associated matching circuit by using the monitoring circuit so as to obtain RSSI and SNR values that meet the requirements of the transceiver. If it is still not possible to obtain adequate RSSI and SNR values, then the digital controller will try switching in the other signal ports in turn, tuning their matching circuits until the best RSSI and SNR values are obtained.

[0018] By storing measured RSSI and SNR (and optionally BER) values in the lookup table so that they are correlated with particular signal ports and matching circuits, the efficiency of the control process may be improved by allowing the digital controller to try the most promising signal port and matching circuit first.

[0019] Likewise, tuning efficiency is improved by configuring the digital controller to apply differently-sized tuning steps to the matching circuits depending on the output received from the operational amplifier and A/D converter in the monitor circuit. A large tuning step may be set initially. If the detected potential difference across the matching circuit decreases when the tuning step is applied, then a further tuning step of the same magnitude may be applied. On the other hand, if the detected potential difference across the matching circuit increases when the tuning step is applied, then a further tuning step of half the magnitude and in the opposite direction may be applied. This process is repeated until the matching circuit is sufficiently tuned.

BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Embodiments of the invention are further described hereinafter with reference to the accompanying drawings, in which:

Figure 1 shows a mismatched antenna;

Figure 2 shows a matched antenna;

Figure 3 shows an equivalent circuit of the mismatched antenna;

Figure 4 shows an equivalent circuit of the mismatched antenna after it has been re matched;

Figure 5 shows the return loss of the matched antenna and the mismatched antenna;

Figure 6 shows the return loss of mismatched antenna after it has been re matched;

Figure 7 shows a system block including the antenna(s), signal ports, matching circuits and transceiver, as well as a tuning control circuit;

Figure 8 shows how antenna mismatch may be detected; and

Figure 9 shows an exemplary circuit diagram for a monitor circuit for one matching circuit.

DETAILED DESCRIPTION

[0021] In order to show the importance of impedance matching and the consequences of impedance mismatch, reference is now made to Figure 1, which shows an ideal antenna 100 having a complex impedance Z = a + jb. The antenna 100 is connected to a power amplifier 101 having an output with a standard impedance of 50 ohms, the power amplifier 101 being in turn connected to a transceiver 102. The complex impedance Z = a + jb of the antenna 100 is clearly mismatched with the standard output of the power amplifier 101.

[0025] If the mismatched antenna 100 is directly connected to the output of the power amplifier 101, then a part of the forward power PF from the power amplifier 101 is reflected back to amplifier as PR. The reflected power PR is dissipated as heat in the amplifier 101 and is wasted [0026] In order to minimise the reflected power, the antenna 100 impedance has to be matched to output impedance of the amplifier 101, this process being known as complex conjugate matching. The imaginary part of the antenna impedance is neutralised and the real part is transformed to match 50 ohms, this being the output impedance of the amplifier 101. Figure 2 shows how impedance matching may be achieved between the antenna 100 and the amplifier 101.

[0027] Matching elements c and d server to transforming the real part “a” of the antenna impedance to 50 ohms. Looking from the amplifier 101 side in the direction of the antenna 100, an impedance of 50 ohms should be visible. When the antenna 100 is matched to the output of the amplifier 101 (50 ohms), losses should be minimised with relatively low reflected power from antenna 100.

[0028] Signal losses due to impedance mismatch, otherwise known as mismatch loss ML, can be calculated from:

where RL = return loss.

[0029] The higher the numerical value of RL, the lower the mismatch loss, as shown in Table 1 below.

[0030] A matched antenna can be easily detuned such that it is no longer matched to a front end of a radio system. In this case, the return loss drops and signal losses result in a degradation of radio performance. Causes of detuning include the presence of objects that can interfere with the radiation pattern of the antenna at close proximity, e.g. metallic objects, a user’s hand (body effects), a user’s hand and head in the case of a mobile handset. The amount of detuning will depend on the electrical properties of the interfering material and its proximity to the antenna. In this case, looking into the antenna port will reveal that its impedance has changed considerably and is no longer properly matched. This can be seen in Figure 3, which shows an example of a detuned antenna. The imaginary part of the antenna impedance has shifted form -jb to +jy. For complex conjugate matching, the first element +jb is now incorrect and needs to change to -jy in order to rematch the antenna, as shown in Figure 4.

Table 1:

[0028] The effect of detuning and consequential mismatch can be seen in Figure 5, which shows a return loss plot for a detuned and hence mismatched antenna (in dashed lines) compared to a return loss for a properly matched antenna (solid line). The detuned antenna has been detuned by -Af from the desired frequency of fc. It can be seen that the return loss RL is much lower at frequency fc for the detuned antenna than for the properly matched antenna, which means that the signal loss is much higher (see Table 1).

[0029] Figure 6 shows the effect of rematching the antenna of Figure 5. The real part of the antenna impedance has not changed in the tuning process, and therefore the matching elements (c and d in Figure 4) do not need to be changed. The impedance mismatch can be represented by a plot of return loss versus frequency as in Figure 5. By changing the matching impedance to rematch the antenna (antenna tuning), the return loss will revert to its original state as shown in Figure 6.

[0030] Figure 7 shows a plurality of antenna elements 1a, 1b, 1c connected to a plurality of signal ports 2a, 2b, 2c. The antenna elements 1a, 1b, 1c may all form part of a single antenna device (not shown), or may indeed represent a single antenna element operating in several bands. Constructional details of the antenna elements or antenna device are not of relevance to the present discussion - what is important is that there is a plurality of signal ports 2a, 2b, 2c etc. that may operate in the same or different frequency bands. Each signal port 2a, 2b, 2c is connected to a respective matching circuit 3a, 3b, 3c by way of a respective switch 4a, 4b, 4c. The switches 3a, 3b, 3c are each controlled by a digital controller, here shown as a microcontroller 5, although other digital controllers such as FPGAs may equally be used, which is in turn connected to a baseband processor 6. Each matching circuit 3a, 3b, 3c is also connected to and controlled by the microprocessor 5. In addition, each matching circuit 3a, 3b, 3c is connected to a transceiver 7 to allow RF signals to be received or

transmitted. The transceiver 7 is connected to the baseband processor 6 to allow the baseband processor 6 to analyse the signals from the signal ports 2a, 2b, 2c.

[0034] As hereinbefore described, the baseband processor 6 measures RSSI, SNR and optionally BER values for signals received by the transceiver 7 from each signal port 2a, 2b, 2c when these are connected to the matching circuits 3a, 3b, 3c by the switches 4a, 4b, 4c. The microcontroller 5 operates the switches 4a, 4b, 4c in turn to determine which signal port 2a, 2b, 2c gives the best RSSI, SNR and optionally BER for the transceiver 7. The microcontroller 5 includes a lookup table for storing the measured RSSI, SNR and optionally BER values correlated against the respective signal ports 2a, 2b, 2c and/or matching circuits 3a, 3b, 3c.

[0035] A lookup table, for example as shown in Table 2 below, is created by the microprocessor 5 to store the performance of each antenna element 1a, 1b, 1c. The selection criterion is to select the antenna element 1a, 1b, 1c with the highest RSSI and the highest SNR at any given time. There may be circumstances where RSSI is high and SNR is low, for example in the case of in-band interference. The lookup table is updated every time there is a detected degradation in the performance of any of the antenna elements 1a, 1b, 1c.

Table 2:

[0036] In order to speed up the selection process, another lookup table may be built, for example as shown in Table 3 below. This lookup table order the antenna elements by performance, and has the best performing antenna element in the first position, and the worst performing antenna element in the last position.

Table 3:

[0034] Further tables similar to Tables 2 and 3 could be created.

[0035] Each antenna element 1a, 1b, 1c can be tuned by adjusting the matching circuit 3a, 3b, 3c. For example, when selection of one of the signal ports 2a, 2b, 2c by way of the switches 4a, 4b, 4c does not allow adequate RSSI, SNR and optionally BER values to be obtained, the microcontroller 5 can select the signal port 2a, 2b, 2c with the best values, and then seek to tune the matching circuit 3a, 3b, 3c associated with that signal port in order to improve the RSSI, SNR and optionally the BER values.

[0036] Moreover, for antenna tuning to be effective, it is necessary to provide a means for detecting antenna mismatch or detuning. The means should indicate the severity of mismatch or detuning, and enable corrective measures to be taken to correct the mismatch and/or retune the antenna. Due to commercial and design pressures, the means should be simple in design and small in size so as to facilitate processor integration, while still being effective.

[0037] In the case of transmission, mismatch detection can be achieved by looking at the power output of the power amplifier and the power transferred to the antenna for radiation. In theory, a directional coupler could be used, but such a device is typically too large for chip integration. Accordingly, an alternative approach is proposed in the present application.

[0038] The power output of the power amplifier 101 can be sampled and compared with the sampled power going into the antenna 100. When the antenna 100 is properly matched, these sampled powers should be substantially or nearly equal, indicating low loss and good impedance matching. The sampled powers are used to drive peak/envelope detectors so as to generate voltages that can be compared in order to indicate mismatch. Figure 8 shows an example of how this may be achieved. Taking first

the case where the antenna 100 is properly matched, it can be seen that the power output from the power amplifier 101 will be transferred to the antenna 100 via the matching network 3 with minimum loss. Accordingly, the power input to the antenna 100 will be equal or almost equal to the power output by the amplifier 101 when the antenna 100 is properly matched. This can be detected by sampling the potentials VP and VA on either side of the matching network 3 using peak/envelope detectors 103, 104 so as to provide detection potentials and V2. In the matched condition, and V2 will be substantially equal, and the difference between and V2 will increase with increasing power loss, indicative of increasing mismatch.

[0042] Figure 9 shows the general architecture for tuning a single antenna element 1a. It will be understood that this architecture may be extended for multiple antennas 1a, 1b, 1c. There are four main parts involved in antenna tuning: match and tune 200, power detector 300, mixed signal application-specific integrated circuit, ASIC, 400 and microcontroller 5.

[0043] The power detector 300, which is shown in more detail in Figure 8, looks at the output of the transceiver 7 and the power transferred to the antenna 1a. The power detector includes peak/envelope detectors 103, 104 and outputs the detected voltages and V2 (see Figure 8).

[0044] The mixed signal ASIC 400 comprises an operational amplifier 16 connected to an analogue/digital converter 17. The A/D converter 17 is in turn connected to a signal processor 18.

[0045] If the antenna 1a is well-matched to the transceiver 7, then and V2 will be substantially equal, and the operational amplifier will output a low or zero signal. The A/D converter 17 is configured to output a zero value, indicating good matching.

[0046] If, on the other hand, the antenna 1a is not well-matched (for example, it may have become detuned due to the proximity of a user’s hand, or some other external influence), then the power transferred to the antenna 1a will drop. This means that will be less than V2, and the larger the difference, the larger the mismatch. The operational amplifier will thus output a high signal, and this will be converted by the A/D converter 17 to a positive value or digital code. The digital code preferably includes an indication of the magnitude of the difference between and V2. The digital code is acted on by the signal processor 18, which sends a message to the microcontroller 5 to start the tuning process.

[0047] Tuning is achieved in the match and tune section 200 by applying or changing a potential difference on variable element C (which may be a variable capacitor or other variable component). Element C is adjusted until the output of the A/D converter reverts to zero, thus indicating that good matching has been regained.

[0045] If the microcontroller 5 detects that the output signal from the operational amplifier 16, converted to digital format by the A/D converter 17 is increasing as the voltage applied across variable element C is adjusted, this will indicate that tuning is in the wrong direction. In response, the microcontroller 5 can adjust the voltage applied across variable element C in the other direction (e.g. decreasing the applied voltage in the event that increasing the voltage results in an increase in the output signal from the operational amplifier 16). If the microcontroller 5 detects that the output signal from the operational amplifier 16 is decreasing as voltage applied across variable element C is adjusted in a given direction, this will indicate that tuning is taking place in the correct direction.

[0046] Tuning may also be undertaken by the baseband processor 6 by way of a serial peripheral interface SPI bus 19. This is useful when there is no transmit signal and the transceiver 7 is running in receive mode. In this scenario, some receiver performance parameters will be required, namely the RSSI and SNR. These are sent to the microcontroller 5 by way of the SPI bus 19.

[0047] A well-matched antenna 1a will give a high RSSI and SNR, in which case no retuning is required.

[0048] A poorly-matched antenna 1a will give a low RSSI and SNR, indicating that retuning is required. In this case, retuning is achieved by adjusting the potential across variable element C in the match and tune section 200. Element C is adjusted until the RSSI and SNR indicate that a good match is obtained. This can be done with reference to the lookup tables.

[0049] Furthermore, the architecture of Figure 9 can be used to detect if an antenna 1a, 1b, 1c is performing badly, and this antenna may be switched out temporarily, thus helping to reduce power consumption. The antenna can be periodically re-checked, and switched back in again once its performance has improved.

[0050] Throughout the description and claims of this specification, the words “comprise” and “contain” and variations of them mean “including but not limited to”, and they are not intended to (and do not) exclude other moieties, additives, components, integers or steps. Throughout the description and claims of this specification, the singular encompasses the plural unless the context otherwise requires. In particular, where the indefinite article is used, the specification is to be understood as contemplating plurality as well as singularity, unless the context requires otherwise.

[0051] The reader's attention is directed to all papers and documents which are filed concurrently with or previous to this specification in connection with this application and which are open to public inspection with this specification, and the contents of all such papers and documents are incorporated herein by reference.

Claims (10)

CLAIMS:
1. A tuning control circuit configured for use with an antenna device having at least one signal port connected to an impedance matching circuit, the impedance matching circuit in turn being connected to a transceiver, wherein the impedance matching circuit includes a tuneable component that can be adjusted so as to allow the at least one signal port to be impedance matched to the transceiver, wherein the tuning control circuit comprises: i) a monitor circuit connected across the impedance matching circuit, the monitor circuit comprising an operational amplifier with first and second inputs and an output connected to an analogue/digital converter, wherein each of the first and second inputs of the operational amplifier are respectively connected to either side of the impedance matching circuit by way of a peak or envelope detector circuit so as to provide detection potentials that are compared by the operational amplifier to detect a potential difference representative of power loss across the impedance matching circuit, and wherein the analogue/digital converter is configured to output a digital signal representative of power loss across the impedance matching circuit; and ii) a digital controller connected to the analogue/digital converter to receive the digital signal representative of power loss and also connected to the impedance matching circuit, wherein the digital controller is configured to tune the impedance matching circuit by adjusting the tuneable component in response to the detected power loss across the impedance matching circuit so as to reduce the detected power loss; wherein the digital controller is configured to apply differently-sized tuning steps to the tuneable component of the matching circuit depending on the output received from the operational amplifier and A/D converter in the monitor circuit.
2. A circuit as claimed in claim 1, further comprising a baseband processor configured to determine a received signal strength indication, RSSI, and a signal-to-noise ratio, SNR, for signals at the signal port; wherein the baseband processor is configured to send the determined RSSI and SNR values to the digital controller, and wherein the digital controller is configured to tune the impedance matching circuit by adjusting the tuneable component so as to obtain RSSI and SNR values that meet predetermined RSSI and SNR requirements for the transceiver.
3. A circuit as claimed in claim 2, wherein the digital controller is provided with a lookup table, and wherein measured RSSI and SNR values are saved in the lookup table together with their related impedance matching circuit settings.
4. A circuit as claimed in any preceding claim, connected to an antenna device having multiple signal ports each connected to a respective impedance matching circuit by way of a respective switch, the respective impedance matching circuits in turn being connected to the transceiver.
5. A circuit as claimed in claim 4, wherein the digital controller is operatively connected to the respective switches so as to allow the switches to be independently operated.
6. A circuit as claimed in claim 5 depending through claim 2, wherein the digital controller is additionally configured to operate the switches so as to obtain RSSI and SNR values that meet predetermined RSSI and SNR requirements for the transceiver.
7. A circuit as claimed in any one of claims 4 to 6 depending through claim 2, wherein the baseband processor is additionally configured to determine a bit error rate, BER, for signals at each signal port.
8. A circuit as claimed in claim 7, wherein the digital controller is configured to operate the switches so as to obtain BER values that meet predetermined requirements.
9. A method of tuning an impedance matching circuit connected to at least one signal port of an antenna device, the impedance matching circuit in turn being connected to a transceiver, wherein the impedance matching circuit includes a tuneable component that can be adjusted so as to allow the at least one signal port to be impedance matched to the transceiver, the method comprising: i) with a monitoring circuit, detecting a potential difference corresponding to a power loss across the impedance matching circuit and generating a digital signal representative of the power loss, the monitoring circuit comprising an operational amplifier with first and second inputs and an output connected to an analogue/digital converter, wherein each of the first and second inputs of the operational amplifier are respectively connected to either side of the impedance matching circuit by way of a peak or envelope detector circuit so as to provide detection potentials that are compared by the operational amplifier, the analogue/digital converter outputting the digital signal representative of the power loss; ii) inputting the digital signal representative of the power loss to a digital controller; iii) with the digital controller, determining whether or not the potential difference is above a predetermined value; and iv) if the potential difference is above the predetermined value, retuning the impedance matching circuit by adjusting the tuneable component under control of the digital controller so as to reduce the detected potential difference to below the predetermined value; wherein the digital controller applies differently-sized tuning steps to the tuneable component of the matching circuit depending on the output received from the operational amplifier and A/D converter in the monitor circuit.
10. A method according to claim 9, wherein the antenna device has multiple signal ports each connected to a respective impedance matching circuit by way of a respective switch, the respective impedance matching circuits in turn being connected to the transceiver, the method comprising: i) with the digital controller, switching on a first switch to connect a first signal port to the transceiver by way of a first impedance matching circuit; ii) with the baseband processor, determining a received signal strength indication, RSSI, and a signal-to-noise ratio, SNR, for signals at the first signal port; iii) determining, by the digital controller, if the RSSI and SNR at the first signal port meet the requirements of the transceiver; iv) if the RSSI and SNR at the first port do not meet the requirements of the transceiver, the digital controller switching off the first switch and switching on a second switch to connect a second signal port to the transceiver by way of a second impedance matching circuit; v) with the baseband processor, determining the RSSI and SNR for signals at the second signal port; vi) determining, by the digital controller, if the RSSI and SNR at the second signal port meet the requirements of the transceiver; and vii) if the RSSI and SNR at the second port do not meet the requirements of the transceiver, repeating steps iv) to vi) for all of the signal ports in turn.
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