GB2497257B - Semiconductor device with a gate stack - Google Patents

Semiconductor device with a gate stack

Info

Publication number
GB2497257B
GB2497257B GB1306306.0A GB201306306A GB2497257B GB 2497257 B GB2497257 B GB 2497257B GB 201306306 A GB201306306 A GB 201306306A GB 2497257 B GB2497257 B GB 2497257B
Authority
GB
United Kingdom
Prior art keywords
gate stack
semiconductor device
stack structure
substrate
passivation layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
GB1306306.0A
Other versions
GB2497257A (en
GB201306306D0 (en
Inventor
Caroline Andersson
Jean Fompeyrine
Chiara Marchiori
David J Webb
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of GB201306306D0 publication Critical patent/GB201306306D0/en
Publication of GB2497257A publication Critical patent/GB2497257A/en
Application granted granted Critical
Publication of GB2497257B publication Critical patent/GB2497257B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008Making conductor-insulator-semiconductor electrodes
    • H01L21/28255Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor belonging to Group IV and not being elemental silicon, e.g. Ge, SiGe, SiGeC
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/1025Channel region of field-effect devices
    • H01L29/1029Channel region of field-effect devices of field-effect transistors
    • H01L29/1033Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure
    • H01L29/105Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure with vertical doping variation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/16Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System
    • H01L29/161Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System including two or more of the elements provided for in group H01L29/16, e.g. alloys
    • H01L29/165Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System including two or more of the elements provided for in group H01L29/16, e.g. alloys in different semiconductor regions, e.g. heterojunctions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/36Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the concentration or distribution of impurities in the bulk material
    • H01L29/365Planar doping, e.g. atomic-plane doping, delta-doping
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/51Insulating materials associated therewith
    • H01L29/517Insulating materials associated therewith the insulating material comprising a metallic compound, e.g. metal oxide, metal silicate

Abstract

The present invention relates to a semiconductor device comprising a gate stack structure (1), the gate stack structure (1) comprising: at least a substrate (10) comprising a semiconductor that is substantially doped with n-type carriers; at least a passivation layer (12) comprising silicon formed on the substrate (10), and at least an insulator layer (13) formed on the passivation layer (12), wherein the gate stack structure (1) further comprises: at least an interlayer dopant provided between the substrate (10) and the passivation layer (12), the interlayer dopant comprising an n-type dopant (11) that is selected to facilitate control of a threshold voltage applicable to the gate stack structure (1) when the semiconductor device is in use.
GB1306306.0A 2010-09-28 2011-09-22 Semiconductor device with a gate stack Active GB2497257B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP10180822 2010-09-28
PCT/IB2011/054162 WO2012042442A1 (en) 2010-09-28 2011-09-22 Semiconductor device with a gate stack

Publications (3)

Publication Number Publication Date
GB201306306D0 GB201306306D0 (en) 2013-05-22
GB2497257A GB2497257A (en) 2013-06-05
GB2497257B true GB2497257B (en) 2013-11-06

Family

ID=44789561

Family Applications (1)

Application Number Title Priority Date Filing Date
GB1306306.0A Active GB2497257B (en) 2010-09-28 2011-09-22 Semiconductor device with a gate stack

Country Status (5)

Country Link
JP (1) JP5752254B2 (en)
CN (1) CN103125014B (en)
DE (1) DE112011103249B4 (en)
GB (1) GB2497257B (en)
WO (1) WO2012042442A1 (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1237183A1 (en) * 1999-11-12 2002-09-04 Japan Science and Technology Corporation Method for stabilizing oxide-semiconductor interface by using group 5 element and stabilized semiconductor
WO2009156954A1 (en) * 2008-06-25 2009-12-30 Nxp B.V. Interfacial layer regrowth control in high-k gate structure for field effect transistor

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003523630A (en) * 2000-02-17 2003-08-05 コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ Semiconductor device including CMOS integrated circuit including MOS transistor having silicon-germanium (Si1-xGex) gate electrode and method of manufacturing the same
JP2004006959A (en) * 2001-04-12 2004-01-08 Matsushita Electric Ind Co Ltd Semiconductor device and manufacturing method thereof
US6852645B2 (en) * 2003-02-13 2005-02-08 Texas Instruments Incorporated High temperature interface layer growth for high-k gate dielectric
WO2005101477A1 (en) * 2004-04-14 2005-10-27 Fujitsu Limited Semiconductor device and its manufacturing method
US20060086950A1 (en) * 2004-10-13 2006-04-27 Matty Caymax Method for making a passivated semiconductor substrate
CN100583450C (en) * 2005-03-11 2010-01-20 富士通微电子株式会社 Semiconductor device and its making method
US7446380B2 (en) 2005-04-29 2008-11-04 International Business Machines Corporation Stabilization of flatband voltages and threshold voltages in hafnium oxide based silicon transistors for CMOS

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1237183A1 (en) * 1999-11-12 2002-09-04 Japan Science and Technology Corporation Method for stabilizing oxide-semiconductor interface by using group 5 element and stabilized semiconductor
WO2009156954A1 (en) * 2008-06-25 2009-12-30 Nxp B.V. Interfacial layer regrowth control in high-k gate structure for field effect transistor

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
MITARD J ET AL:"Impact of Epi-Sigrowthtemperature on Ge-pFET performance", PROCEEDINGS OF THE 39TH EUROPEAN SOLID-STATE DEVICE RESEARCH CONFERENCE.ESSDERC 2009IEEE PISCATAWAY,NJ,USA,2009, pages 411-414, XP002667092,ISBN:978-1-4244-4351-2cited in the applicationparagraph *

Also Published As

Publication number Publication date
WO2012042442A1 (en) 2012-04-05
CN103125014B (en) 2015-09-23
DE112011103249T5 (en) 2013-08-14
JP2013543257A (en) 2013-11-28
GB2497257A (en) 2013-06-05
GB201306306D0 (en) 2013-05-22
CN103125014A (en) 2013-05-29
JP5752254B2 (en) 2015-07-22
DE112011103249B4 (en) 2014-01-23

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Effective date: 20131107