GB2485977A

GB2485977A - Audio playback system

Info

Publication number: GB2485977A
Application number: GB1020047.5A
Authority: GB
Inventors: Geoff Floyd
Original assignee: DisplayLink UK Ltd
Current assignee: DisplayLink UK Ltd
Priority date: 2010-11-26
Filing date: 2010-11-26
Publication date: 2012-06-06
Also published as: GB201020047D0

Abstract

An audio playback system comprises an input buffer 20, a loop control unit 22, a sample rate converter 24, a DAC 26 and a clock generating component 28. The input buffer is arranged to store digital audio data received over a packet network. The loop control unit is arranged to monitor the level of the input buffer and to generate a local clock signal accordingly. The sample rate converter is arranged to receive digital audio data from the input buffer, to receive the local clock signal from the loop control unit and to adjust the sample rate of the digital audio data. The DAC is arranged to receive digital audio data from the sample rate converter and to output analogue audio. The clock generating component is arranged to generate a destination clock signal and to provide the destination clock signal to the sample rate converter.

Description

DESCRIPTION

AUDIO PLAYBACK SYSTEM

This invention relates to an audio playback system and to a method of operating the system.

The transport of audio data across a packet network creates timing and sampling issues since the clocks at the source and destination will not be synchronised. Conventional USB solutions utilise the frame pulse to synchronise the source and destination sample rates. A PLL is used to multiply the frame pulse at the destination to generate the required audio sample clock.

High quality playback of audio data after transport across a packet network where the sample rate clocks at the source and destination are not is synchronised is difficult to achieve if no frame pulse is present. The sample rate clocks are derived from a crystal oscillator. The resulting sample clock accuracy is determined by the following factors, the accuracy of the crystal oscillator (typically 5Oppm) and errors converting the oscillator frequency to the desired audio sample rate (typically lOOppm). If the audio data is played out at the destination, without accounting for the differences in sample rate between the source and destination, then the destination will periodically drop or duplicate samples and this reduces the quality of the audio played out.

It is therefore an object of the invention to improve upon the known art.

According to a first aspect of the present invention, there is provided an audio playback system comprising an input buffer arranged to store digital audio data received over a network, a loop control unit arranged to monitor the level of the input buffer and to generate a local clock signal accordingly, a clock generating component arranged to generate a destination clock signal and to provide a destination clock signal, and a sample rate converter arranged to receive digital audio data from the input buffer, to receive the local clock signal from the loop control unit, to receive the destination clock signal from the clock generating component and to adjust the sample rate of the digital audio data.

According to a second aspect of the present invention, there is provided a method of operating an audio playback system comprising the steps of storing digital audio data received over a network, monitoring the level of the stored digital audio data and generating a local clock signal accordingly, generating a destination clock signal, and receiving the stored digital audio data, the local clock signal and the destination clock signal in order to adjust the sample rate of the digital audio data.

io Owing to the invention, it is possible to provide an audio playback system that can support connection to a wide range of packet networks including Ethernet, USB and wireless (e.g. WIFI), where not all of these networks have a frame pulse. This approach uses a digital control loop and sample rate converter. The system does not require any timing information is from the packet network and can therefore be applied to a wide range of packet networks.

In the preferred embodiment, the system further comprises a DAC arranged to receive digital audio data from the sample rate converter and to output analogue audio. The clock generating component is further arranged to provide the destination clock signal to the DAC. The loop control unit is arranged, when generating the local clock signal, to generate a local clock signal that matches a source clock signal of the received digital audio data and is arranged to increase the rate of the local clock signal as the level of the input buffer rises and to decrease the rate of the local clock signal as the level of the input buffer falls. The sample rate converter is arranged to receive digital audio data from the input buffer according to the local clock signal. The sample rate converter is further arranged to transmit digital audio data to the DAC according to the destination clock signal. The system further comprises a high speed clock signal generating component arranged to generate a high speed clock signal which is an integer multiple of the destination clock signal.

Embodiments of the present invention will now be described, by way of example only, with reference to the accompanying drawings, in which:-Figure 1 is a schematic diagram of an audio system, Figure 2 is a schematic diagram of a loop control unit, and s Figure 3 is a flowchart of a method of operating an audio playback system.

Figure 1 shows an audio system in which an audio source 10 communicates with an audio destination 12 via a packet network 14. Audio data 16 is transmitted over the network by audio source 10 to the audio destination in the form of data packets according to the relevant network protocol. The packet network 14 could be a USB connection or an Ethernet connection, for example. The audio source 10 could be a standard desktop computer that is transmitting the audio data 16 via the network 14 for is outputting remotely of the computer. At the audio source 10, a sample rate clock 18 produces a clock sample that is used in the sampling of the audio data 16 that is transmitted across the network 14.

The audio data 16 is captured from the packet network 14. Any packet headers are removed and the payload is placed in an input buffer 20. A control loop 22 monitors the buffer level and generates a local clock whose rate matches the source sample clock. The rate is increased as the input buffer 20 fill level rises and decreased as the buffer 20 fill level falls. The matched source clock is used to pass the audio data 20 to a sample rate converter 24.

Data is clocked out of the sample rate converter 24 using a high stability local oscillator at the required sample rate. The rate converted audio is passed through a DAC (Digital to Analog Converter) 26 and output using headphones or loudspeakers 30.

The sample rate converter 24 adjusts the sample rate of the digital audio data. It measures the sample rate of input data which is clocked in using the "Matched Source Sample Rate Clock" from the loop control 22. It outputs audio data at the rate defined by the destination sample clock. A higher speed clock related to the sample clock is available at the destination. This is used by the sub-blocks to perform internal operations between sample clocks. In a preferred implementation this uses a higher speed clock of 512 times the rate of the sample clock. The design can be adapted to run with other multiples of the sample clock.

The loop control 22 is shown in more detail in Figure 2. The loop control unit 22 comprises a phase detector 32, a comparator 34 and a counter/oscillator 36. These components are connected in a loop. The loop control functions in the following manner. The sample available input to the phase detector 32 indicates that a new audio sample has been placed into the input buffer 20. The sample clock is used to send a new audio data sample from the input buffer 20 to the sample rate converter 24. The phase detector 32 monitors the input buffer depth and generates a signed error count value indicating how far the depth has deviated from the desired level, which is normally set at half-full.

is The comparator 34 checks the error count value. If the error count value exceeds a pre-defined threshold, the comparator 34 signals the counter/ oscillator 36 to go faster or slower, as appropriate. The counter/oscillator 36 performs an increment of an internal counter with every tick of the higher speed clock. The sample clock output is triggered when the counter 36 overflows. The counter increment value is set so that the sample clock frequency is close to the desired rate. The fast/slow adjustments from the comparator 34 actively adjust the increment value so the local destination sample clock frequency matches that of the source sample clock.

Figure 3 shows a flowchart of the method of operating the audio playback device 12. The method of operating the audio playback system 12 comprises the steps of firstly, step SI, which comprises storing the received digital audio data 16 received from the packet network 14. After the received audio data 14 has been unpacked it is stored in the input buffer 20. The next step comprises the step of monitoring the level of the stored digital audio data and generating a local clock signal accordingly. This is carried out by the loop control unit 22, and is described in more detail above. The loop control unit 22 outputs a matched source sample clock signal.

The next step is step S3, which comprises generating a destination clock signal. The destination clock signal is generated by the clock generating component 28, which provides the destination clock signal to the sample rate converter 24. Step S4 comprises receiving the stored digital audio data 10, the local clock signal (from the loop control unit 22) and the destination clock signal (from the generator 28) in order to adjust the sample rate of the digital audio data 10. The final step in the method is step S5, which comprises converting the digital audio data 10 to analogue audio, after sample rate conversion. This is carried out by the DAC 26, which passes the analogue audio to a loudspeaker 30.

The final step in the method, of converting the digital audio to analogue in the DAC 26 is an optional step. The audio data could be transmitted from the audio playback device 12 still in the digital form, for example over a HDMI link to a connected television.

Claims

CLAIMS1. An audio playback system comprising: o an input buffer arranged to store digital audio data received over a network, o a loop control unit arranged to monitor the level of the input buffer and to generate a local clock signal accordingly, o a clock generating component arranged to generate a destination clock signal and to provide a destination clock signal, and o a sample rate converter arranged to receive digital audio data from the input buffer, to receive the local clock signal from the loop control unit, to receive the destination clock signal from the clock generating component and to adjust the sample rate of the digital audio data.
2. A system according to claim 1, and further comprising a DAC arranged to receive digital audio data from the sample rate converter and to output analogue audio.
3. A system according to claim 2, wherein the clock generating component is further arranged to provide the destination clock signal to the DAC.
4. A system according to claim 2 or 3, wherein the sample rate converter is further arranged to transmit digital audio data to the DAC according to the destination clock signal.
5. A system according to any preceding claim, wherein the loop control unit is arranged, when generating the local clock signal, to increase the rate of the local clock signal as the level of the input buffer rises and to decrease the rate of the local clock signal as the level of the input buffer falls.
6. A system according to any preceding claim, wherein the sample rate converter is arranged to receive digital audio data from the input buffer according to the local clock signal.
7. A system according to any preceding claim, wherein the loop control unit is arranged, when generating the local clock signal, to generate a local clock signal that matches a source clock signal of the received digital audio data.
8. A system according to any preceding claim, and further comprising a high speed clock signal generating component arranged to generate a high speed clock signal which is an integer multiple of the destination clock signal.

9, A method of operating an audio playback system comprising the steps of: o storing digital audio data received over a network, o monitoring the level of the stored digital audio data and generating a local clock signal accordingly, o generating a destination clock signal, and o receiving the stored digital audio data, the local clock signal and the destination clock signal in order to adjust the sample rate of the digital audio data.