GB2469663A - Isolated DC-DC boost device - Google Patents

Isolated DC-DC boost device Download PDF

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Publication number
GB2469663A
GB2469663A GB0906921A GB0906921A GB2469663A GB 2469663 A GB2469663 A GB 2469663A GB 0906921 A GB0906921 A GB 0906921A GB 0906921 A GB0906921 A GB 0906921A GB 2469663 A GB2469663 A GB 2469663A
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output
winding
capacitor
diode
voltage
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GB0906921A
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GB0906921D0 (en
GB2469663B (en
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Rou-Yong Duan
Rong-Da Luo
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HUNGKUANG UNIVERSITY
HUNGKUANG, University of
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Univ Hungkuang
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Classifications

    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of dc power input into dc power output
    • H02M3/22Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
    • H02M3/325Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/33569Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of dc power input into dc power output
    • H02M3/22Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
    • H02M3/325Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/33538Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only of the forward type
    • H02M3/33546Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only of the forward type with automatic control of the output voltage or current
    • H02M3/33553Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only of the forward type with automatic control of the output voltage or current with galvanic isolation between input and output

Abstract

A boost device boosts an input voltage (VIN) to an output voltage (V0) across an output capacitor (C0), and includes an output diode (DZ) coupled to the output capacitor (C0), and a transformer (2) coupled to a first switch (S1), a clamp circuit (3) and a boost circuit (4). The clamp circuit (3) is coupled across a first winding (LP) of the transformer (2), and includes a clamp capacitor (CX) coupled in series to a second switch (S2). The first switch and second switch do not have any overlap in the on-time. The output capacitor (C0) is capable of being charged through the output diode (DZ) with an induced voltage (VLS) across a second winding (LS) of the transformer (2). The boost circuit (4) is capable of being charged with the induced voltage (VLs) across the second winding (Ls), and of charging the output capacitor (C0) so as to boost the output voltage (V0) across the output capacitor (C0). The device ensures electrical isolation between the input and output.

Description

BOOST DEVICE FOR VOLTAGE BOOSTING

The invention relates to a boost device, more particularly to a DC-to-DC boost device.

Figure 1 illustrates a conventional boost device disclosed in U.S. Patent No. 7,161,331. The conventional boost device includes a coupling circuit 10, a switch 13, a first diode 121, a second diode 122, an output diode 123, a first capacitor 141, a second capacitor 142, and an output capacitor 143. The coupling circuit 10 includes a first winding 11 and a second winding 12 each having a polarity end and a non-polarity end. The polarity end of the first winding 11 is coupled to an external power source. The first diode 121 has an anode coupled to the non-polarity end of the first winding 11, and a cathode coupled to an anode of the second diode 122. A cathode of the second diode 122 is coupled to the non-polarity end of the second winding 12 and an anode of the output diode 123. The first capacitor 141 is coupled between the cathode of the first diode 121 and ground. The second capacitor 142 is coupled between the non-polarity end of the first winding 11 and the polarity end of the second winding 12. The output capacitor 143 is coupled between a cathode of the output diode 123 and ground. The switch 13 is coupled between the non-polarity end of the first winding 11 and ground, and is operable between an ON-state and an OFF-state. Since the operation of the conventional boost device is described in detail in the aforesaid patent, further discussion of the same is omitted herein for the sake of brevity.

However, such a conventional boost device cannot provide electrical isolation. Thus, for an outdoor power supplying appliance including the conventional boost device, lightning strike may result in damage to the conventional boost device.

Therefore, an object of the present invention is to provide a boost device that can overcome the aforesaid

drawback of the prior art.

Accordingto thepresent invention, there is provided a boost device for boosting an input voltage supplied by an external power source to an output voltage. The boost device comprises: a transformer having first and second windings each having opposite first and second ends, the first end of the first winding being adapted to be coupled to the external power source; a first switch coupled between a reference node and the second end of the first winding of the transformer, and operable between an ON-state and an OFF-state; a clamp circuit adapted to be coupled to the external power source, coupled across the first winding of the transformer, and includinga series connectionofa clamp capacitor and a second switch, the second switch being operable between an ON-state and an OFF-state; an output diode having an anode coupled to the first end of the second winding of the transformer, and a cathode; an output capacitor having a first terminal coupled tothecathodeoftheoutputdiode, andasecondterminal, the output voltage being a voltage across the output capacitor, the output capacitor being capable of being charged through the output diode with an induced voltage across the second winding of the transformer; and a boost circuit coupled to the anode of the output diode and the second terminal of the output capacitor, and across the second winding of the transformer, the boost circuit being capable of being charged with the induced voltage across the second winding of the transformer, and of charging the output capacitor through the output diode so as to boost the voltage across the output capacitor.

Other features and advantages of the present invention will become apparent in the following detailed description of the preferred embodiment with reference to the accompanying drawings, of which: Figure 1 is a schematic electrical circuit diagram illustrating a conventional boost device; Figure 2 is a schematic electrical circuit diagram illustrating the preferred embodiment of a boost device according to the present invention; Figures 3a and 3b illustrate waveforms of external controlsignals (VGS1, VGS2) forfirstandsecondswitches of the preferred embodiment, respectively; Figure 3c illustrates waveforms of currents (Lp, 1LS) flowing respectively through first and second windings of a transformer of the preferred embodiment; Figure 3d illustrates a waveform of an exciting current (LM) of the transformer of the preferred embodiment; Figure 3e illustrates a waveform of a current (ILx) flowing through an inductor of a clamp circuit of the preferred embodiment; Figure 3f illustrates waveforms of a current (Isi) flowing through a first switch of the preferred embodiment, and a voltage (vsi) across the first switch; Figure 3g illustrates waveforms of a current (is2) flowing through a second switch of the preferred embodiment, andavoltage (v52) across the second switch; Figure 3h illustrates waveforms of a current (DW) flowing through a first diode of a boost circuit of the preferred embodiment, and a voltage (vDw) across the first diode; Figure 3i illustrates waveforms of a current (Dy) flowing through a second diode of the boost circuit of the preferred embodiment, and a voltage (vDy) across the second diode; Figure 3j illustrates waveforms of a current (Dz) flowing through an output diode of the preferred embodiment, and a voltage (VDZ) across the output diode; Figure 4 is a schematic equivalent electrical circuit diagram illustrating the preferred embodiment when operated in a first mode; Figure5isaschematicequivalentelectricalcircuit diagram illustrating the preferred embodiment when operated in a second mode; Figure6isaschematicequivalentelectricalcircuit diagram illustrating the preferred embodiment when operated in a third mode; Figure 7 isa schematic equivalent electrical circuit diagram illustrating the preferred embodiment when operated in a fourth mode; Figure 8 is a schematic equivalent electrical circuit diagram illustrating the preferred embodiment when operated in a fifth mode; Figure 9 is a schematic equivalent electrical circuit diagram illustrating the preferred embodiment when operated in a sixth mode; Figure 10 is a schematic equivalent electrical circuit diagram illustrating the preferred embodiment when operated in a seventh mode; Figure 11 is a plot illustrating experimental measurement results of the current (i) flowing though the first switch and the voltage (vsi) across the first switch; Figure 12 is a plot illustrating experimental measurement results of the current (�s2) flowing though the second switch andthe voltage (VS2) across the second switch; Figure 13 is a plot illustrating experimental measurement results of the current (ILX) flowing through the inductor, and the voltage (Vi) across the first switch; Figure 14 is a plot illustrating experimental measurement results of the currents (Lp, 1LS) flowing respectively through the first and second windings, and the voltage (vsi) across the first switch; Figure 15 is a plot illustrating experimental measurement results of the current (DW) flowing though the first diode and the voltage (VDW) across the first diode; Figure 16 is a plot illustrating experimental measurement results of the current (Dy) flowing though the second diode and the voltage (VDy) across the second diode; Figure 17 is a plot illustrating experimental measurement results of the current (DZ) flowing though the output diode and the voltage (VDZ) across the output diode; Figure 18 is a plot illustrating experimental measurement resuitsof the currents (ILS, icw, 0z) flowing respectively through the second winding, a second capacitor and the output diode; Figure 19 is a plot illustrating experimental measurement results of an output voltage (V0) boosted by the preferred embodiment, and a current (lo) flowing through a variable load; and Figure2Oisaplotillustratingexperimentalresults of power transformation efficiency of the preferred embodiment for an input voltage of 17 Volts.

Referring to Figure 2, the preferred embodiment of a boost device according to the present invention is shown to be adapted for boosting an input voltage (VIN) supplied by an external source to an output voltage (V0) Theboost device includes atransformer2, a first switch (Si), a clamp circuit 3, an output diode (D), a boost circuit 4, and an output capacitor (Ce) The transformer 2 includes first and secondwindings (Lp, L) wound around an iron core (not shown). Awinding ratio of the first and second windings (L, Ls) is equal to 1:N. Each of the first and second windings (Lp, Ls) has a polarity end serving as a first end, and a non-polarity end serving as a second end. The polarity end of the first winding (Lp) is adapted to be coupled to the external power source for receiving the input voltage (VIN) The first switch (S1) is coupled between a reference node, such as ground, and the non-polarity end of the first winding (Lv) . The first switch (S1) has a control end for receiving an external control signal (vGsi), and is operable to switch between an ON-state and an OFF-state in response to the external control signal.

(VGS1) The clamp circuit 3 is adapted to be coupled to the external power source, is coupled across the first winding (Lv), and includes a series connection of a clamp capacitor (Cx) and a second switch (S2) coupled in parallel to the first winding (Lv), and an inductor (Lx) coupled in parallel to the first winding (L) . The second switch (S2) has a control end for receiving an external control signal (VGS2), and is operable to switch between an ON-state and an OFF-state in response to the external control signal (vGs2) It is noted that, based on the external control signals (VGS1, VGS2) shown in Figures 3a and 3b, the first and second switches (S1, S2) are operated alternately in the ON-state, and duration of the ON-state of one of the firstandsecondswitches (Si, S2) doesnotoverlap duration of the ON-state of the other one of the first and second switches (Si, S2) The output diode (Dz) has an anode coupled to the polarity end of the second winding (La) , and a cathode.

The output capacitor (C0) is adapted to be coupled to a load in parallel, and has a first terminal coupled to the cathode of the output diode (D2), and a grounded second terminal. The output voltage (V0) is a voltage across the output capacitor (C0) . The output capacitor (C0) is capable of being charged through the output diode (Dz) with an induced voltage across the second winding (Ls) The boost circuit 4 is coupled to the anode of the S output diode (D) and the second terminal of the output capacitor (Co) , and across the second winding (La) . The boost circuit 4 is capable of being charged with the induced voltage across the second winding (La) , and of charging the output capacitor (C0) through the output diode (Dz) so as to boost the voltage across the output capacitor (C0) In this embodiment, the boost circuit 4 includes a first capacitor (Cy) , a series connection of a first diode (Dv) and a second capacitor (C), and a second diode (Dy). The first capacitor (Cy) is coupled between the non-polarity end of the second winding (La) and the second terminal of the output capacitor (C0) It is noted that the output capacitor (C0) is further charged through the output diode (D) with a voltage across the first capacitor (Cy) when the output capacitor (Co) is charged with the induced voltage across the second winding (Ls), as best shown in Figures 4 and 5. The series connection of the first diode (D) and the second capacitor (Cu) is coupled in parallel to the second winding (L5) When the output capacitor (C0) is charged through the output diode (Di) with the induced voltage across the second winding (Ls) , the second capacitor (Cu) is charged through the first diode (D) with the induced voltage across the second winding (Ls), as best shown in Figure 4 and 5. The second diode (Dy) has an anode coupled to the second terminal of the output capacitor (C0), and a cathode coupled to a common node (n) between the anode of the first diode (D) and the second capacitor (Cu) . The first capacitor (Cr) is capable of being charged through the second diode (Dy) with a voltage across the second capacitor (C), as best shown in Figures 7, 8 and 9. It is noted that the first diodes (Dw) and the second diode (Dy) do not conduct simultaneously.

The boost device of the preferred embodiment is operable among first to seventh modes based on the external control signals (vGsi, vGs2) for the first and second switches (Si, S2) shown in Figures 3a and 3b.

Figure 3d illustrates a waveform of an exciting current (LM) of the transformer 2. Figure 3c illustrates waveforms of currents (LP, J-LS) flowing respectively through the first and second windings (Lv, Ls) . Figure 3e illustrates a waveform of a current (ILX) flowing through the inductor (Lx) of the clamp circuit 3. Figure 3f illustrates waveforms of a current (si) flowing through the first switch (Si) , and a voltage (vsi) across the first switch (Si) . Figure 3g illustrates waveforms of a current (S2) flowing through the second switch (S2), and a voltage (vs2) across the second switch (S2) Figure 3h illustrates waveforms of a current (�Dw) flowing through the first diode (Dy) of the boost circuit 4, andavoltage (VDW) across the first diode (Dv). Figure 3i illustrates waveforms of a current (Dy) flowing through the second diode (Dr) of the boost circuit 4, and a voltage (VDy) across the second diode (Dy) . Figure 3j illustrates waveforms of a current (iDz) flowing through the output diode (Di), and a voltage (VDZ) across the output diode (VDZ) Referring further to Figures 3a to 3i, and 4, the boost device is operated in the first mode during a period from to to t1. In Figure 4, LM represents an exciting inductance of the transformer 2, and Lk represents a leakage inductance of the first winding (Lv) . In the first mode, the first switch (S1) is in the ON-state, the second switch (S2) is in the OFF-state, and the output diode (Dz) and the first diode (D) conduct. The first winding (Lv) is excited by a current from the external power source to generate an induced voltage equal to VIN across the first winding (Lv) . Thus, the induced voltage across the second winding (La) is equal to NVIN.

Inthis case, the output capacitor (C0) ischargedthrough the output diode (Dx) with the induced voltage across the secondwinding (Ls), andthevoltage across the first capacitor (Cy) (equal to NVIN/(l-d) which will be described in detail later, where d is the duty cycle of the first switch (Si)) to NVIN(2-d)/(l-d) . That is, theoutputvoltage (V0) isequaltoNVlN(2-d)/(l-d) Thus, a boost ratio (Gv) of the boost device is represented by Vo/VIN = N(2-d)/(1--d) . At the same time, the second capacitor (Cu) is charged through the first diode (Dw) with the induced voltage across the second winding (Ls) to NVIN so as to clamp a voltage across the second diode (Dr) . Thus, the voltage (V) across the second capacitor (C) is represented as follows: = NVIN (Equation 1) In the first mode, the current (ILP) flowing through the first winding (Lp) includes the exciting current (LM) and an induced current equal to NiLS. When the waveform of the current (l) flowing through the first switch (S1) is close to be a square shape through appropriate configuration of the exciting inductance and the leakage inductance, the first switch (S1) has a relatively low conduction loss.

Referring to Figures 3a to 31, and 5, the boost device is operated in the second mode during a period from ti tot2. Inthe secondmode, the first and second switches (S1. S2) are in the OFF-state, and the output diode (D) and the first diode (Dw) conduct. Energy attributed to the leakage inductance (Lk) of the first winding (Lp) is released to the transformer 2 such that the second winding (Ls) is operated as in the first mode. In this case, the current (iLp) flowingthrough the first winding (Lv) decreases and begins to charge a parasitic capacitanceofthefirstswitch (Si) suchthatthevoltage (V51) across the first switch (S1) rises (see Figure 3f) On the other hand, a parasitic capacitance of the second switch (S2) discharges such that the voltage (VS2) across the second switch (S2) reduces to zero (see Figure 3g) Thus, a sum of the voltage (Vi) across the first switch (Si) and the voltage (VS2) across the second switch (S2) is equal to a sum of a voltage (V) across the clamp capacitor (Cx) and the input voltage (VIN) . That is, Vi + vs2 v + VIN.

Referringto Figures 3ato 3i, and 6, theboost device is operated in the third mode during a period from t2 to t3. In the third mode, the first and second switches (Si, S2) are in the OFF-state. When the voltage (VS2) across the second switch (S2) is zero, a substrate diode of the second switch (S2) conducts such that the current (LX) flowing through the inductor (Lx) and the current (Lp) flowing through the first winding (L) flow to the clamp capacitor (Cx) . Thus, the voltage (vsi) across the first switch (Si) is clamped. When the duty cycle of the first switch (Si) is represented by "d", based on the voltage-second theorem, the voltage (vcx) across the clamp capacitor (Cx) is determined according to the following Equation 2: vcx = VINd/(l-d) (Equation 2) and the voltage (V5i) across the first switch (S1) is determined according to the following Equation 3: VIN + VCX -VS2 (Equation 3) It is noted that, when VS2 0, the voltage (Vi) across the first switch (Si) has a maximum value equal to VIN + vcx (= VIN/(l-d) = V0/[N(2-d)]) . That is, the clamp voltageofthefirstswitch (S1) I5VIN+vcX. Sinceenergy attributed to the leakage inductance (LK) of the first winding (Lv) is released, the current (LS) flowing through the second winding (L5) decreases to zero at t2 (see Figure 3c) . The current (i-LS) flowing through the second winding (S2) is reversed and gradually increases such that a parasitic capacitance of the second diode (Dr) of the boost circuit 4 discharges and that parasitic capacitances of the first diode (D) and the output diode (Dz) are charged. Therefore, the relationship among the voltage (VDW) across the first diode (D) , the voltage (vDy) across the second diode (Dy) and the voltage (vcy) across the first capacitor (Cy) is determined according to the following equation 4: + VDY = vcy (Equation 4) AccordingtotheEquation3, thevoltages (vw,vy) across the first and second diodes (D, Dy) clamp each other, and each of the voltages (vDw,vDy) across the first and second diodes (Dv, Dy) has a maximum value equal to v0y.

Referring to Figures 3ato 31, and 7, the boost device is operated in the fourth mode during a period from t3 to t4. In the fourth mode, the first switch (S1) is in theOFF-state, the second switch (S2) is inthe ON-state, and the second diode (Dy) conducts. The current (Lp) flowing through the first winding (Lv) decreases to zero att3, andthenreverselyincreasesasaresultofreceipt of the current (iLx) flowing through the inductor (Lx) Inthiscase, theclampcapacitor (Cx) dischargesthrough the second switch (S2) . The current flowing through the clamp capacitor (Cx), the current (LX) flowing through the inductor (Lx) and the exciting current (ILM) reversely flow to the first winding (Lv) Thus, the inducedvoltage (VLS) acrossthesecondwinding (La) is equal to N times the voltage (V) across the clamp capacitor (Cx) , and the first capacitor (Cy) is charged through the second diode (Dr) with the induced voltage (VLS) across the second winding (Ls) and the voltage (vcw) across the second capacitor (Cw) Referring to the Equations 1 and 2, the voltage (vcy) across the first capacitor (Cr) is determined according to the following Equation 5: vcy = v + v = Nvx + NVIN = NVINd/ (l-d) + NV1 = NVIN/(1-d) (Equation 5) As shown in Figure 3g, the second switch (S2) has zero-voltage switching characteristics during transformation from the OFF-state to the ON-state.

Referring to Figures3ato3i, and 8, the boost device is operated in the fifth mode during a period from t4 to t5. In the fifth mode, the first and second switches (S1, S2) are in the OFF-state, and the second diode (Dr) conducts. The parasitic capacitance of the second switch (S2) is charged and the parasitic capacitance of the first switch (S1) discharges. In this case, the voltages (Vi, VS2) across the first and second switches (Si, 52) are similar to those in the second mode. The second winding (Ls) is operated as in the fourth mode, but the current (�LS) flowing through the second winding (La) gradually decreases.

Referring to Figures 3a to 3�, and 9, theboost device is operated in the sixth mode during a period from t5 to t6. In the sixth mode, the first and second switches (Si, S2) are in the OFF-state. When the parasitic capacitance of the first switch (S1) discharges to zero, the substrate diode of the first switch (Si) conducts such that the voltage (VS2) across the second switch (S2) is clamped to VIN + VCX. Therefore, the first and second switches (Si, S2) have the same clamp voltage.

ReferringtoFigures3ato3i, and 10, theboost device is operated in the seventh mode during a period from t6 to t7. In the seventh mode, the first switch (Si) is in the ON-state and the second switch (S2) is in the OFF-state. While the substrate diode of the first switch (Si) conducts, the first switch (S1) is triggered toswjtchfromtheOFF-statetotheON-state. Therefore, as shown in Figure 3f, the first switch (Si) has zero-voltage switching characteristics. When the current (Lp) flowing through the first winding (L2) has an amplitude equal to that of the exciting current (LM) of the transformer 2, the first winding (Lv) receives energy again such that the current (�Ls) flowing through the second winding (La) gradually increases. In this case, theparasitic capacitances of the first diode (D) and the output diode (Dz) discharge, and the parasitic capacitance of the second diode (Dy) is charged.

When the parasitic capacitance of the output diode (Dz) discharges to zero, the output diode (Dz) conducts such that the output capacitor (Ce) is charged through the output diode (Dz) with the induced voltage (VLS) across the second winding (La) (equal to NVIN) and the voltage (Vy) across the first capacitor (Cr) (equal to NVIN/ (l-d) ) to VLS + As a result, the output voltage (V0) is equal to NVIN(2-d)/(l-d) . When the parasitic capacitance of the first diode (D) discharges to zero, the first diode (Dw) conducts such that the boost device is switched from the seventh mode to the first mode.

Figures 11 to 18 illustrate experimental measurement results when the boost device of the preferred embodiment is operated under the input voltage (VIN) of 17V, the output voltage (VH) of 400Vandanoutput power of 400W.

As shown in Figures 11 and 12, the voltages (V51, VS2) across the first and second switches (S1, S2) are clamped to about 55V. The first and second switches (S1, 52) have zero-voltage switching characteristics during transformation from the OFF-state to the ON-state.

Furthermore, the second switch (S2) has synchronous rectifying characteristics.

As shown in Figure 13, the current (LX) flowing throughthe inductor (Lx) is capable of effective sharing with the exciting current (ILM) of the transformer 2.

As shown in Figure 14, the first winding (L2) has low-voltage large-current characteristics, whereas the second winding (La) has high-voltage small-current characteristics.

As shown in Figures 15 and 16, the first and second diodes (D, Dy) are clamped to 300V that is less than the output voltage (V0) of 400V. The currents (DW, 1DY) must flow through a leakage inductance of the second winding (Ls) , thereby suppressing a reverse recovery current.

As shown in Figure 17, the output diode (Di) has a relatively long conduction duration without an inrush current. Therefore, ripples of the output voltage (V0) are reduced.

As shown in Figure 18, during the ON-state of the first switch (Si), the output capacitor (C0) is charged by the current (IDZ) flowing through the output diode (D), thereby effectively reducing loop current components of the whole boost device, and further decreasing conduction loss of the first switch (Si) Referring to Figure 19, the boost device is adapted to be coupled to a variable load so that the output power of the boost device is variable between 50W and 450W.

In this case, when the input voltage (VIN) slightly fluctuates, the output voltage (V0) remains stable even though great variation of the output power occurs.

Figure 20 illustrates experimental results of power transformation efficiency of the boost device of the preferred embodiment operated under a condition, where the input voltage (VIN) and the output voltage (V0) are respectively 17V and 400V. As shown in Figure 20, the boost device has a maximum power transformation efficiency of about 95%, and when the output power is 500W, the power transformation efficiency is over 91%.

The following are some of the advantages attributed to the boost device of the present invention: 1) Each of the first and second switches (S1, S2) has the clamp voltage equal toVo/[N(2-d)]. If the duty cycle is equal to 1, the clamp voltage of each of the first and second switches (Si, S2) is relative to the output voltage (V0) and the winding ratio of the first and second windings (Lv, L) . Therefore, the boost device is suitable for an application with a large variation of the input voltage (yIN) . 2) The first and second switches (Si, S2), the first and second diodes (Dw, D) , and the output diode (D) have soft switching characteristics. For the first and second diodes (D, D) , and the output diode (D), a large reverse recovery current is avoided.

3) Thewaveformof the inducedcurrent (jLS) has slopes oppositetothoseofthewaveformoftheexcitingcurrent (�LM) As a result, the transformer 2 is capable of having a smaller exciting inductance. The volume of the iron core and the number of windings can be reduced.

Therefore, the transformer 2 can be easily fabricated at a relatively low cost, and copper loss and iron core loss on a low-voltage side of the transformer 2 due to a large current can be reduced.

4) Due to thepresenceofthetransformer2, the boost device of the present invention has electrical isolation capability.

Claims (9)

  1. CLAIMS: 1. A boost device for boosting an input voltage supplied by an external power source to an output voltage, comprising: a transformer having first and second windings each having opposite first and second ends, said first end of said first winding being adapted to be coupled to the external power source; a first switch coupled between a reference node and saidsecondendofsaidfirstwindingofsaidtransformer, and operable between an ON-state and an OFF-state; a clamp circuit adapted to be coupled to the external power source, coupled across said first winding of said transformer, and includinga series connectionofa clamp capacitor and a second switch, said second switch being operable between an ON-state and an OFF-state; an output diode having an anode coupled to said first end of said second winding of said transformer, and a cathode; an output capacitor having a first terminal coupled to said cathode of said output diode, and a second terminal, the output voltage being a voltage across said output capacitor, said output capacitor being capable of being charged through said output diode with an induced voltage across said second winding of said transformer; and a boost circuit coupled to said anode of said output diode and said second terminal of said output capacitor, andacross said secondwindingof saidtransforrner, said boost circuit being capable of being charged with the induced voltage across said second winding of said transformer, and of charging said output capacitor through said output diode so as to boost the voltage across said output capacitor.
  2. 2. The boost device as claimed in Claim 1, wherein said boost circuit includes a first capacitor coupled between said second end of said second winding of said transformer and said second terminal of said output capacitor, said output capacitor being further charged through said output diode with a voltage across said first capacitor when said output capacitor is charged with the induced voltage across said second winding of said transformer.
  3. 3. The boost device as claimed in Claim 2, wherein said boost circuit further includes a series connection of a first diode and a second capacitor coupled in parallel to said second winding of said transformer, said first diode having an anode coupled to said second capacitor, and a cathode coupled to said second end of said second winding of saidtransformer, said second capacitorbeing capable of being charged through said first diode with the induced voltage across said second winding of said transformer.
  4. 4. The boost device as claimed in Claim 3, wherein said boost circuit further includes a second diode having an anode coupled to said second terminal of said output capacitor, andacathodecoupledtoacommonnodebetween said anode of said first diode and said second capacitor, said first capacitor being capable of being charged through said second diode with a voltage across said second capacitor.
  5. 5. The boost device as claimed in Claim 3, wherein, when said output capacitor is charged through said output diode with the induced voltage across said second winding of said transformer, said second capacitor of saidboost circuit is charged through said first diode with the induced voltage across said second winding of said transformer.
  6. 6. The boost device as claimed in Claim 1, wherein duration of the ON-state of one of said first and second switches does not overlap duration of the ON-state of the other one of said first and second switches.
  7. 7. The boost device as claimed in Claim 1, wherein said clamp circuit further includes an inductor coupled in parallel to said first winding of said transformer.
  8. 8. The boost device as claimed in Claim 1, wherein said first and second ends of said first winding of said transformer are polarity and non-polarity ends, respectively, said first and second ends of said second winding of said transformer being polarity and non-polarity ends, respectively.
  9. 9. The boost device substantially as hereinbefore described with reference to and as illustrated in Figures 2 to 20 of the accompanying drawings.
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Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6069803A (en) * 1999-02-12 2000-05-30 Astec International Limited Offset resonance zero volt switching flyback converter
US6317341B1 (en) * 2000-11-09 2001-11-13 Simon Fraidlin Switching circuit, method of operation thereof and single stage power factor corrector employing the same

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6069803A (en) * 1999-02-12 2000-05-30 Astec International Limited Offset resonance zero volt switching flyback converter
US6317341B1 (en) * 2000-11-09 2001-11-13 Simon Fraidlin Switching circuit, method of operation thereof and single stage power factor corrector employing the same

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GB2469663B (en) 2011-03-09

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