GB2461042A - Determination of imaged object centroid using CCD charge binning - Google Patents

Determination of imaged object centroid using CCD charge binning Download PDF

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GB2461042A
GB2461042A GB0811092A GB0811092A GB2461042A GB 2461042 A GB2461042 A GB 2461042A GB 0811092 A GB0811092 A GB 0811092A GB 0811092 A GB0811092 A GB 0811092A GB 2461042 A GB2461042 A GB 2461042A
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charge
ccd device
pixels
image
register
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GB0811092D0 (en
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Raymond Thomas Bell
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e2v Technologies Ltd
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e2v Technologies Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/148Charge coupled imagers
    • H01L27/14806Structural or functional details thereof
    • H01L27/14812Special geometry or disposition of pixel-elements, address lines or gate-electrodes
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/40Extracting pixel data from image sensors by controlling scanning circuits, e.g. by modifying the number of pixels sampled or to be sampled
    • H04N25/46Extracting pixel data from image sensors by controlling scanning circuits, e.g. by modifying the number of pixels sampled or to be sampled by combining or binning pixels
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70SSIS architectures; Circuits associated therewith
    • H04N25/71Charge-coupled device [CCD] sensors; Charge-transfer registers specially adapted for CCD sensors
    • H04N25/713Transfer or readout registers; Split readout registers or multiple readout registers
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N3/00Scanning details of television systems; Combination thereof with generation of supply voltages
    • H04N3/10Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical
    • H04N3/14Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical by means of electrically scanned solid-state devices
    • H04N3/15Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical by means of electrically scanned solid-state devices for picture signal generation
    • H04N3/1525Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical by means of electrically scanned solid-state devices for picture signal generation with charge transfer within the image-sensor, e.g. time delay and integration
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N3/00Scanning details of television systems; Combination thereof with generation of supply voltages
    • H04N3/10Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical
    • H04N3/14Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical by means of electrically scanned solid-state devices
    • H04N3/15Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical by means of electrically scanned solid-state devices for picture signal generation
    • H04N3/1575Picture signal readout register, e.g. shift registers, interline shift registers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/148Charge coupled imagers
    • H01L27/14831Area CCD imagers

Abstract

A CCD device 22 comprises an array of pixels arranged in rows and columns defining an image area 24. A method is provided to quickly determine the position of an object (see 'signal spot') in the image area by clocking charge to one edge of the image area, binning (ie summing) the charge to a first output register 30. Charge is then accumulated for a second period and clocked to a different edge of the image area in an orthogonal direction to the first edge, the charge being binned to a second output register 32. The binned accumulated charge can then be read out to give an intensity distribution of the imaged object in the orthogonal X,Y directions to determine the position of the object without the need to analyse every pixel. This reduces the processing time required to determine the position of the object within the image.

Description

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CCD DEVICE
FIELD OF THE INVENTION
The present invention relates to a CCD device, and in particular to a CCD which can be used in finding the location of an object on the image plane.
BACKGROUND OF THE INVENTION
In a typical CCD imager, signal charge representative of incident radiation is accumulated in an array of pixels in an image area. Following an integration period, signal charge is typically transferred to a store section and then to an output register by applying appropriate clocking or drive pulses to control electrodes. The signal charge is then read out from the output register and applied to a charge detection circuit to produce a voltage that is representative of the amount of signal charge. The sensitivity of such a device is limited by the noise of the charge to voltage conversion process and that introduced by the subsequent video chain electronics.
An electron multiplying CCD (EMCCD) overcomes this limitation and is disclosed in our earlier published UK patent application GB-A-2, 371,403, as shown in Figure 1. A CCD imager 1 comprises an image area 2, a store section 3 and an output or read-out register 4, each of these components being found in a conventional CCD imager. The output register 4 is extended serially to give a multiplication register 5, the output of which is connected to a charge detection circuit 6.
During operation of the device, incident radiation is converted at the image area 2 into signal charge, which is representative of the intensity of the radiation impinging on the array of pixels making up the image array. Following the image acquisition period, drive pulses are applied to control electrodes 7 to transfer the charge accumulated at the pixels of the image area 2 to the store section 3.
Simultaneously with this, drive signals are also applied to control electrodes 8 at the store section 3 to cause charge to be transferred from row to row as indicated by the arrow, the last row of charge held in elements in row 3a being transferred in parallel to the output register 4.
When a row of signal charge has been transferred into the output register 4, appropriate drive pulses are applied to the electrodes 9 to sequentially transfer the charge from the elements of the output register to those of the multiplication register 5. In this embodiment, the multiplication register is of similar architecture to the output register in so far as doping is concerned with the addition of an electrode for multiplication.
To achieve multiplication of charge in each of the elements of the multiplication register 5, sufficiently high amplitude drive pulses are applied to control electrodes 10 to both transfer signal charge from one element to the next adjacent element in the direction shown by the arrow and also to increase the level of signal charge due to impact ionisation by an amount determined by the amplitude of the drive pulses. Thus, as each packet of charge is transferred from one element to the next through the multiplication register, the signal charge increases. The charge detected at circuit 6 is thus a multiplied version of the signal charge collected in the output register 4. At each stage of the multiplication register, the signal charge is increased. Each signal charge packet stored in the output register 4 undergoes an identical multiplication process as each travels through all the elements of the multiplication register 5.
The output of the charge detection circuit 6 is also applied to an automatic gain control circuit 11 that adjusts the voltages applied to the multiplication register 5 to control the gain. In other embodiments, this feedback arrangement is omitted.
Gain may then be controlled manually if desired.
CCD Sensors of the type described are suitable for many applications including determining the position of an image of an object on a CCD frame where that object may move around the image area of the CCD device. An example of such an application is for use in imaging stars using large astronomical telescopes.
However we have appreciated that such devices may not be able to provide adequate performance for some applications such as future generations of very large telescopes.
In large astronomical telescopes there is a need for adaptive optics in the sense that the imaging path needs to vary to take account of variations in the earth's atmosphere ca using distortion of the image of stars. Typically, a large telescope will include a deformable mirror for imaging the stars onto a detector. In addition, a portion of the reflected light is split using a beam splitter to a separate detector arrangement used for detecting disturbances in the image caused by variations in the earth's atmosphere. The separate detector will typically include an array of lenses so that the light received from each portion of the mirror is imaged onto a separate detector often termed a wave front sensor or a centroid detector. Each such centroid detector thus receives a separate image of the star being viewed from a separate respective part of the primary mirror and consequently from a specific optical path through the atmosphere to that part of the mirror. Any variation in the image due to the path through the atmosphere to that part of the mirror can, therefore, be detected by each such separate centroid detector.
One such example telescope arrangement is shown in Figure 2 for ease of reference. A telescope 2 images onto imaging optics 4 light from an observed scene (e.g. a particular portion of the sky including faint objects of interest and a bright guide' star in large astronomical telescopes) onto a large deformable mirror device 6, which reflects the light via an optical path to a main sensor 10.
The main sensor 10 integrates the light over a suitable period, typically several seconds, to gather the required image. A portion of the light received is also reflected via a beam splitter 8 and optics 14 onto a reference detector arrangement 12, which may be referred to as a wave front sensor or centroid detector. This wave front sensor determines the position of the imaged guide star for each point of the deformable mirror device and, consequently, provides feedback to a controller 16, which can alter the deformable mirror to ensure any variation due to the earth's atmosphere is compensated.
Figure 3 shows the sensor device 12, which comprises an array of lenses each providing an image of the guide star via a respective portion of the deformable mirror onto a respective sensor 22. If there is any deviation of the image at a particular point on the mirror, then the corresponding image onto one of the centroid detectors 22 will correspondingly move.
The number of separate images of the guide star for which the centroid position must be determined increases with the size of the telescope mirror, approximately one image being required for each square metre of mirror area.
For current generations of telescope this requirement may be met, while maintaining the required frame rate and low noise, by the use of known CCD architectures with multiple multiplication registers each of which reads out a group of spot images corresponding to one region of the telescope mirror. An example of such a CCD is shown in Figure 4.
The known CCD of Figure 4 comprises two half image sections 21 which produce image charge from a received image, which is then clocked to two corresponding half store sections 23. As with the arrangement of Figure 1, the charge is then multiplied in a multiplication register 25 and clocked out to output circuits 27.
We have appreciated that with the progression to larger telescope sizes the existing technologies may not be capable of extension to provide rapid, low noise, readout of a larger number of spots continuously during operation so as to provide information to the deformable mirror, to provide rapid adjustments, thereby providing a correct image to the main image sensor.
In general, we have appreciated that a faster image processing arrangement is needed for the purpose of determining the position of a continuously moving image of an object on a CCD sensor.
SUMMARY OF THE INVENTION
The invention is defined in the claims to which reference is now directed.
The invention provides an arrangement that allows for rapid determination of the position of an image of an object on a CCD sensor in two directions, which may be referred to as X and Y directions or alternatively, as the direction of rows and columns. By providing electrode connections to allow clocking of charge, either along rows or along columns, charge can be clocked into storage pixels along two orthogonal edges of the image area. The use of a process known as "binning" allows very rapid transfer of charge into the charge storage pixels at the side and at the top or bottom of the image area. Accordingly, the charge integrated over a particular time period can be rapidly summed and read out from the image area. This provides a signal representing the distribution of intensity of the image of the object in the X and Y directions and from this the position of the image of the object on the CCD array can be determined. Whilst the precise information from each pixel is lost, due to the charge summing process, the information on the distribution of intensities in the X and Y direction is all that is -.4-required to reliably determine the position of the image of the objection on the CCD array.
The charge storage areas to the side and bottom of the image area may simply be a line of pixels in the image area itself or an extra line of pixels not used for imaging. Such an extra line of pixels could be referred to as "summing pixels" or "summing wells" or, alternatively, the charge may be summed directly into output registers and then clocked from the output registers out to amplifiers for signal detection. A significant advantage of the embodiment of the invention is that the binning process is rapid in comparison to conventional CCD readout as the charge from entire rows or columns is summed together and the number of charge signals to be converted to a voltage at the charge detection circuit is reduced. Accordingly, the process of producing the signals from which the position of the image may be derived is faster in comparison to known arrangements.
At the rapid frame rates which the invention allows, the signal from the guide star will be very small and the use of EMCCD technology to amplify these small signals may be advantageous.
The structure described above provides means for determining the position of a single spot. An array of such structures may be used to determine the positions of a number of such spots and the structures may be arranged in various ways such that, for example, each row delivers signal to a single charge detection circuit.
BRIEF DESCRIPTION OF THE DRAWINGS
An embodiment of the invention will now be described by way of example and with reference to the accompanying figures in which: Figure 1: is a schematic diagram of a CCD imager of known type; Figure 2: is a schematic diagram of a telescope arrangement, which may embody the invention; Figure 3: is a schematic diagram of the reference sensor or wave front sensor, which may embody the invention and could be used in the telescope of Figure 2; Figure 4: is a schematic diagram of a CCD imager of known type used for adaptive optics applications.
Figure 5: is a schematic diagram of a first CCD device embodying the invention; Figure 6: is a schematic diagram of a second CCD device embodying the invention; Figure 7: is a schematic diagram of a third CCD device embodying the invention; Figure 8: shows a readout register arrangement, which may be used in embodiments of the invention; Figure 9: shows the timing sequence that may be used in the arrangement of Figure 8; Figure 10: shows a further timing sequence; Figure 11: shows an alternative readout register arrangement that may be used in embodiments of the invention; Figure 12: shows a timing diagram for the arrangement of Figure 11; Figure 13: shows a further timing diagram for the arrangement of Figure 11; Figure 14: shows an further alternative readout register arrangement; and Figure 15: shows one possible clock arrangement of a CCD pixel that may be used in the embodiments of the invention.
DETAILED DESCRIPTION
The present embodiment comprises a CCD device such as a CCD imager.
The invention is also embodied in a method of operating a CCD device or operating an apparatus incorporating a CCD device, such as a camera or telescope arrangement.
The embodiment of the invention may be used in any application in which the X and Y positions of an image of an object needs to be determined rapidly using a CCD sensor array. The main application of the invention, though, is for use in astronomical telescopes and so this application will be described first for ease of understanding. In large telescopes, such as described above, an image of a faint astronomical object is often taken over long integration periods during which time the image of the object may move on a main detector due to variations in the earth's atmosphere. The movement of components of the image created by various regions of the primary mirror may differ due to the differing optical paths to a large telescope through the atmosphere and this results in a loss of resolution i.e. a blurring of the image. To assist in determining such variations in optical paths, a bright star is often imaged adjacent the dimmer object being acquired and the bright star used to determine such variations due to atmospheric conditions. Knowledge of these variations is then used to change the shape of a deformable mirror within the telescope optics to compensate for the distortion in real time and hence reduce the blurring of the image. If such a bright star is not available in the portion of sky being imaged, it may be artificially created by shining a laser into the earth's atmosphere and stimulating emission from a sodium layer in the atmosphere approximately 90 km above the earth's surface. Such a spot is usually centred on the telescope and so the outer edges of the telescope mirror will actually view the elongated spot as the illuminated portion will have some depth in the sodium layer of the earth's atmosphere.
Accordingly, the task of the reference sensor, or wave front sensor, is to determine the position of a substantially circular shape for portions of the image towards the centre of the mirror or the position of an elongated spot for portions of the image towards the edge of the mirror.
The effects of the earths atmosphere cause the image of the astronomical object to move rapidly across the image area of the main detector. Accordingly, the reference detector must readout the position frequently and, typically, readouts of the order 700 to 1000 frames per second are needed.
A first CCD device embodying the invention is shown in Figure 5. In the embodiment a type of architecture is used, which may be referred to as an orthogonal transfer CCD or as a 2-D transfer CCD. Such electrode structures for CCDs are known and described in: D R Smith, A D Holland, A Martin, D Burt, T Eaton, R Steward, "Developments and Testing of a 2-D Transfer CCD" IEEE Trans. Electron Devices, Vol 53, No. 11, (2006), pp. 2748-54.
A variety of possible clock electrode structures for each pixel are possible and one such arrangement will be described later for completeness. The key feature, though, is that the charge can be clocked in both X and Y directions or along rows and down columns.
The CCD device 22, shown in Figure 5, comprises an image area 24 having multiple pixels, each having an electrode arrangement to allow clocking in both horizontal and vertical directions or, in other words, along rows and along columns. Clock connections 28 allow clocking in each of the directions, so that charge can be ciocked along rows to output register 30 to the side of the image area, or along columns to output register 32 at the bottom of the image area. The clock lines 28 and electrode connections are arranged so that charge can be transferred by binning into the output registers 32, 30 in each of the horizontal and vertical directions. As is known to the skilled person, the process of binning comprises transferring charge from one pixel to another without emptying a final destination pixel of charge, thereby summing charge from pixels into the destination pixel, in this case a pixel in the output register 32, 30.
In operation the signal is integrated in the image section for the first half of the available integration period. It is then transferred quickly into one of the readout registers e.g. the bottom register, binning signal from all the rows together.
Typically, this will be achieved by applying drive pulses to 3 of the 4 image section clocks while holding the 4th static in its "off' condition. Signal is then integrated again for the second half of the available integration period and then transferred quickly into the other readout register e.g. the side register, binning signal from all the columns together. This will typically be achieved by applying pulses to a different set of 3 of the 4 image section clocks. At the end of the integration period the 2 registers therefore contain charge signal patterns, which represent the summed vertical and horizontal profiles of the signal. These signals may be read out simultaneously using common clock signals 26 through the output amplifiers during the first half of the next integration period and digitally processed to extract the centroid information. Alternatively the two registers may be clocked independently and each may be read out at any time between respective binning operations.
The embodiment of the invention provides a number of advantages in rapidly determining the position of the signal spot from an imaged star on the CCD array.
The binning process is very rapid. In the example of an integration period of 1 millisecond for the CCD, the binning process can operate at clock frequencies of the order of MHz, so for an example of 20 x 20 pixels, the binning period is of the order of 20 microseconds. In addition, the number of charge packets to be read out is significantly reduced. For an array of N by N pixels, the number of pixels in a conventional CCD imager to be read out is N2. in the embodiment of the invention, the number of pixels to be read out is 2N, This reduces the required data rate and consequently bandwidth giving a lower readout noise. Also the power dissipation associated with a fast readout is reduced. The signal to noise ratio is also improved by the binning process because the charge summing process does not introduce any extra noise, but the resultant signal is larger whilst the noise component does not increase. Lastly, the process is more efficient because fewer signal calculations need to be performed, as parts of the calculations are inherently performed in the charge summing process. The array of pixels in the X and Y directions is reduced by the summing process to two linear signals representing the sum of the image signals in the X and Y directions.
The external digital processing thereby has fewer calculations to perform to determine the position of the image spot.
The calculations, which can be performed to determine the position of the image spot, could be any suitable calculation, the simplest being to determine the "centre of gravity" of the object imaged on the CCD. The centre of gravity in this context means the point in the X and Y directions, on either side of which the illumination is equally distributed. This may be referred to as the centroid. Other more complex calculations are possible, including detecting a reference signal from the detector and performing a cross correlation of the reference signal in comparison to the detected signal.
A second alternative embodiment is shown in Figure 6 and comprises an image sensor 22 having an image area 24 and clocking lines 26, 28, as previously described. In addition, in this embodiment, a summing well or register 44 is provided into which the charge may be clocked prior to clocking the charge into the output register 42. This additional summing register allows charge to be summed into the register while charge from a previous summation is clocked out from the output register further improving the speed of operation. This summing register may be used in the embodiment of Figure 5. In the embodiment of Figure 6, though, the summing register is arranged to clock charge into a
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variation of the output register arrangement in which a single output register comprises two sections 40 and 42 for receiving charge clocked horizontally and vertically respectively. The charge clocked horizontally along rows is clocked into the summing well to the side of the image area and, subsequently, into the portion 40 of the output register. The charge clocked vertically in columns is summed into the summing well at the bottom of the image area and then into the portion 42 of the output register. The output register 40, 42 is then clocked as a whole to read out the signal charge from the vertical and then the horizontal summing in one continuous sequence. The advantage of this arrangement is that the COD only requires a single amplifier 46, rather than two amplifiers.
The arrangement of Figure 6 has the advantage of only requiring a single amplifier, but also allows the readout period from the registers to be extended for the whole of the integration period. While charge is being integrated in the image area, the previous charge information is read out by the registers. Secondly, it allows integration of the signals giving horizontal and vertical profiles of the spot to be time-interleaved more finely than simply between first and second halves of the total integration period. A number of shorter integration periods could be used with charge alternately binned horizontally and vertically into the summing wells while the signals from the previous complete integration period are being readout through the registers. This technique helps reduce any timing skew between the horizontal and vertical profiles in the case of a moving spot. This mode is also applicable to operation with a pulsed light source (e.g. a pulsed laser guide star in adaptive optics applications), where the signals from the alternate pulses could be separately summed.
A further CCD arrangement embodying the invention is shown in Figure 7. In this arrangement, the CCD comprises a device 22 with an image area 24 and clock lines 26, 28, as previously described. Similarly, a summing well 44 and two portions of output register 40, 42 are provided. In this embodiment, though, the clock signals for the register portions are arranged so as to readout one of the register portions via the output amplifier 46 and then the other register portion.
In an alternative embodiment of figure 6 the horizontal and vertical summing wells may be clocked independently and the two register sections share common clocks. In this case charge from either one summing well would be shifted to the corresponding register and read out. On completion of this readout charge from the second summing well would be shifted to its corresponding register section -10-for readout. In each case only one register section would contain signal so separation of the horizontal and vertical information is maintained. This embodiment is advantageous when a number of such detectors are combined into an array.
One known clock electrode structure which could be used to control the movement of charge signals in orthogonal directions is shown in figure 15. In this structure the movement of charge is controlled by four independent sets of electrodes. A first set of electrodes 108 take the form of strips running vertically in the diagram and these are connected to a clocked voltage source VG1. A second set 114 take the form of strips running horizontally in the diagram and these are connected to a clocked voltage source VG2. Two further sets 120, 124 take the form of separate triangular electrodes and these are connected to clocked voltage sources VG3 and VG4 respectively. Channel stop regions 117 are formed in the silicon beneath the intersection regions of the first and second electrodes.
To transfer charge vertically VG1 is held at a low clock level and a sequence of clock pulses, as typically used for any 3-phase CCD, is applied to the other electrodes from VG2, VG3 and VG4. To transfer charge horizontally VG2 is held at clock low level and a similar sequence of pulses is applied to VG1, VG3 and VG4. The detailed sequence of the pulses applied determines the direction of charge transfer, up/down or leftlright, as for any standard 3-phase CCD.
In the embodiments of Figures 5, 6 or 7, various readout timing arrangements are possible. Taking the example of a 1 millisecond integration period, an integration period of 1/2 millisecond and then binning in the horizontal direction followed by further integration period of � millisecond and binning in the vertical direction could be used. Alternatively, an interleaving approach could be used in which binning in alternate directions for smaller subdivisions of the whole integration period. For example, integrating for 0.25 milliseconds and then binning in one direction, a second integration of 0.25 milliseconds binning in the orthogonal direction, and third and fourth integration periods of 0.25 milliseconds and binning in each direction.
The CCD sensors embodying the invention may have a variety of different array sizes. Typical examples are 16 pixels x 16 pixels, 20 pixels x 20 pixels.
The multiple CCD image areas described in relation to each of these embodiments are typically arranged as groups, for example, of 80 x 80 separate image areas, which may be referred to as subapertures. These subapertures each image an object via a respective portion of the mirror. The image areas or subapertures are constructed from a single silicon CCD device, as will now be described with reference to Figures 8 to 14.
There is a need for a gap between each of the subaperture image areas typically of the order of a distance of say 6 pixels between blocks of 20 x 20 pixels, When reading out the image signal, this extra 6 pixel distance results in wasted time while the register reads each of the subapertures in turn. We have appreciated, therefore, the need for efficient arrangements of the output register in relation to each of the subapertures.
A first such register arrangement for a CCD device embodying the invention is shown in Figure 8. In this arrangement, the register follows a "serpentine" path around the subaperture areas. For each subaperture, the register is adjacent a side and either the top or the bottom. As can be seen, this arrangement provides a very efficient use of the space between the subaperture image areas. The alternate subaperture image areas will clock in differing directions. Starting from the top right subaperture image area 24, this will bin in a horizontal direction to the right and a vertical direction to the top. The next subaperture image area will image and then bin horizontally to the right but vertically to the bottom. The image areas are arranged with this alternating arrangement of the directionality of clocking. The operation is thus an integration period followed by clocking appropriately to the side an integration period and then clocking appropriately to either the top or bottom, depending upon the subaperture image area. After the integration periods, the entire length of the register 50 is clocked out via the amplifier 44. During this clocking period, the next integration is occurring.
In this architecture the horizontally binned and vertically binned images, collected in the first and second halves of a 1.4 ms integration period, are transferred simultaneously into the registers. Read out of the complete array requires a total of 80 x (20 + 20 + N) + Ng cycles where N is the number of additional blank pixels per sub array and Ng is the number of prescan pixels i.e. the number of pixels in the gain register structure.
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The basic readout sequence for the so-called serpentine readout arrangement is shown in Figure 9. In this example of 80 x 80 subapertures at the clock frequency of 5 MHz readout will be completed in 800 microseconds provided that the number of pixels between subapertures N is approximately 10. An alternate clocking arrangement is shown in Figure 10.
In the so called "comb" arrangement of Figure lithe subapertures of a given row have the same orientation and architecture and bin to the summing register on the same side and to the bottom. The charge collected in the first half of say a 1.4 millisecond integration period is binned horizontally then transferred to the register and read out during the second half of the integration period. After this readout is completed, the charge from the second half of the integration period is binned vertically and read out during the first half of the next integration period.
The timing sequence is shown in Figure 12 The clocking scheme for this arrangement can be summarised as 1 integrate, 2 bin, 3 transfer, 4 readout, for each of the horizontal and vertical directions, It is during the transfer and readout stages for one direction that the integration for the opposite direction can occur.
An alternative clocking arrangement shown in Figure 13 is particularly applicable to the case of pulsed laser guide stars.
A further possible register arrangement is shown in Figure 14. In this arrangement, each subaperture image area 24 is spaced apart by a larger amount than the previously described arrangements. This gap, counter intuitively, can further increase the speed of readout (or decrease the number of charge detection circuits required) and reduce the need to clock out any empty pixels. The upper line of subapertures is arranged back-to-back with the next line of subapertures and the readout register 60 is divided into two portions 62 and 64, one for each of the adjacent lines of subapertures. The pixels from each subaperture are binned into the adjacent summing wells as previously described and then alternately the summing registers on the side and the bottom are readout into the respective portion 62, 64 of the output register 60. The additional gaps 66 between each of the subapertures would apparently leave a space in the train of pixels. However, the portions of the output register 62, 64 join together at a summing point 68 and so at each gap in the train of signals from one line of subapertures, the charge from the other line of apertures is presented. This occurs because of an extra delay introduced in one of the register portions 64 such that the image pixels are effectively interleaved at the -13-node 68. This arrangement can significantly reduce any wasted clocking time as there will be very few and possibly no empty pixels to be clocked. In essence, the arrangement provides interleaving of the charge from adjacent rows of subapertures arranged back-to-back.
The modes of operation of the CCD device embodying the invention have been mentioned above, but will now be described in some more detail. In a "tracking" mode in which each subaperture image area 24 of the device is monitoring the image signal received from a respective portion of the telescope mirror, the charge is binned in the horizontal and vertical directions as described above.
However, it is also possible to use the device in a normal full frame mode in which all of the pixels are individually clocked to the output register and read out.
Advantageously, this allows the device to make a reference image and to allow computation and signal processing on such reference images, which may be then used in the tracking mode. For example, at the start of an acquisition session a full frame image from each of the subapertures may be produced and stored for analysis. That analysis could include deriving an appropriate correlation function against which subsequently, in tracking mode, the signals from each subaperture are compared. The device can swap between the two modes during operation so that, for example, the image can be initially acquired from the subapertures for analysis and then swapped to the tracking mode during an image acquisition period for the main sensor. Once the image has been acquired by the main sensor, the subapertures can swap back to the full frame mode for analysis and producing a reference signal.
A further mode of operation is possible in situations in which the image to be tracked is known. In the example of the telescope, the known image may be a laser generated "guide star" the timing of which is known. For example, by pulsing the laser that produces this guide star, the clocking arrangement can be devised to synchronise with this pulsing so that the integration period lasts as long as the laser pulse persists and, when the illumination caused by the laser pulse extinguishes, the charge is then binned into the summing wells ready for the laser pulse to cause illumination again for a subsequent acquisition period.
By binning charge during the period in which there is no illumination from the guide star, smearing due to charge transfer whilst the device is illuminated, can be reduced, if not eliminated.
-14 -Various further modes of operation are possible, all having the common theme of the use of binning in two different directions of the CCD imager to detect an effective position of an image on the CCD array, thereby reducing the data rate needed and time needed to make this determination.
The CCD device in any of the embodiments may include a multiplication register as shown, for example, in Figure 1. In such an arrangement, the output from the output register is provided first to a multiplication register and then to an output amplifier.
In the centroiding applications discussed above, the output of the CCD is a signal representing the binned charge which is provided to a means for determining the centroid of an imaged object such as a DSP or a general purpose computer. -15-

Claims (25)

  1. CLAIMS1. A CCD device comprising an array of pixels arranged in rows and columns defining an image area, the pixels having clock connections arranged to allow clocking of charge either along rows or along columns, the device having a first set of storage pixels to receive charge clocked along rows to a first edge of the image area and a second set of storage pixels to receive charge clocked along columns to a second edge of the image area, the clock connections being arranged to bin charge into the first and second sets of storage pixels.
  2. 2. A CCD device according to claim 1, wherein the storage pixels comprise pixels that are part of the image area.
  3. 3. A CCD device according to claim 1, wherein the storage pixels comprise pixels that form an output register.
  4. 4. A CCD device according to claim 1, wherein the storage pixels form a separate summing register.
  5. 5. A CCD device according to any preceding claim, wherein the device comprises separate output registers for charge clocked along rows and columns respectively.
  6. 6. A CCD device according to claims 1 to 4, wherein the device comprises a single output register having two portions for receiving charge clocked along rows and columns respectively.
  7. 7. A CCD device according to claim 6, wherein the two portions are arranged with one serially connected to the other.
  8. 8. A CCD device according to claim 6, wherein the two portions are arranged with a connection to a common output node and clock connections to allow alternate clocking of each portion. -16-
  9. 9. A CCD device according to claim 6, wherein the two portions are arranged with a connection to a common output node and common clock connections but with separately clocked summing registers to allow independent charge transfer into the two portions of the output register.
  10. 10. A CCD device according to any preceding claim comprising a plurality of arrays of pixels providing a plurality of image areas arranged in a regular pattern.
  11. 11. A CCD device according to claim 10, wherein the image areas are arranged in rows and columns.
  12. 12. A CCD device according to claim II, wherein a continuous readout register is provided for each row or column of image areas.
  13. 13. A CCD device according to claim 12, wherein the continuous register is arranged in a serpentine manner along each row or column.
  14. 14. A CCD device according to claim 12, wherein the continuous register is arranged with a linear portion along one edge of the image areas and separate portions along orthogonal edges of the image areas.
  15. 15. A CCD device according to claim 14, wherein adjacent rows of image areas are arranged such that their respective continuous registers are connected together with an offset such that clocking out the register reads charge alternately for each row of image areas.
  16. 16. A CCD device according to any preceding daim, in which the rows and columns are orthogonal.
  17. 17. An imager comprising the CCD device of any preceding claim.
  18. 18. A centroiding device comprising a CCD device according to any of claims ito 16 and means for analysing a signal from the binned charge to determine the centroid of an imaged object. -17-S
  19. 19. A method of operating a CCD device of the type having pixels arranged in rows and columns defining an image area, comprising: -accumulating charge within the pixels as a result of a received image; -clocking charge along rows to a first edge and along columns to a second edge; -binning charge at the first edge and at the second edge; and -reading out the binned charge.
  20. 20. A method according to claim 19, in which accumulating charge alternates with clocking charge alternately to the first edge and to second edge.
  21. 21. A method according to claim 20, in which reading out the binned charge comprises alternately reading charge from the first edge and from the second edge.
  22. 22. A method according to claim 20 or 21, in which accumulating charge is synchronised with a pulsed light source.
  23. 23. A method according to any of claims 19 to 22, in which charge from multiple image areas is read out into a common output register.
  24. 24. A method according to any of claims 19 to 23, further comprising using the readout charge to determine the position of an imaged object in the image area.
  25. 25. A method of centroiding comprising the method according to any of claims 19 to 24 and analysing a signal from the binned charge to determine the centroid of an imaged object. -18-
GB0811092.6A 2008-06-17 2008-06-17 CCD device Expired - Fee Related GB2461042B (en)

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WO2012088539A1 (en) * 2010-12-24 2012-06-28 Lockheed Martin Corporation Wide field image distortion correction
WO2013079900A1 (en) * 2011-12-01 2013-06-06 E2V Technologies (Uk) Limited Detector

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US6965396B1 (en) * 1995-06-28 2005-11-15 The Johns Hopkins University Video-centroid integrated circuit

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GB2371403B (en) 2001-01-18 2005-07-27 Marconi Applied Techn Ltd Solid state imager arrangements

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US6965396B1 (en) * 1995-06-28 2005-11-15 The Johns Hopkins University Video-centroid integrated circuit
WO2005006742A1 (en) * 2003-07-11 2005-01-20 Hamamatsu Photonics K.K. Photo-detector

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2012088539A1 (en) * 2010-12-24 2012-06-28 Lockheed Martin Corporation Wide field image distortion correction
US8994784B2 (en) 2010-12-24 2015-03-31 Lockheed Martin Corporation Wide field image distortion correction
WO2013079900A1 (en) * 2011-12-01 2013-06-06 E2V Technologies (Uk) Limited Detector
GB2497410A (en) * 2011-12-01 2013-06-12 E2V Tech Uk Ltd Detector comprising a CCD sensor
CN104247403A (en) * 2011-12-01 2014-12-24 E2V技术(英国)有限公司 Detector
GB2497410B (en) * 2011-12-01 2015-09-30 E2V Tech Uk Ltd Detector
US9380238B2 (en) 2011-12-01 2016-06-28 E2V Technologies (Uk) Limited Detector for determining the location of a laser spot
CN104247403B (en) * 2011-12-01 2019-05-17 E2V技术(英国)有限公司 Detector

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