GB2457507A - Lattice reduction for detection of MIMO systems using an LLL-based algorithm - Google Patents

Lattice reduction for detection of MIMO systems using an LLL-based algorithm Download PDF

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GB2457507A
GB2457507A GB0802932A GB0802932A GB2457507A GB 2457507 A GB2457507 A GB 2457507A GB 0802932 A GB0802932 A GB 0802932A GB 0802932 A GB0802932 A GB 0802932A GB 2457507 A GB2457507 A GB 2457507A
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parity
value
lattice
matrix
accordance
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David Milford
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Toshiba Europe Ltd
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Toshiba Research Europe Ltd
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/02Arrangements for detecting or preventing errors in the information received by diversity reception
    • H04L1/06Arrangements for detecting or preventing errors in the information received by diversity reception using space diversity
    • H04L1/0618Space-time coding
    • H04L1/0631Receiver arrangements
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/02Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/0202Channel estimation
    • H04L25/024Channel estimation channel estimation algorithms
    • H04L25/0242Channel estimation channel estimation algorithms using matrix methods
    • H04L25/0244Channel estimation channel estimation algorithms using matrix methods with inversion
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B7/00Radio transmission systems, i.e. using radiation field
    • H04B7/02Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas
    • H04B7/04Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas
    • H04B7/0413MIMO systems
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B7/00Radio transmission systems, i.e. using radiation field
    • H04B7/02Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas
    • H04B7/04Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas
    • H04B7/08Diversity systems; Multi-antenna system, i.e. transmission or reception using multiple antennas using two or more spaced independent antennas at the receiving station
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/02Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/03Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
    • H04L25/03006Arrangements for removing intersymbol interference
    • H04L25/03178Arrangements involving sequence estimation techniques

Abstract

A method of applying lattice reduction to a signal bearing information, e.g. for use in Multiple-Input Multiple-Output (MIMO) detection. The method is based on the Lenstra-Lenstra-Lovasz (LLL) algorithm but makes use of the parity value of a row sum of an inverse of a lattice reduction matrix and, on the basis of the parity value, controls determination of quantisation of observations to a reduced lattice. Hence, efficiency of the LLL-type computations is improved as there is no need for the explicit computation of the row-wise sum. A possible hardware implementation of the quantisation of one component is illustrated in the figure.

Description

Wireless Communications Apparatus The present invention is in the field of wireless communication, and particularly, but not exclusively, the field of multiple input, multiple output (MIMO) communications systems.
Conventional communication systems can be represented mathematically as: y = Hx + v in which, for a MIMO communication system, y is an n-by-i vector representing the received signal, H is an n-by-rn channel matrix modelling the transmission characteristics of the communications channel, x is an rn-by-i vector representing transmit symbols, v is an n-by-i noise vector and wherein rn and n denote the number of transmit and receive antennas respectively.
It will be understood by the skilled reader that the same mathematical representation can be used for multi-user detection (MUD) in code division multiple access (CDMA) systems.
Recent publications have demonstrated how the use of a technique called Lattice Reduction can improve the performance of MIMO detection methods.
For example, "Lattice-Reduction-Aided Detectors for MIMO Communication Systems", (H. Yao and G.W. Wornell, Proc. IEEE Globecom, Nov. 2002, pp. 424-428) describes Lattice-reduction (LR) techniques for enhancing the performance of multiple-input multiple-output (MIMO) digital communication systems.
"MMSE-based lattice-reduction for near-ML detection of MIMO systems" (D. Wubben, R. Bohnke, V. Kuhn and K.-D. Kammeyer, ITO Workshop on Smart Antermas, Jul.
2004, pp. 106-113) adapts the lattice-reduction aided schemes described above to the M1tvISE criterion.
"From lattice-reduction-aided detection towards maximum-likelihood detection in MIMO systems" (C. Windpassinger, L.H.-J. Lampe and R.F.H. Fischer, Wireless and Optical Communications (WOC 2003)) made refinements to the approach taken in Wubben et al. and determined that by including further computational steps considerable improvement could be made to power efficiency gain.
Publications such as Yao and Womell, Wubben et al. and Windpassinger et al. only disclose arrangements which output hard decisions from the MIMO decoder. However, it is desirable to obtain soft information in order to improve the performance of any outer FEC decoder. A method for obtaining soft-output from reduced lattice MIMO (RL-MIMO) decoders was described in GB Patent Application 2429884.
A number of lattice reduction algorithms exist. Any one of these can be used to calculate a transformation matrix, T, such that a reduced basis, H, is given by H=HT The matrix I contains only complex integer entries and its determinant is +1-1.
One suitable lattice reduction algorithm is the Lenstra-Lenstra-Lovasz (LLL) algorithm referred to above, which is disclosed in Wubben et al., and also in "Factoring Polynomials with Rational Coefficients", (A. Lenstra, H. Lenstra and L. Lovasz, Math.
Ann., Vol. 261, pp. 5 15-534, 1982, hereinafter referred to as "Lenstra et a!."), and in "An Algorithmic Theory of Numbers, Graphs and Convexity", (L. Lovasz, Philadelphia, SIAM, 1980, hereinafter referred to as "Lovasz").
After lattice reduction, the system is re-expressed as: y = Hx + v = HTT'x + v = HT'x + v = z + V where z = T'x. The received signal, y, in this redefined system is then equalised to obtain an estimate of z r This equalisation process then employs, for example, a linear zero forcing (ZF) technique, which obtains: r =(HHrY'HYr Since is close to orthogonal, should suffer much less noise enhancement than if the receiver directly equalised the channel Hr Of course, other equalisation techniques could be used. For example, MMSE techniques, or more complex successive interference cancellation based methods, such as in the published prior art identified above, could be considered for use.
Assuming that the transmitted symbols contained in x are obtained from an M-QAM constellation then x can be formed as x = as + /3 where s is a member of the set of complex integers (limited by the dimension of the constellation) and a and /3 are scalar values (/3 being complex). Figure 1 illustrates this, showing that a defines the minimum distance between two adjacent constellation points and is the complex offset from the origin when sO.
s=(x-/3)/a The equalised signal, z, can then therefore be quantised as =aQ{(z-T1fl)/a}+T'1fl (1) which represents a translation and scaling to an integer lattice and quantisation, where Q { } is the quantisation function that rounds each element of its argument to the nearest integer, and where 1 is a column vector of ones. It should be appreciated by the reader that, the quantisation function apart, the remaining operations are a result of M-QAM constellations being scaled and translated versions of the integer lattice. The integer quantisation therefore requires the same simple scaling and translation operations.
The estimation procedure therefore involves the following sequence of calculations: 1. From the row-sum, calculate the offset vector: z0 = T' lfl 2. Adjust the received vector using the offset: z = z - 3. Normalise the adjusted vector: z, = zn/a 4. Quantise the normalised vector: ZQ = Q{z} 5.Rescale: zQ=azQ 6. Reinstate offset: = z + z0 To obtain soft information, i.e. LLRs, the technique described in GB Patent Application 2429884 may be used.
Lattice reduction can be done in several ways but the most common method is the Lenstra-Lenstra-Lovasz (LLL) algorithm as noted above. A version of the LLL algorithm modified for complex lattices is presented in "Complexity analysis of lattice reduction for MIMO decoding" (M. Sandell et al, WCNC 07, March 2007, pp 1088- 1092) and further elaborated in UK Patent Application 0614088.3 (currently awaiting publication). The nature of this lattice reduction process is set out in the following steps, given a QR decomposition of the channel: ThIPUT: Q, R, E (default E = Im) OUTPUT: Q,R,T (1) Initialisation: Q = Q, R R, T = E (Ia) Initialise the row-sum: S = E' I (la) initialise V = E' and s = Vi, i.e., s = (2) k=2 (3) while k �=m (4) for 1k -I,...,1 (5) p = (R(l, k) / R(l,l)) (6) f/J!=O (7) R(1:l,k) R(l: l,k) -pR(1:1,1) (8) T(:,k) = T(:,k) -,uRT(: 1) (8a) s(l) = s(:,k) -pRT(: 1) (8b) V(l,:)= pV(k,:)+ V(l,:) (9) end (10) end (11) if oR(k -1, k -1)J2 > !R(k, k)2 + IR(k -1,k)2 (12) swap columns k-i and k in R and T (12a) swap elements k-I and k in s (12b) swaprowsk-landkin V (13) calculate Givens rotation matrix � such that element R(k -1, k) becomes zero: a= R(k-I,k--1) -1: k, k - 0(a b') b= R(k,kl) -b a) with HR(k_I:k,k_1)II (14) R(k -I:k,k -1:m)=�R(k -1:k,k -1:m) (15) Q(:,k-l:k)=Q(:,k-l:k)OT (16) k=max{k-l,2} (17) else (18) k=k+1 (19) end (20) end It should be noted that, in Wubben et al., it is proposed that 5 = 3 / 4 and that, in line (5) above, (x) denotes the nearest complex integer to x.
The above algorithm operates either by replacement of columns with linear combinations of other columns (line 8) or by exchanging columns' positions in the matrix (line 12).
When using lattice reduction in, for example, MIMO decoding or precoding, the lattice reduction matrix T is required in order to transform the estimate in the reduced lattice back into the lattice corresponding to the transmitted signal. Equation I set out above suggests that, to obtain, it is also necessary to obtain the inverse of T or, more precisely, the row-wise sum given by the product T 1. To summarise the content of UK Patent Application 0614088.3, that application discloses how the LLL algorithm can be modified so that performance of this modified algorithm can be used to compute this row-wise sum at the same time as T and without the need to perform an explicit matrix inversion.
It will be appreciated by the reader that E' is trivial if E is chosen as the identity matrix or the output of a previous call to the modified LLL algorithm (in which case the inverse would already have been calculated). Execution of the algorithm so disclosed by suitable means will now produce the lattice reduction inverse V = T' and its row-wise sum s = T' 1 without the need for an explicit matrix inversion. It should be noted that V and s are independent in the sense that they can be computed individually, i.e., if only one of them is sought, the other one does not have to be computed.
Nevertheless, the calculation described in Equation I must still be undertaken.
In general terms, aspects of the invention provide a method of lattice reduction for use, for example, in MIMO detection, based substantially on the LLL algorithm but determining a parity value of a row sum of an inverse of a lattice reduction matrix, and on the basis of the parity value, controlling determination of quantisation of observations to a reduced lattice.
An aspect of the invention provides a method of applying lattice reduction to a signal bearing information, including determining a parity value for a row sum of an inverse lattice reduction matrix in order to control said lattice reduction method.
Another aspect of the invention provides a method of determining a lattice coordinate selection in a lattice reduction method, comprising determining a row-sum parity value of an inverse lattice reduction matrix, and quantising a normalised observation to one or other of its neighbouring lattice constellation coordinates on the basis of said parity value.
Another aspect of the invention provides a lattice reduction detector comprising a lattice coordinate selector operable to determine, on the basis of a received signal, a selected one of a plurality of coordinate points in a reduced lattice, said selected point approximating to data perceived on said received signal, said selector including means for determining a parity value for a row sum of an inverse lattice reduction matrix corresponding to said reduced lattice and said selector being operable to be controlled by a determined parity value in determining said selection.
Another aspect of the invention provides a quantiser for use in a lattice reduction detector, the quantiser comprising means for determining a parity value of a received observation value and means for logically combining said parity value with said received observation value so as to quantise said observation value to a point in a reduced lattice in accordance with said parity value.
Aspects of the invention may comprise a computer program product comprising computer executable instructions operable to cause a computer to become configured to perform a method in accordance with any of the above identified aspects of the invention relating to methods. The computer program product can be in the form of an optical disk or other computer readable storage medium, a mass storage device such as a FLASH memory, or a read only memory device such as RUM. The method may be embodied in an application specific device such as an ASIC, or in a suitably configured device such as a DSP or an FPGA. The computer program product could, alternatively, be in the form of a signal, such as wireless signal or a physical network signal.
Embodiments of the invention will now be described by way of example only, with reference to the accompanying drawings, in which: Figure 1 illustrates a graph of a standard 1 6-QAM constellation for representing data to be transmitted; -Figure 2 illustrates schematically a MIMO system including a transmitter and a receiver; Figure 3 illustrates in further detail the receiver of Figure 2; and Figure 4 illustrates a hardware implementation of a quantisation stage of a lattice reduction aided decoder in accordance with a specific embodiment of the invention; The above aspects of the invention, and specific features of suitable embodiments thereof, will now be described with reference to an implementation of the invention for the equalization of a wireless communication system. Figure 2 illustrates such a system, comprising a MIMO data communications system 10 of generally known construction. New features of the MIMO data communications system, in accordance with a specific embodiment of the invention, will be evident from the following
description.
The communications system 10 comprises a transmitter device 12 and a receiver device 14. It will be appreciated that in many circumstances, a wireless communications device will be provided with the facilities of a transmitter and a receiver in combination but, for this example, the devices have been illustrated as one way communications devices for reasons of simplicity.
The transmitter device 12 comprises a data source 16, which provides data (comprising information bits or symbols) to a channel encoder 18. The channel encoder 18 is followed by a channel interleaver 20 and, in the illustrated example, a space-time encoder 22. The space-time encoder 22 encodes an incoming symbol or symbols as a plurality of code symbols for simultaneous transmission from a transmitter antenna array 24 comprising a plurality of transmit antennas 25. In this illustrated example, three transmit antennas 25 are provided, though practical implementations may include more, or fewer, antennas depending on the application. For example, proposals being developed under the draft 802.11 n standard by the IEEE suggest use of 2 transmit and 2 receive antennas (2x2), while 4x4 is also an allowable approach under the draft standard.
The encoded transmitted signals propagate through a MIMO channel 28 defined between the transmit antenna array 24 and a corresponding receive antenna array 26 of the receiver device 14. The receive antenna array 26 comprises a plurality of receive antennas 27 which provide a plurality of inputs to a lattice-reduction-aided decoder 30 of the receiver device 14. In this specific embodiment, the receive antenna array 26 comprises three receive antennas 27.
The lattice-reduction-aided decoder 30 has the task of removing the effect of the MIMO channel 28. The output of the lattice-reduction-aided decoder 30 comprises a plurality of signal streams, one for each transmit antenna 25, each carrying so-called soft or likelihood data on the probability of a transmitted bit having a particular value. This data is provided to a channel de-interleaver 32 which reverses the effect of the channel interleaver 20, and the de-interleaved bits output by this channel de-interleaver 32 are then presented to a channel decoder 34, in this example a Viterbi decoder, which decbdes the convolutional code. The output of channel decoder 34 is provided to a data sink 36, for further processing of the data in any desired manner.
The specific function of the lattice-reduction-aided decoder 30 will be described in due course.
Figure 3 illustrates, in a schematic form, hardware operably configured (by means of software or application specific hardware components) as the receiver device 14. The receiver device 14 comprises a processor 110 operable to execute machine code instructions stored in a working memory 112 andlor retrievable from a mass storage device 116. A general purpose bus 114 provides connectivity to enable user operable input devices 118 to communicate with the processor 110. The user operable input devices 118 comprise, in this example, a keyboard and a mouse, though it will be appreciated that any other input devices could also or alternatively be provided, such as another type of pointing device, a writing tablet, speech recognition means, or any other means by which a user input action can be interpreted and converted into data signals.
Audio/video output hardware devices 120 are further connected to the general purpose bus 114, for the output of information to a user. Audio/video output hardware devices can include a visual display unit, a speaker or any other device capable of presenting information to a user.
Communications hardware devices 122, connected to the general purpose bus 114, are connected to the antenna 26. In the illustrated embodiment in Figure 4, the working memory 112 stores user applications 130 which, when executed by the processor 110, cause the establishment of a user interface to enable communication of data to and from a user. The applications in this embodiment establish general purpose or specific computer implemented utilities that might habitually be used by a user.
Communications facilities 132 in accordance with the specific embodiment are also stored in the working memory 112, for establishing a communications protocol to enable data generated in the execution of one of the applications 130 to be processed and then passed to the communications hardware devices 122 for transmission and communication with another communications device. It will be understood that the software defining the applications 130 and the communications facilities 132 may be partly stored in the working memory 112 and the mass storage device 116, for convenience. A memory manager could optionally be provided to enable this to be managed effectively, to take account of the possible different speeds of access to data stored in the working memory 112 and the mass storage device 116.
On execution by the processor 110 of processor executable instructions corresponding with the communications facilities I 32, the processor 110 is operable to establish communication with another device in accordance with a recognised communications protocol.
The lattice reduction aided decoder 30 employs a LLL type computation method as will now be set out in accordance with a first specific embodiment of the invention.
By way of introduction, aspects of the present invention take account of further improvement in the efficiency of LLL type computations, in that making use of the parity (defined below) of the row-wise sum of the inverse matrix (henceforward referred to as the "row-sum parity") without any need for explicit computation of the row-wise sum. The parity of an integer n, commonly described by the terms "even" or "odd", is defined here to be equal to the remainder {0,1) after division by two. Thus, n =6 (even); p(n) =0 n-5(odd);p(n)= I The parity of a complex integer (a +jb) is defined here, for the purpose of this disclosure, and for the benefit of performance of aspects of the invention, as the parity of the sum of its real and imaginary parts, i.e. equal to (a+b)mod 2.
Then, lattice reduction is achieved by performance of the following algorithm: TNPUT: Q, R, E (default E = I m) OUTPUT: Q,R,T (1) Initialisation: Q, R = R, T = E (Ia) Initialise the row-sum parity: Pr = p(E 1) (2) k=2 (3) whilek�=m (4) forl=k,.,l (5) p = (R(i, k) / R(l,l)) (6) jf/J!=O (7) (1: 1,k) = (1: l,k)-pR(l:1,1) (8) T(:,k) T(:,k) -pRT(: 1) (8a) Calculate the parity of p: where denotes a moduio-2 sum (8b) Update the row-sum parity vector: Pr(l)Pr(L')tPp APr(k)} where denotes a logical XOR and where A denotes a logical AND (9) end (10) end (11) if 8JR(k -1, k -1)2 > R(k, k)12 + IR(1 - (12) swap columns k-i and kin J and T (12a) swap elements k-I and k in Pr (13) calculate Givens rotation matrix � such that element -I, k) becomes zero: a-R(k-1,k-1) -R(k -I: k, k -1)0 (a bfl b-R(k,k1) = (-b a) with IIk(k -1: k, k -1)11 (14) R(k -1: k,k -I: m)= �R(k -I: k,k -1: m) (15) Q(:,k -l:k)=(:,k_1:k)�T (16) k=max{k-1,2} (17) else (18) k=k+1 (19) end (20) end To compute the row-sum parity independently of the row-sum, the lines I a, 8a and 1 2a in the version of the algorithm described in the introduction have been replaced and line 8b has been added.
Line (Ia) initialises the row-sum parity vector as Pr = p(E 1) where p indicates the parity function and 1 is a column vector containing ones. In the most common case, where E is a permutation matrix (either an identity matrix or the result of sorting columns in a pre-processing stage), there is a single 1 in each row or column of E or E'. In this case: P=1 The modulo-2 sum set out in line (8a) may be performed by a simple exclusive OR operation on the least significant bits of the operands, as is indicated.
Use of the row-sum parity rather than the row-sum itself reduces computational complexity by replacing arithmetic operations by simpler logical operations.
Accordingly this offers the option of implementing these logical operations in hardware rather than software if an application specific circuit is devised.
In accordance with a second specific embodiment of the invention, a method will now be described for defining hard information based on this derived row-sum parity information.
In the above introduction, the equalised signal z in the reduced lattice is given by z = T'x The present embodiment of the invention takes account of the effect of this transformation on signals x from an M-QAM constellation normalised to integer values �1, �3, �5, etc. For example, given a constellation point m+jn where m and n are odd, and an element a+jb of the matrix T' then, in the product (a+jb)(m+jn)=(am-bn)+j(an+bm) p(a + jb) =0 = p(am -bn) =0, p(an + bm) =0 p(a+jb)=1=p(am -bn)=l,p(an+bm)=1 Each component of z is calculated from a sum of such products so the parity of(a+jb) determines the parity of the result.
An odd sum in a row of the matrix T' produces odd values in the corresponding component of z; in contrast, an even row-sum will result in even values in the corresponding component of z. In other words, the parity of the row-wise sum of T determines whether the transformation will result in constellation points in the normalised reduced lattice on odd or even lattice coordinates.
This observation can be used to condition the quantisation process in the reduced lattice: if the row-sum parity is odd/even then quantisation should be to the nearest odd/even lattice point respectively. For example, a normalised value in the range 3<z <4 must be closer to 3 than to I or to 5, and closer to 4 than to 2 or to 6. Therefore, the quantisation yields a result 3 if the row-sum parity is odd or 4 if the row-sum parity is even.
In place of the sequence of operations required by Equation 1 as detailed in the introduction, the estimation method can therefore be summarised by: 1. Normalise to integer lattice: z =z/(a) 2. Quantise to the nearest oddleven integer point as appropriate: =[znj+{pznj)epr} where Lz j rounds towards -and O is the parity function (modulo-2 remainder).
3. For comparison with Equation 1, the estimate in the reduced lattice becomes z(,a)z although the integer value would be of greater practical use in subsequent stages of a MIMO detector.
It will be evident to the reader of the foregoing description that the quantisation process proposed here is simpler and requires considerably less computational effort than the procedure described in the introduction. This adds to the advantage described earlier in this description in relation to the computation of row-sum parity in place of the full row-sum.
Previous approaches to lattice-reduction-aided MIMO detection require either an explicit matrix inversion of T or an indirect computation of the row-wise sum of the inverse. In each case the shift-and-scale operation described in Equation I must be implemented.
In comparison, by replacing the computation of the row-sum with the more economical calculation of the row-sum parity, the current invention reduces the complexity of the lattice reduction algorithm. The complexity of the subsequent estimation procedure in a MIMO detector is also substantially reduced because logical operations described in relation to the specific embodiment replace most of the arithmetic operations implied by Equation 1.
Figure 4 shows a block diagram of a possible hardware implementation of the quantisation of one component. This will reside within the lattice reduction aided decoder 30 illustrated in figure 2, for a hardware implementation thereof.
A first block 200 implements multiplication by a constant (2/a), which can be achieved efficiently by a sequence of shift and add operations. This arrives at a value of zr,, being normalised from z as indicated above.
A second block 202 implements the floor function [z J. In a fixed-point hardware implementation, this simply consists of stripping away the low-order (fraction) bits. The parity of the remaining integer can be determined by the state of its least significant bit and this is combined in an XOR gate 204 with the relevant bit from the row-sum parity vector. The result {pz j) Pr} (which will be a I or a 0) determines whether or not to increment the "floored" integer, in an adder 206.
It will be appreciated that the foregoing disclosure of specific embodiments of the invention can be applied to any communications product employing MIMO transmission techniques, to take advantage of the benefits of the invention. Further, the invention is applicable to any circumstance in which the detection of symbols which may be based on multiple input is required. This could arise in systems where a plurality of antennas are provided in separate locations. Further, CDMA MUD may be a suitable basis for use of the method of the present invention.
The invention has been exemplified above by way of an algorithm, from which the skilled person would be able to determine a software implementation, and by way of an illustrative hardware embodiment of the quantisation stage of a lattice reduction aided decoder. The software implementation could be introduced as a stand alone software product, such as borne on a storage medium, e.g. an optical disk, or by means of a signal. Further, the implementation could be by means of an upgrade or plug-in to existing software. The hardware implementation so demonstrated could sit alongside software implementations of other components, or hardware implementation of those other components as required.
Whereas the invention can be so provided, it could also be by way exclusively by hardware, such as on an ASIC.
The reader will appreciate that the foregoing is but one example of implementation of the present invention, and that further aspects, features, variations and advantages may arise from using the invention in different embodiments. The scope of protection is intended to be provided by the claims appended hereto, which are to be interpreted in the light of the description with reference to the drawings and not to be limited thereby.
It will also be appreciated that all column wise operations determined above could be reconfigured so as to be presented as row-wise operations, with suitable self evident alterations to the algorithms so disclosed.

Claims (20)

  1. CLAIMS: I. A method of applying lattice reduction to a signal bearing information, including determining a row sum parity vector of an inverse lattice reduction matrix in order to control said lattice reduction method.
  2. 2. A method in accordance with claim 1 and comprising performing column-wise lattice reduction including at least one of either size reduction steps or exchange steps on columns of a lattice reduction matrix, wherein, on performance of a size reduction step in terms of a size reduction factor, a parity value of said size reduction factor is determined and in which case said step of determining a row sum parity vector comprises performing an update step on said row sum parity vector controlled by said parity value.
  3. 3. A method in accordance with claim 2 wherein said parity value is determined from real and imaginary parts of said size reduction factor.
  4. 4. A method in accordance with claim 3 wherein said parity value is determined as a modulo-2 sum of said real and imaginary parts of said size reduction factor.
  5. 5. A method in accordance with any one of claims 2 to 4 wherein said update step comprises performing, for an element of said row sum parity vector corresponding to said size reduction step, a modulo-2 sum of an existing value of said element and a value comprising a logical AND of said parity value and an existing value of an element of said row sum parity vector corresponding to column of said lattice reduction matrix by which said size reduction step is effected, arid adopting said modulo-2 sum as a new value of said element of said row sum parity vector.
  6. 6. A method in accordance with any preceding claim and including initialising said row sum parity vector to a vector comprising parities of a matrix product of a permutation matrix with a column vector, each element of the column vector being unity.
  7. 7. A method in accordance with claim 6 wherein said permutation matrix comprises a pre-processing matrix corresponding to a sorting step, said sorting step being performed before commencement of said lattice reduction.
  8. 8. A method in accordance with claim 6 wherein said permutation matrix is an identity matrix.
  9. 9. A method in accordance with any preceding claim and wherein said lattice reduction method comprises selecting a constellation point of a reduced lattice normalised to constellation points defined in integer coordinates, said selecting including determining, from a row sum parity, of the inverse lattice reduction transformation matrix whether the parity of a component of a vector defining the constellation point to be chosen is odd or even and then, on the basis of the result of such determining, selecting the nearest integer value being odd or even, as the case may be, as the value to be chosen.
  10. 10. A lattice reduction based decoder, operable to apply a lattice reduction to a signal bearing information, including means for determining a row sum parity vector of an inverse lattice reduction matrix in order to control said lattice reduction.
  11. II. A decoder in accordance with claim 10 and operable to perform column-wise lattice reduction and including means for performing a size reduction step on columns of a lattice reduction matrix and means for performing an exchange step on columns of said lattice reduction matrix, and further comprising parity value determining means for determining, on performance of a size reduction step in terms of a size reduction factor, a parity value of said size reduction factor, and in which case said means for determining a row sum parity vector is operable to perform an update step on said row sum parity vector controlled by said parity value.
  12. 12. A decoder in accordance with claim 11 wherein said parity value determining means is operable to determine said parity value from real and imaginary parts of said size reduction factor.
  13. 13. A decoder in accordance with claim 12 wherein said parity value determining means is operable to determine said parity value as a modulo-2 sum of said real and imaginary parts of said size reduction factor.
  14. 14. A decoder in accordance with any one of claims 11 to 13 wherein said means for determining a row sum parity vector is operable, in performing said update step, to perform, for an element of said row sum parity vector corresponding to said size reduction step, a modulo-2 sum of an existing value of said element and a value comprising a logical AND of said parity value and an existing value of an element of said row sum parity vector corresponding to column of said lattice reduction matrix by which said size reduction step is effected, and adopting said modulo-2 sum as a new value of said element of said row sum parity vector.
  15. 15. A decoder in accordance with any one of claims 10 to 14 and including means for initialising said row sum parity vector to a vector comprising parities of a matrix product of a permutation matrix with a column vector, each element of the column vector being unity.
  16. 16. A decoder in accordance with claim 15 wherein said permutation matrix comprises a pre-processing matrix corresponding to sorting means, said sorting means being operable to perfonn a sort before commencement of said lattice reduction.
  17. 17. A decoder in accordance with claim 15 wherein said permutation matrix is an identity matrix.
  18. 18. A decoder in accordance with any one of claims 10 to 17 and comprising selecting means for selecting a constellation point of a reduced lattice normalised to constellation points defined in integer coordinates, said selecting means including determining means for determining, from a row sum parity of the inverse lattice reduction transformation matrix whether the parity of a component of a vector defining the constellation point to be chosen is odd or even and then, on the basis of the result of such determining, selecting the nearest integer value being odd or even, as the case may be, as the value to be chosen.
  19. 19. A computer program product comprising computer executable instructions operable to cause a computer to perform a method in accordance with any one of claims 1 to 9.
  20. 20. A carrier medium bearing a computer program product in accordance with claim 19.
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US11309992B2 (en) * 2018-07-17 2022-04-19 Qualcomm Incorporated Using lattice reduction for reduced decoder complexity

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Publication number Priority date Publication date Assignee Title
US11309992B2 (en) * 2018-07-17 2022-04-19 Qualcomm Incorporated Using lattice reduction for reduced decoder complexity

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