GB2412010A - Method of processing diamond - Google Patents

Method of processing diamond Download PDF

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Publication number
GB2412010A
GB2412010A GB0405542A GB0405542A GB2412010A GB 2412010 A GB2412010 A GB 2412010A GB 0405542 A GB0405542 A GB 0405542A GB 0405542 A GB0405542 A GB 0405542A GB 2412010 A GB2412010 A GB 2412010A
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GB
United Kingdom
Prior art keywords
diamond
carrier
processing
polished surface
bonding
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
GB0405542A
Other versions
GB0405542D0 (en
GB2412010B (en
Inventor
Lee Coulbeck
Anthony Sakari Garraway
Paul Durnford Taylor
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Dynex Semiconductor Ltd
Original Assignee
Dynex Semiconductor Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Dynex Semiconductor Ltd filed Critical Dynex Semiconductor Ltd
Priority to GB0405542A priority Critical patent/GB2412010B/en
Publication of GB0405542D0 publication Critical patent/GB0405542D0/en
Publication of GB2412010A publication Critical patent/GB2412010A/en
Application granted granted Critical
Publication of GB2412010B publication Critical patent/GB2412010B/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/02—Elements
    • C30B29/04—Diamond
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B33/00—After-treatment of single crystals or homogeneous polycrystalline material with defined structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002—Preparing wafers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/185—Joining of semiconductor bodies for junction formation
    • H01L21/187—Joining of semiconductor bodies for junction formation by direct bonding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • H01L21/2003—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy characterised by the substrate
    • H01L21/2007—Bonding of semiconductor wafers to insulating substrates or to semiconducting substrates using an intermediate insulating layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76256—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques using silicon etch back techniques, e.g. BESOI, ELTRAN
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/8206—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using diamond technology
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components

Abstract

A method of processing diamond in the manufacture of semiconductors comprises mounting the diamond on a carrier, applying semiconductor processing to the diamond, and then separating the processed diamond from the carrier. The method is character-ised in that the diamond is attached to the carrier by direct bonding. The direct bonding typically comprises forming a flat polished surface on the diamond and a corresponding flat polished surface on the carrier, bringing the surfaces into intimate contact, and annealing the diamond and carrier at an elevated temperature.

Description

METHOD OF PROCESSING DIAMOND
Field of the Invention
This invention relates to a method of processing diamond in the manufacture of semiconductor devices.
Background to the Invention
The application of diamond as a semiconductor material is potentially useful par- ticularly to the power semiconductor sector by virtue of the high thermal conductivity, high carrier mobility, and high electric breakdown field that the material has. As a result attempts are being made to develop commercially viable semiconductor devices made from diamond.
One of the difficutibes associated with processing diamond material is that semi- conductor grade single crystal diamond is only available in small pieces whereas produc- tion semiconductor processing equipment is optimised for processing large wafers or cir- cular slices of material usually 1 00-300mm in diameter. In order to maximise working de vice yield it is necessary to take advantage of the improved cleanliness and process capa- bility of mainstream semiconductor processing equipment as well as minimising direct handling of the diamond material and so a method needs to be found of processing the diamond chips as if they were wafers.
Current state of the art Is to use an adhesive medium such as wax, polyamide, ep oxy resin or other organic material to attach the chip to be processed to a silicon wafer of convenient size for the equipment to be used to process the material. This approach has disadvantages in that the adhesive is a potential source of contamination, care has to be taken in the subsequent selection of processing chemicals to avoid environments that may degrade the joint between the diamond chip and the silicon wafer and that the adhesive will not survive the high temperature process steps required to make a semiconductor device. Diamond chips attached to wafers by the above means may need to be attached and detached a number of times during the device manufacturing sequence with additional risk of damage to the device at each stage. It is also not possible to use the best available chemical cleaning processing equipment to clean the diamond die prior to annealing at elevated temperature as the die need to be detached prior to the anneal in order to avoid contamination from the adhesive.
The following documents are considered as background to the invention: US Pat ent 6562127; US Patent 6127243; US Patent 6328796.
Summary of the Invention
The invention involves the production of a diamond carrier assembly that can be viably processed using standard semiconductor processing equipment. This is achieved by direct bonding the diamond chip to a silicon carrier wafer. This eliminates the difficulty of processing small pieces of diamond material on processing equipment designed to process larger wafers. Thus the benefits of the invention are realised in terms of increased ease of processing and increased device yield through device handling improvements and reduc tion of contamination.
A silicon wafer is used as a substrate to semi-permanently carry the diamond chips while they are being processed. The method of attaching the diamond die to the carrier wafer is to use the technique of direct bonding. Direct bonding is a technique that has been used extensively in other fields such as the manufacture of silicon on insulator wafers for the production of SOI semiconductor devices. The method depends on the bonding that occurs between two flat and highly polished surfaces when they are brought into in timate contact. After annealing at an elevated temperature (sometimes together with the application of pressure) a strong and permanent bond is achieved between the two pieces.
The direct bonded assembly negates all of the previously mentioned disadvantages of the state of the art practice as there is no foreign material to introduce contamination, the bond does not deteriorate when exposed to standard semiconductor manufacturing chemicals or processes and the bond is not degraded by high temperature processing.
The bond is permanent until it is desired to remove the carrier wafer from the diamond chip either to assemble the completed device or to process the alternate side of the chip.
At the completion of device manufacture, or when required, the carrier wafer is removed from the diamond chip by etching the wafer off using a silicon etchant. Etch mix tures such as a mixture of acetic acid, hydrofluoric acid and nitric acid are suitable for this purpose as the silicon will be removed without attacking the diamond chip.
The diamond chip can also be mounted to hydrophilic surface such as an oxidised silicon wafer.
The diamond can have a layer of polysilicon deposited on it prior to bonding.
Either the diamond or the carrier wafer can have a layer of metal such as tungsten deposited on it prior to bonding.
The wafer could be a material other than silicon.
The anneal can be performed either at atmospheric pressure or under vacuum.
The anneal could be performed in an environment of argon or other inert gas or a mixture of an inert gas and oxygen or pure oxygen.
The anneal could be performed with the assembly placed under pressure so as to press the bonding parts together and aid the bonding process.
The carrier wafer may also be removed from the diamond chip by grinding and polishing or a combination of grinding and etching Process for Manufacture of the Mounted Diamond Chip i) Clean the silicon wafer leaving the surface in a hydrophobic state and particle free; for example immersion in a dilute solution of hydrofluoric acid followed by a typi cal RCA sequence of processes.
ii) Clean the diamond chip surface to leave it particle free.
iii) The diamond chip is brought into intimate contact with the silicon wafer at the po sition required. This is best done in one continuous motion avoiding movement of the contacted surfaces which will cause particle generation and prevent a good bond from forming.
iv) Anneal the carrier assembly. Typical conditions are a 1 hour anneal at 1000 to 11 00 C in a furnace with an inert cover gas such as nitrogen. - 4

Claims (12)

1. A method of processing diamond in the manufacture of semiconductors, comprising mounting the diamond on a carrier, applying semiconductor processing to the diamond, and then separating the processed diamond from the carrier, characterized in that the diamond is attached to the carrier by direct bonding.
2. A method according to Claim 1, wherein the direct bonding comprises forming a flat polished surface on the diamond and a corresponding flat polished surface on the carrier, bringing the surfaces into intimate contact, and annealing the diamond and carrier at an elevated temperature.
3. A method according to Claim 2, wherein the elevated temperature is from 1 000 C to 1 1 00 C.
4. A method according to Claim 2 or 3, wherein the annealing is continued for an hour.
5. A method according to Claim 2, 3 or 4, comprising applying pressure be tween the diamond and the carrier during annealing.
6. A method according to any preceding claim, wherein the carrier is a silicon carrier wafer.
7. A method according to Claim 6, wherein the silicon wafer is an oxidised silicon wafer.
8. A method according to Claim 6, wherein a metallic layer is deposited on the silicon wafer before the diamond is bonded thereto.
9. A method according to any preceding claim, comprising providing a layer of polysilicon on the flat polished surface of the diamond.
10. A method according to any preceding claim, wherein the bonding is car ried out under vacuum.
11. A method according to any of Claims 1 to 9, wherein the bonding is car- ried out in an atmosphere of inert gas, pure oxygen, or a mixture of the two.
12. A method according to any preceding claim, wherein the diamond is sepa- rated from the carrier after processing by grinding or etching of the carrier, or a combi nation of the two.
lo. of - ,
GB0405542A 2004-03-10 2004-03-10 Method of processing diamond Expired - Fee Related GB2412010B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB0405542A GB2412010B (en) 2004-03-10 2004-03-10 Method of processing diamond

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB0405542A GB2412010B (en) 2004-03-10 2004-03-10 Method of processing diamond

Publications (3)

Publication Number Publication Date
GB0405542D0 GB0405542D0 (en) 2004-04-21
GB2412010A true GB2412010A (en) 2005-09-14
GB2412010B GB2412010B (en) 2008-02-13

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Family Applications (1)

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Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5650639A (en) * 1993-03-11 1997-07-22 Harris Corporation Integrated circuit with diamond insulator
US6562127B1 (en) * 2002-01-16 2003-05-13 The United States Of America As Represented By The Secretary Of The Navy Method of making mosaic array of thin semiconductor material of large substrates

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5650639A (en) * 1993-03-11 1997-07-22 Harris Corporation Integrated circuit with diamond insulator
US6562127B1 (en) * 2002-01-16 2003-05-13 The United States Of America As Represented By The Secretary Of The Navy Method of making mosaic array of thin semiconductor material of large substrates

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
Wolter S D et al. , "Direct fusion bonding of silicon to polycrystalline diamond", Diamond and Related Materials vol 11 pp482-486, 2002 *

Also Published As

Publication number Publication date
GB0405542D0 (en) 2004-04-21
GB2412010B (en) 2008-02-13

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PCNP Patent ceased through non-payment of renewal fee

Effective date: 20100310