GB2374701B - Improved apparatus and method for multi-threaded signal procesing - Google Patents

Improved apparatus and method for multi-threaded signal procesing

Info

Publication number
GB2374701B
GB2374701B GB0217126A GB0217126A GB2374701B GB 2374701 B GB2374701 B GB 2374701B GB 0217126 A GB0217126 A GB 0217126A GB 0217126 A GB0217126 A GB 0217126A GB 2374701 B GB2374701 B GB 2374701B
Authority
GB
United Kingdom
Prior art keywords
profiled
improved apparatus
threaded
temporal
signal procesing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
GB0217126A
Other languages
English (en)
Other versions
GB0217126D0 (en
GB2374701A (en
Inventor
Ravi Subramanian
Keith Rieken
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Infineon Technologies AG
DISSOLUTION CORP M
Morphics Technology Inc
Original Assignee
Infineon Technologies AG
DISSOLUTION CORP M
Morphics Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies AG, DISSOLUTION CORP M, Morphics Technology Inc filed Critical Infineon Technologies AG
Publication of GB0217126D0 publication Critical patent/GB0217126D0/en
Publication of GB2374701A publication Critical patent/GB2374701A/en
Application granted granted Critical
Publication of GB2374701B publication Critical patent/GB2374701B/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Evolutionary Computation (AREA)
  • Geometry (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Stored Programmes (AREA)
  • Logic Circuits (AREA)
  • Mobile Radio Communication Systems (AREA)
  • Advance Control (AREA)
GB0217126A 2000-01-27 2001-01-29 Improved apparatus and method for multi-threaded signal procesing Expired - Fee Related GB2374701B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US49263400A 2000-01-27 2000-01-27
PCT/US2001/002982 WO2001055917A1 (fr) 2000-01-27 2001-01-29 Appareil et procede ameliores pour un traitement de signal a plusieurs voies logiques

Publications (3)

Publication Number Publication Date
GB0217126D0 GB0217126D0 (en) 2002-09-04
GB2374701A GB2374701A (en) 2002-10-23
GB2374701B true GB2374701B (en) 2004-12-15

Family

ID=23956997

Family Applications (1)

Application Number Title Priority Date Filing Date
GB0217126A Expired - Fee Related GB2374701B (en) 2000-01-27 2001-01-29 Improved apparatus and method for multi-threaded signal procesing

Country Status (6)

Country Link
JP (1) JP2003521072A (fr)
KR (1) KR100784412B1 (fr)
AU (1) AU2001233119A1 (fr)
DE (1) DE10195202T1 (fr)
GB (1) GB2374701B (fr)
WO (1) WO2001055917A1 (fr)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6542998B1 (en) 1997-02-08 2003-04-01 Pact Gmbh Method of self-synchronization of configurable elements of a programmable module
US6988188B2 (en) 2000-03-01 2006-01-17 Realtek Semiconductor Corp. Data object architecture and method for xDSL ASIC processor
US8058899B2 (en) 2000-10-06 2011-11-15 Martin Vorbach Logic cell array and bus system
US9037807B2 (en) 2001-03-05 2015-05-19 Pact Xpp Technologies Ag Processor arrangement on a chip including data processing, memory, and interface elements
US7444531B2 (en) 2001-03-05 2008-10-28 Pact Xpp Technologies Ag Methods and devices for treating and processing data
US7996827B2 (en) 2001-08-16 2011-08-09 Martin Vorbach Method for the translation of programs for reconfigurable architectures
US8914590B2 (en) 2002-08-07 2014-12-16 Pact Xpp Technologies Ag Data processing method and device
US7657893B2 (en) * 2003-04-23 2010-02-02 International Business Machines Corporation Accounting method and logic for determining per-thread processor resource utilization in a simultaneous multi-threaded (SMT) processor
US7693257B2 (en) 2006-06-29 2010-04-06 Accuray Incorporated Treatment delivery optimization
CN107193539B (zh) * 2016-03-14 2020-11-24 北京京东尚科信息技术有限公司 多线程并发处理方法和多线程并发处理系统
US11288072B2 (en) * 2019-09-11 2022-03-29 Ceremorphic, Inc. Multi-threaded processor with thread granularity

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4821220A (en) * 1986-07-25 1989-04-11 Tektronix, Inc. System for animating program operation and displaying time-based relationships
US5519867A (en) * 1993-07-19 1996-05-21 Taligent, Inc. Object-oriented multitasking system
US5537226A (en) * 1994-11-22 1996-07-16 Xerox Corporation Method for restoring images scanned in the presence of vibration
US5870588A (en) * 1995-10-23 1999-02-09 Interuniversitair Micro-Elektronica Centrum(Imec Vzw) Design environment and a design method for hardware/software co-design
US5946487A (en) * 1996-06-10 1999-08-31 Lsi Logic Corporation Object-oriented multi-media architecture
US6112020A (en) * 1996-10-31 2000-08-29 Altera Corporation Apparatus and method for generating configuration and test files for programmable logic devices

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4821220A (en) * 1986-07-25 1989-04-11 Tektronix, Inc. System for animating program operation and displaying time-based relationships
US5519867A (en) * 1993-07-19 1996-05-21 Taligent, Inc. Object-oriented multitasking system
US5537226A (en) * 1994-11-22 1996-07-16 Xerox Corporation Method for restoring images scanned in the presence of vibration
US5870588A (en) * 1995-10-23 1999-02-09 Interuniversitair Micro-Elektronica Centrum(Imec Vzw) Design environment and a design method for hardware/software co-design
US5946487A (en) * 1996-06-10 1999-08-31 Lsi Logic Corporation Object-oriented multi-media architecture
US6112020A (en) * 1996-10-31 2000-08-29 Altera Corporation Apparatus and method for generating configuration and test files for programmable logic devices

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
"Multithreading with Distributed Functional Units" - Bernard Gunther - IEEE Transactions on Computer, Pages 399-411, Vol 46, No 4 April 1997. *

Also Published As

Publication number Publication date
GB0217126D0 (en) 2002-09-04
WO2001055917A1 (fr) 2001-08-02
KR20030004327A (ko) 2003-01-14
DE10195202T1 (de) 2003-04-30
JP2003521072A (ja) 2003-07-08
GB2374701A (en) 2002-10-23
AU2001233119A1 (en) 2001-08-07
KR100784412B1 (ko) 2007-12-11

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Legal Events

Date Code Title Description
732E Amendments to the register in respect of changes of name or changes affecting rights (sect. 32/1977)
PCNP Patent ceased through non-payment of renewal fee

Effective date: 20170129