GB2368235A

GB2368235A - Preventing data losses due to timing errors in a receiver operating in a power-saving mode

Info

Publication number: GB2368235A
Application number: GB0025029A
Authority: GB
Inventors: Shuichi Otake
Original assignee: Matsushita Communication Industrial UK Ltd
Current assignee: Matsushita Communication Industrial UK Ltd
Priority date: 2000-10-12
Filing date: 2000-10-12
Publication date: 2002-04-24
Anticipated expiration: 2020-10-12
Also published as: GB0025029D0; GB2368235B

Abstract

A mobile terminal receiving a transmitted cycle comprising first and second data parts operates in a power-saving mode in which a relatively high power-consuming clock is turned off during the first part of the cycle in which the first data part is received. This standby period is timed by a less accurate but lower power low frequency clock. The high frequency clock is turned on at the end of the timed period and operates during a second period while the second data part is being received. The error in the timing of the turning-on of the high frequency clock is determined and compared with a threshold. If the timing error is below the threshold, the high frequency clock is again turned off at the end of the second period for the next standby period. If the timing error is greater than the threshold, the high frequency clock is left running until the end of the second period in a later cycle. By this means correct reception of paging signals is not impaired by excessive error in the time at which the high frequency clock is turned on.

Description

MOBILE COMMUNICATIONS The present invention relates to a method of operating a mobile telephone or other mobile station in a communications system, and in particular to implementation of a power saving standby mode. The present invention is applicable to, but not limited to, mobile telephones for use in cellular radio communications systems such as the Global System for Mobile Communications (GSM).

In a cellular communications system, the area over which service is provided is divided into a number of smaller areas called cells. Typically each cell is served from a base transceiver station (BTS) which has an antenna or antennas for radio transmission to and reception from a plurality of user stations, normally mobile stations such as mobile telephones. An established cellular radio communications standard is GSM (Global System for Mobile Communications). A further standard currently being defined is the Universal Mobile Telecommunications System (UMTS).

There is a general requirement for mobile telephones to consume as little power as possible during operation.

This allows for a mobile telephone's power supply, usually a rechargeable battery, to be small and light and also allows longer periods of operation before recharging of the battery is required.

One particular way in which power is conserved in conventional mobile telephones is by powering down most of the electronic circuitry of the mobile telephone during repeated short periods when the telephone has no operations to perform. In, for example, a GSM system, when the telephone is not actively being used for a call or other procedure, then usually the telephone is only required to detect whether it is being paged by the base transceiver station. The GSM system is a time division multiplexed access (TDMA) system, in which paging signals for a specific mobile telephone are contained in a small range of predetermined timeslots within a known repeated cycle of timeslots as defined in the GSM specification.

Consequently, GSM mobile telephones are able to power down most of their circuitry, including the circuitry providing the function of receiving and processing paging signals, during the remainder of the GSM timeslot cycle. In conventional GSM mobile telephones essentially all of the electronic circuitry required during active use of the mobile telephone is powered down for the remainder of

the GSM timeslot cycle, including the central processing unit and a relatively power-hungry high frequency clock which is conventionally used in the operation of the central processor unit and other circuit components. The duration of the powered-down period is controlled by a less power-hungry low frequency clock in combination with a wake-up timer switch. These operate to reactivate the high frequency clock and the remaining circuitry in time for receipt of the next intended paging signals from the base station.

The above described standby mode successfully provides a major reduction in power consumption, especially for mobile telephones where users do not make long or frequent calls. Nevertheless, a number of disadvantages arise. For example, in order to reduce the power consumed during the standby period, the low frequency clock and wake-up timer switch are conventionally operated with a minimum amount of circuitry, and typically no temperature or voltage compensation is included. This can lead to inaccuracy in the timing at which the low frequency clock and wake-up timer switch operate to switch the high-frequency clock back on so that the remaining circuitry required to correctly receive and process the paging signals from the base

station is not turned on at the correct time. This can impair the correct receipt and processing of the paging signals by the main circuitry of the mobile telephone. If the reactivation of the high frequency clock is timed to include a large amount of tolerance to accommodate such errors in the low frequency clock and wake-up timer switch, then this leads to a repeated and systematic increase in the length of time during which the high frequency clock and other circuitry is operating, with a corresponding increase in power consumption. These disadvantages are further magnified and complicated by the desire to use low cost and low power consumption components for the wake-up timer switch and low frequency clock.

In a first aspect the present invention provides a control apparatus for a mobile station of a communications system, wherein the control apparatus controls repeated switching between operational and standby modes of the mobile station; the control apparatus employing a higher power or higher precision timing means, such as a high frequency clock, during each period of the operational mode, and a lower power or lower precision timing means, such as a low frequency clock, during each period of the standby mode to control

the duration of the period of the standby mode, after which the control apparatus activates the next operational period; the control apparatus employing error analysing means during each period of the operational mode to analyse any error in the time the operational mode was activated; and wherein in response to such an error or a size of such an error, the control apparatus extends the operational mode instead of entering the next period of the standby mode.

In a second aspect the present invention provides a control apparatus for a mobile station of a communications system, wherein the control apparatus switches operational units on shortly before the start of each periodic transmission of a given type of data by the communications system and switches the operational units off shortly after the end of each transmission of the given type of data by the communications system, thereby entering a standby mode; the control apparatus being adapted to inhibit switching off of the operational units in response to an error in the timing of the switching on of the operational units.

The present invention also provides a mobile station comprising control apparatus in accordance with the first

or second aspect.

Embodiments of the present invention will now be described, by way of example only, with reference to the accompanying drawings, in which: Figure 1 is a schematic illustration of part of a cellular radio communications system; Figure 2 schematically illustrates components of a mobile telephone; Figure 3 schematically illustrates functional units of a controller of the mobile telephone illustrated in Figure 2; Figure 4 schematically illustrates a portion of a sequence of GSM timeslots; Figure 5a schematically illustrates a low frequency clock output and a high frequency clock output of the controller shown in Figure 2 in relation to received paging data ; Figure 5b illustrates counting of the number of high

frequency clock pulses that occur during one low frequency clock pulse ; Figures 6a to 6c schematically illustrate different timing arrangements for switching on and off the high frequency clock relative to receipt of a paging signal; Figure 7a schematically illustrates a relationship between the low frequency clock output, the high frequency clock output and received paging data during standby operation when the high frequency clock is left powered on between two consecutive paging blocks; Figure 7b schematically illustrates the relationship between the low frequency clock output, the high frequency clock output and received paging data when the high frequency clock is left powered on between three consecutive received paging blocks; Figure 8 shows process steps relating to the standby mode as carried out by the controller shown in Figure 3.

Figure 1 is a-schematic illustration of part of a cellular radio communications system. By way of example three mobile telephones 2,4 and 6 are shown. The mobile

telephones 2, 4 and 6 employ respective radio links 8, 10 and 12 established between them and a combined base station controller/base transceiver station (BSC/BTS) 14. The BSC/BTS 14 is coupled to a mobile services switching centre (MSC) 16 which in turn is coupled to a public switched telephone network (PSTN) 18. In the present embodiment the MSC 16, the BSC/BTS 14 and the mobile telephones 2,4 and 6 operate according to the GSM specification. The geographical area served by the BSC/BTS 14 constitutes one cell of the cellular communication system, i. e. each of the mobile telephones 2,4 and 6 are in this cell. The system contains other cells served by other BSC/BTSs which for clarity are not shown.

Further details of the mobile telephones, in particular mobile telephone 2, will now be described with reference to Figure 2. As shown, the mobile telephone 2 comprises a controller 20 which is coupled to a memory 22; a microphone 24 and loudspeaker 26 enabling the user to input voice and hear audio output; a user interface such as a keyboard 28 by which the user can input numbers to be called, other information and instructions for controlling various features of the mobile telephone 2; a display 30 on which incoming or outgoing telephone

numbers and other information can be displayed ; and a radio transmitter and receiver 32, coupled to an antenna 34, for transmitting and receiving radio communications over the radio link 8. The controller 20 controls the overall operation of the mobile telephone 2 in compliance with the GSM specification in conventional manner.

Figure 3 shows a block diagram illustrating functional units of the controller 20. The controller 20 comprises a central processor unit (CPU) 40 which performs analysing, determining and decision-making functions. The clock signal for the CPU 40 is provided by the high frequency clock 42. The high frequency clock 42 comprises a temperature compensated voltage controlled crystal oscillator (TCVCXO), which in the present embodiment is of type number MAA3171A available from NDK Europe Limited. This oscillator provides a high frequency output of approximately 13MHz as the basic clock signal for the CPU 40.

The CPU 40 adjusts the frequency output of the high frequency clock 42 to synchronise the output with respect to radio frequencies transmitted by the BSC/BTS 14 of the cellular communications system. The CPU40 implements this adjustment by supplying a variable voltage level from its

digital to analogue (D/A) converter 44 to the high frequency clock 42. The output of the high frequency clock 42 is thereby adjusted to remain constant despite variations in temperature or voltage supply.

The CPU 40 is also linked to an RF block 46, a signal processor 48 and a timing control function 50. In operation, the RF block 46 controls operation of the radio transmitter and receiver 32 under the direction of the CPU 40 and effects RF modulation and de-modulation of outgoing and incoming signals, respectively.

The signal processor 48 operates to code data to be transmitted into the required GSM format under instruction from the CPU 40, and the coded signals are then forwarded to the RF block 46 for RF modulation and ultimate transmission through the radio transmitter and receiver 56. The data to be transmitted includes control signals specified by the CPU 40 and during a call includes, for example, voice information input by the user through the microphone 24, in which case the coding by the signal processor 48 includes digitising of the voice signal for incorporation into GSM bit stream data format.

In the case of communications received from the BSC/BTS 14, the signal processor 48 operates to receive the demodulated bit stream from the RF block 46 and decode that bit stream.

Both the signal processor 48 and the RF block 46 require access to the clock signal supplied by the high frequency clock 42. In the present embodiment, this access is provided to the RF block 46 and the signal processor 48 via the CPU 40.

Both the RF block 46 and the signal processor 48 also require specific timing control signals which serve to specify GSM receive or transmit time windows, so that they are activated to function in correspondence with the bursts of data they are required to process at any particular moment. In the present embodiment this timing control function is performed by the timing control unit 50, which itself receives the high frequency clock signal via the CPU 40. The CPU 40 monitors the timing control 50. The above described functional units constitute the main functional units of the controller.

As will be described in further detail later below, unless the controller 20 is required to be in operation

(as is the case for example during a call or other active process), then the high frequency clock 42 and consequently the CPU 40 and the other main functional units described above can be switched off, thereby implementing a power-saving standby mode.

However, the main functional units do then need to be switched on again for short periods at regular intervals in order to re-synchronise the high frequency clock 42 with respect to the RF frequencies transmitted from the BSC/BTS 14 and also to receive and analyse paging signals transmitted by the BSC/BTS 14 in order to detect whether the mobile telephone is being paged. The controller 20 therefore comprises standby mode functional units for monitoring the length of time that should be allowed to pass before the high frequency clock is reactivated, as well as implementing the re-activation. The standby mode functional units are a wake-up timer switch 58, a low frequency clock 60 and a clock counter 52.

In the present embodiment the low frequency clock 60 comprises a low frequency oscillator supplied as part number NC-146 by the Seiko Epson Corporation. This oscillator provides an output frequency of approximately 33KHz.

The low frequency clock 60 provides a low frequency clock signal that is monitored by the wake-up timer switch 58 in order to reactivate the high frequency clock 42 at an appropriate time. The ratio between the clock signal from the high frequency clock and the clock signal from the low frequency clock 60 is determined by the clock counter 52. This ratio is read and processed by the CPU 40 to determine how many cycles of the low frequency clock need to be counted by the wake-up timer switch 58 in any given standby power down period before the high frequency clock is reactivated. Each time the CPU wishes to power down the high frequency clock 42, it provides the required count value to the wake-up timer switch 58.

The wake-up timer switch 58 feeds a DC signal to the high frequency clock 42. The DC signal is set high when the high frequency clock 42 is to be activated and set low when the high frequency clock 42 is to be switched off, that is the standby mode is to be entered.

On receipt of the wake-up count value from the CPU 40, the wake-up timer switch 58 operates to change the DC input to the high frequency clock 42 to low, consequently switching it off, and at the same time starts to count cycles of the low frequency clock 60.

During the standby period the only functional units shown in Figure 3 that remain in operation are the low frequency clock 60 and the wake-up timer switch 58, as indicated by the dotted box 56. All of the other functional units, as indicated by dotted box 54, remain shut down and therefore consume no power.

When the number of cycles from the low frequency clock 60 counted by the wake-up timer switch 58 reaches the designated count level, then the DC output of the wake-up timer switch goes high, which turns the high frequency clock 42 and consequently all the other functional units in box 54 back on.

In order to conserve power during the standby periods, there is no control of the voltage supply to the low frequency clock 60. Also, the low frequency clock 60 is a low cost component that does not comprise any temperature control features.

The overall procedure of switching the high frequency clock 42 on and off is controlled by the CPU 40 to enable receiving of-relevant paging signals which are transmitted by the BSC/BTS 14 according to the GSM specification, as will now be described further with

reference to Figures 4, 5a and 5b.

The GSM standard specifies a time division multiple access (TDMA) system employing timeslots of 0.577ms. Figure 4 schematically illustrates a portion 64 of a sequence of such timeslots. The timeslots are arranged in TDMA frames consisting of eight consecutive timeslots numbered by convention 0 to 7 inclusive. The sequence 64 of timeslots shown in Figure 4 includes four complete TDMA frames, namely the TDMA frames 66,68, 70 and 72.

For simplicity, the sequence 64 of timeslots represents the continuous sequence of timeslots transmitted by the BSC/BTS 14 on one particular RF channel which is due to be received by the mobile telephone 2 over the radio link 8. The information transmitted by the BSC/BTS 14 is coded into constituent parts which are distributed amongst particular timeslots of the data stream of which the sequence 64 is a part, according to the protocol specified in the GSM specification. More particularly data forming a control channel is placed in the timeslots numbered zero of each consecutive TDMA such that, when the information from all the timeslots numbered zero of 51 consecutive TDMA frames is collected in order, an overall assembly of data known as a multi-frame is achieved. The multi-frame 74 shown in Figure 4 includes

the data from the timeslots numbered zero of the TDMA frames 66, 68, 70 and 72. Timeslots 1 to 7 of each TDMA frame contain traffic data for calls in progress to other mobile stations, details of which are not pertinent to the understanding of the present embodiment. The data from timeslot zero of the TDMA frame 66 forms, in the example shown in Figure 4, frame 12 of the multi-frame 74, that from the TDMA frame 68 forms frame 13, that from the TDMA frame 70 forms frame 14, that from the TDMA frame 72 forms frame 15 and so on.

Frames 6 to 9 of the control channel multi-frame 74 are allocated to contain a first block of paging data PO, frames 12 to 15 of the multi-frame 74 are allocated to contain a second block of paging data Pi, and so on through to a ninth block of paging data P8 as shown in Figure 4.

Frames 2 to 5 inclusive of the multi-frame 74 are allocated to contain data that the BSC/BTS 14 transmits indicating to each mobile station, over the course of a number of multi-frames, which of the paging blocks PO to P9 will contain the paging information for a particular mobile telephone. Once a particular mobile telephone has ascertained this information from the BSC/BTS, it no

longer needs to process the information contained in frames 2 to 5 of the multi-frame 74. Instead, for the purposes of detecting whether it is being paged, it will only need to receive and process the data from the frames contained in whichever paging block it has been allocated.

In the present embodiment, the control channel multiframe 74 is broadcast repeatedly by the BSC/BTS 14 on the physical channel represented by a single frequency transmitting the data stream 64.

When the BSC/BTS 14 pages a particular mobile telephone, it includes the unique ID of that mobile telephone as part of the paging message which it sends in the paging block allocated to that particular mobile telephone. In the present embodiment for example, the paging block specified for the mobile telephone 2 is paging block PI, comprising the frames 12 to 15 of the multi-frame 74. In this case, the mobile telephone 2 only needs to turn on its high frequency clock so as to receive and process the data contained in paging block PI, i. e. the data allocated to frames 12 to 15 of the multi-frame 74. As was explained earlier with reference to Figure 4, this constituent data was in fact physically sent in each of

the timeslots numbered zero as contained in the four consecutive TDMA frames 66, 68, 70 and 72. Thus it can be appreciated that the mobile telephone 2 will receive all its paging data as contained in the paging block PI provided the high frequency clock 42 is turned on at least for a time period starting at the start of the timeslot numbered zero in the TDMA frame 66 and ending at the end of the timeslot numbered zero in the TDMA frame 72. This period of time corresponds to a duration of twenty five timeslots each of 0.577ms, i. e. approximately 14.4ms, whereas the duration of the complete sequence of fifty one TDMA frames within one multi-frame 74 takes approximately 235ms.

The paging information that the mobile telephone 2 requires to receive and process is thus contained in constantly repeated time windows, each of approximate duration 14.4ms, occurring once every 235ms. The constantly repeated time windows containing the paging information that the mobile telephone 2 requires to receive and process can be considered to represent a first-content portion of the cycle of data transmitted by the BSC/BTS 14, and the time intervals between those time windows can be considered to represent a second-content portion of the cycle of data transmitted by the BSC/BTS

14.

Figure 5a schematically illustrates received paging data 80, where paging blocks 81,83, 85,87 and 89 indicate the time that the relevant paging data is available in the signal received from the BSC/BTS 14. For clarity, the relative 14.4ms duration of the paging signals and

235ms repetition thereof are not drawn to scale in Figure 5a.

The high frequency clock 42 needs to be switched on shortly before the start of the occurrence of each paging block 81,83, 85,87 and 89 and is required to be switched off shortly after the end of each of these paging blocks. Figure 5a shows the required high frequency clock output 90 including respective high frequency clock pulse blocks 91,93, 95,97 and 99 provided by switching the high frequency clock on and off in correspondence with the paging blocks 81,83, 85,87 and 89. Each duration of a high frequency pulse block 91, 93,95, 97 and 99 can be considered to represent an operational period of time.

In Figure 5a the period of the high frequency pulses is not drawn to scale. The high frequency clock remains

switched off for a time period ts between consecutive pulse blocks. This time period ts can be considered to represent a standby period of time.

Monitoring of the time period ts is performed by the wake-up timer switch 58 and the low frequency clock 60 of the controller 20. At the end of the time period ts the wake-up timer switch 58 switches the high frequency clock back on. As shown by the representation of the low frequency clock output 100 in Figure 5A, the low frequency clock operates continuously and hence is active during the time period ts, when the high frequency clock is turned off.

The wake-up timer switch counts a specified number of low frequency clock output pulses. The specified number of pulses, called the wake-up timer count value, is determined by the CPU 40 using information obtained by the clock counter 52, as will now be described in further detail with reference to Figure 5B.

During the time the high frequency clock is switched on, the CPU 40 controls the clock counter 52 to count the number of cycles of the high frequency clock output that occur for a single cycle of the low frequency clock

output. The clock counter 52 is instructed by the CPU 40 to start counting the number of complete cycles of pulses 106 of the high frequency output 90, when the following three inputs to the clock counter all go high: the input receiving the high frequency output 90, the input receiving the low frequency output 100; and an input receiving a start measure signal 104 sent by the CPU 40.

The clock counter 52 ends counting at the end of a single cycle of the low frequency clock 60. Thus the counting of the high frequency clock pulses will start at the time shown as to and will end at the time shown as ti in Figure 5b. This will provide a single count of the number of high frequency clock cycles that have occurred for one cycle of the pulse 108 of the low frequency clock. This value is read by the CPU 40. In a simple implementation this single value could be used. However, in the present embodiment, a further number of counts are performed, such as between times ti and t2 as shown in Figure 5b to provide a plurality of values, which are averaged, thus averaging out the error introduced by the fact that a fraction of a cycle (see the dotted line in Figure 5b) of a low frequency clock pulse should in theory be counted but cannot be because only complete cycles can be counted.

The resulting average value provides a value of the ratio of the respective frequencies of the high and low frequency clocks, from which the CPU 40 calculates the number of low frequency pulses that need to be counted in correspondence to the time period ts (i. e. the wake-up timer count value).

When the above described procedures and functions operate in an ideal manner, the high frequency clock 42 is switched on shortly before a paging block is received, and is switched off shortly after receipt of the paging block has been completed. This is shown in Figure 6a, which schematically illustrates an ideally-timed switching on and off of the high frequency clock 42. As shown in Figure 6a, if the start of the paging block is at time tb, then the high frequency clock 42 should be switched on at a time tided such that the high frequency clock is switched on at an amount of time Atideal before the paging block is received, i. e. Atideal = tub-ideal As also shown in Figure 6a, under the ideal timing conditions, the high frequency pulse block 91 extends beyond the end of the paging block 81 to ensure that all the relevant paging data has been received and processed before the circuitry is again powered down. This ensures that the high frequency clock 42 and the other main

functional units shown in box 54 of Figure 3 are all able to operate satisfactorily and capture all the required information contained in the paging block.

In order for the high frequency clock 42 to be switched on at exactly the correct time to produce the ideal timing shown in Figure 6a, the timing by the wake-up timer switch 58 and the low frequency clock 60 of the time value t. as described above needs to be perfect. In practice, however, there will be variations from the ideal, and this can lead to the high frequency clock 42 being switched on either too early or too late compared to the ideal timing shown in Figure 6a.

In the present embodiment CPU 40 determines the time that the high frequency clock 42 is switched on compared to the ideal time it should have been switched on, by using the actual timing of the paging block received from the BSC/BTS 14, and controls the switching on and off of the high frequency clock 42 according to the values it determines. More particularly, the CPU 40 monitors the actual timing ta at which the high frequency clock is switched on, and-compares this with tided.

Figure 6b shows the case when the high frequency clock

pulse block 91 is turned on at an actual time ta earlier than time tideal, and Figure 6c shows the case when the high frequency clock pulse block 91 is turned on at an actual time ta after the time tidal In each case, the CPU 40 determines the time differential Ata between the start of the paging block and the actual time the high frequency clock pulse block 91 is switched on, (i. e. Ata = tb-ta). The CPU 40 calculates a differential timing value, terror, which is equal to the difference between the ideal timing differential and the actual timing differential (i. e. Aterror = Ata-Atideal when the high frequency clock is switched on too early as shown in Figure 6b or Aterror = Atideal + Ata when the high frequency clock is switched on too late as shown in Figure 6c).

The CPU 40 then compares the value obtained for Aterror with a predetermined threshold. In the present embodiment the predetermined threshold is set such that, so long as Terror is less than the threshold, then the start and end of the high frequency clock pulse blocks 91 are such as to include all of the paging block 81. Thus, for the case shown in figure 6b when the high frequency clock is switched on too early, when Terror equals the threshold

the end of the high frequency clock pulse block 91 just matches the end of the paging block 81. Similarly, for the case shown in figure 6c when the high frequency clock is switched on too late, when terror equals the threshold the start of the high frequency pulse 91 just matches the start of the paging block 81.

Provided that Aterror is less than the threshold then operation of the power down standby mode continues as described earlier above with reference to Figure 5a.

However, if the CPU 40 determines that Aterror is greater than the threshold, then in the present embodiment the CPU 40 does not implement powering down of the high frequency clock 42 at the end of the normal high frequency clock pulse block 91, but instead causes the controller to continue to operate using the high frequency clock 42 and other main functional units through until the next paging block is received, so as to ensure proper receipt of the paging block information during the next received paging block.

The process steps carried out by the controller 20 when implementing the present embodiment will now be described with reference to Figure 8. At step S5 the CPU 40

decides to enter the standby mode. This can occur after the mobile telephone has been switched on, and the controller has completed initial operations such as registering with the BSC/BTS 14, and receiving necessary information as to which paging block from among PO to P8 it must monitor. Another possibility is that the CPU may decide to enter the standby mode on completion of a call.

At step S10 the CPU 40 determines the wake-up time count value, in other words it determines the number of low frequency pulses from the low frequency clock 60 that the wake-up timer switch 58 will need to count to define the time duration ts. Step S10 is performed using the operations described earlier with reference to Figures 5a and 5b.

At step S15, when the high frequency clock is to be switched off, the CPU 40 activates the wake-up timer switch 58, by forwarding to the wake-up timer switch 58 the wake-up timer count value. At step S20 the wake-up timer switch receives the count value from the CPU 40, and starts counting the pulses it is receiving from the low frequency clock 60. The wake-up timer switch also changes its DC output, which is connected to the highfrequency clock 42, from high to low, thus turning off

the high frequency clock 42. As a consequence, the CPU 40, the RF block 46, the signal processor 48, the timing control 50 and the clock counter 52 also cease functioning.

At step S25, when the wake-up timer switch reaches the count value, it changes its DC output back to high, thus turning the high frequency clock 42 back on again. The CPU 40, the RF block 46, the signal processor 48, the timing control 50 and the clock counter 52 thus also become functional again. The controller is thus able to receive a paging signal from the BSC/BTS 14 which is processed at step S30 by the CPU 40.

In addition to monitoring whether the mobile telephone has been paged, the CPU 40 further processes the received signal by comparing the timing information received therein with its timing control. The CPU 40 also, at step S35, determines the RF frequency received and compares it with the frequency of the pulses being supplied by the high frequency clock 42 so as to re-synchronise the high frequency clock 42 compared to the more fundamentally correct signals being received from the BSC/BTS 14. If the frequency of the high frequency clock 42 needs adjustment, this is performed by the CPU altering the

voltage supply to the high frequency clock 42 from its digital to analogue convertor part 44. At step S40, the CPU 40 determines the wake-up timing error, i. e. terror as described above, by comparing the time of the start of the timeslot numbered zero of the first TDMA frame 66 of the paging block PI (see Figure 4) as received from the BSC/BTS, with the time it was first switched on again by the high frequency clock 42.

In the case that the high frequency clock 42 was switched on too late for the CPU 40 to successfully receive timeslot zero of the first TDMA frame 66, then it will instead use the time of timeslot zero of the next TDMA frame i. e. TDMA frame 68, and if that fails then the time of the TDMA frame 70, and so on. It then compares this time with a pre-programmed ideal time differential, thus arriving at a value for the wake-up error, i. e. Aterror.

At step S45 the CPU 40 determines whether the standby mode is still required. If for example at step S30 it had been determined that the mobile telephone was being paged, or if a user-initiated action such as initiation of a call had taken place, then the standby mode would no longer be appropriate and thus the CPU 40 would move on

to processing such operations and the standby mode would be ended. However, if at step S45 it is determined that standby mode is indeed still required, then at step S50 the CPU 40 compares the newly determined wake-up error Terror with the earlier described threshold.

If the wake-up error Terror is within the threshold as shown for the high frequency pulse block 111 and corresponding paging block 81 in Figure 7a, then the normal procedure of switching off the high frequency clock can be repeated and the process returns to step S10 and the remaining process steps are repeated. This leads to the switching off of the high frequency clock 42, thus completing the high frequency clock pulse block 111 in Figure 7a.

If however the wake-up error is greater than the threshold, as is the case for the high frequency clock pulse block 113 and the paging block 83 in Figure 7a, then the CPU 40 leaves the high frequency clock 42 running and itself monitors the time before which it needs to receive and process the next paging block. The high frequency-clock pulse block 113 in Figure 7a continues up to and during the receipt of the paging block 85.

At step S55 the CPU then processes this next received paging signal. At step S60 the CPU re-synchronises the high frequency clock in the manner described in relation to step S34. Thereafter at step S65 the CPU 40 determines whether the standby mode is still required. Again, if the standby mode is no longer required then the procedure shown in Figure 8 is brought to an end. However if the standby mode is indeed required, then the procedure returns to step S10 and steps S15 and S20 result in the high frequency clock being switched off, thus ending the high frequency clock pulse block 113 shortly after the end of paging block 85, as shown in Figure 7a.

The procedure then continues until it is determined at either step S45 or S65 that the standby mode is no longer required. In the case of the example shown in Figure 7a, the wake-up error is within the threshold for the next two high frequency clock pulse blocks, i. e. high frequency clock pulse blocks 117 and 119, and consequently in both cases the high frequency clock 42 is switched off shortly after the end of the corresponding paging block 87,-89.

In an alternative embodiment, when the wake-up error is

found to be greater than the allowed threshold in step S50 of Figure 8, then the high frequency clock 42 is left switched on for a predetermined consecutive number of received paging blocks, and steps S55 and S60 are repeated for each of these additional received paging blocks. Only after this predetermined number of paging blocks does the CPU 40 again turn off the high frequency clock 42. This is illustrated in Figure 7b, where the high frequency clock output 120 is shown for a situation when the predetermined number of additional paging blocks for which the high frequency clock is left on is two.

Figure 7b shows a high frequency clock pulse block 121 which is switched off in usual fashion in correspondence with the received paging block 81 because the wake-up error is less than the threshold. In contrast, a high frequency pulse block 123, which was originally switched on in correspondence with receipt of paging block 83 has a wake-up error greater than the threshold and hence the high frequency clock is left on after the end of the paging block 83 for a duration enabling the CPU 40 to receive and process the next two paging blocks, namely paging blocks 85-and 87. Thereafter the high frequency clock 42 is switched off and subsequently turned on again to produce the high frequency clock pulse block 129 in

correspondence with the paging block 89.

By leaving the high frequency clock off for a predetermined number of further paging blocks, this embodiment allows the low frequency clock 60 a longer time to settle from whatever has caused its error, and reduces the amount of hunting introduced by the procedure. In yet further embodiments the number of paging block cycles for which the high frequency clock is to be left on can be set to values other than two.

In the above embodiments, the threshold was set such that Terror would equal the threshold when a paging block was just fully received by the corresponding high frequency pulse block. In other embodiments the threshold can be set to other values, to accommodate system tolerances or other operating requirements. For example, the threshold can be set equal to tideal.

In the above embodiments, when the high frequency clock 42 was left switched on as a result of the wake-up error being greater than the threshold, all the main functional units of the controller 20 were fully operational. In other embodiments the CPU 40 could during this time shut down specific functions other than the high frequency

clock that were not required, so conserving some of the power otherwise used when leaving the high frequency clock switched on.

The above embodiments relate to a mobile telephone operating in a GSM cellular communications system. It is to be appreciated that the present invention is not limited to such an arrangement, and instead can be applied to any mobile communications apparatus in which a higher power consumption circuit including a higher accuracy clock source is switched off for regular periods, and wherein in response to an error determined in a wake-up time set by a lower accuracy clock source, the higher accuracy clock source is then left on over the course of one or more of the regular periods. Thus it is to be appreciated that the present invention can be applied to cellular communications systems other than GSM, including other TDMA systems. Also included are code division multiplexed access (CDMA) systems and combined CDMA/TDMA systems, provided there is some regular cycling of the need for a mobile telephone or other apparatus to monitor specific periodic transmissions from the cellular communications system infrastructure. Similarly, it is to be appreciated that the present invention is applicable to any apparatus of a cellular communications

system, for example types of terminal other than a mobile telephone, including for example data terminals, and also combinations of mobile telephones and other apparatus such as computers and personal organisers.

Also, the present invention encompasses radio communication systems other than cellular ones, insofar as operation of such a system involves the transmission of signals in repeated cycles, and for some of each cycle the user stations can be powered-down in some form of standby mode, for saving power or some other purpose. An example of such a system is the Terrestrial Trunked Radio system (TETRA).

Claims

CLAIMS : 1. A method of operating a mobile station in a communications system in which signals are transmitted in a cycle comprising repeated first-content and secondfirst-content portions, the method comprising: turning-off a first timing means of the mobile station for a standby period of time associated with the first-content portion of the transmitted cycle; timing the standby period of time using a second timing means, of lower precision than the first timing means, of the mobile station; turning-on the first timing means, at the end of the standby period of time as timed by the second timing means, for an operational period of time associated with the second-content portion of the transmitted cycle; determining an error in the timing of the turning-on of the first timing means; comparing the error in the timing with a predetermined threshold; timing the operational period of time using the first timing means; if the error in the timing was less than the threshold, turning-off the first timing means at the end of the present operational period time for the next standby period of time associated with the next first

content portion of the transmitted cycle ; or if the error in the timing was greater than the threshold, leaving the first timing means turned-on at the end of the present operational period of time and instead turning it off at the end of a later operational period of time associated with a corresponding later second-content portion of the transmitted cycle.
2. A method according to claim 1, wherein if the error in the timing was greater than the threshold, the first timing means is turned off at the end of the operational period of time associated with the next second-content portion of the transmitted cycle.
3. A method according to claim 1, wherein if the error in the timing was greater than the threshold, the first timing means is turned off at the end of the operational period of time associated with a second-content portion of the transmitted cycle that occurs a predetermined further number of second-content portions later.
4. A method according to any preceding claim, wherein the communications system is a cellular radio communications system.
5. A method according to any preceding claim, wherein the turning-off of the first timing means for the standby period of time provides a saving in power consumed by the mobile station.
6. A method according to any preceding claim, further comprising the step of turning-off general control means of the mobile station that employ the first timing means, during the standby period of time.
7. A method according to any preceding claim, wherein the communications system operates on a time division multiplexed access, TDMA, basis.
8. A method according to any preceding claim, wherein the second-content portion of the transmitted cycle contains paging signals for the mobile station, and during the associated operational period of time the mobile station receives and processes the paging signals.
9. A method according to claim 8, wherein the predetermined threshold is set such that the operational period of time for which the first timing means are turned on includes all the time period necessary to receive the paging signals for the mobile station

comprised in the associated second-content portion of the transmitted cycle when the error in the timing is less than the threshold.
10. A method according to any preceding claim wherein the communications system is a GSM system.
11. A method according to any preceding claim, wherein the mobile station is a mobile telephone.
12. A method according to any preceding claim, wherein the first timing means comprises a high frequency clock.
13. A method according to claim 12, wherein the high frequency clock provides a clock signal for a processor of the mobile station.
14. A method according to any preceding claim, wherein the second timing means comprises a low frequency clock.
15. A method according to claim 14, wherein the second timing means further comprises a wake-up timer.
16. A method according to any preceding claim, wherein the second timing means remains turned-on during the

operational period of time.
17. A control apparatus for a mobile station for use in a communications system in which signals are transmitted in a cycle comprising repeated first-content and secondcontent portions, comprising: first timing means for use in an operational period of time associated with the second-content portion of the transmitted cycle; second timing means, of lower precision than the first timing means, for use in a standby period of time associated with the first-content portion of the transmitted cycle; error determining means for determining an error in the timing of the turning-on of the first timing means; error comparing means for comparing the error in the timing with a predetermined threshold; and timing control means; wherein the timing control means are adapted to turn-off the first timing means at the end of an operational period of time if it determines an error in the timing to be less than the threshold, and to leave the first timing means on at the end of an operational period of time and instead turn it off at the end of a later operational period of time if the error in the timing was greater

than the threshold.
18. An apparatus according to claim 17, wherein the control means are adapted to turn-off the first timing means at the end of the operational period of time associated with the next second-content portion of the transmitted cycle, if the error in the timing was greater than the threshold.
19. An apparatus according to claim 17, wherein the timing control means are adapted to turn-off the first timing means at the end of the operational period of time associated with a second-content portion of the transmitted cycle that occurs a predetermined further number of second-content portions later, if the error in the timing was greater than the threshold.
20. An apparatus according to any of claims 17 to 19, adapted for use in a cellular radio communications system.
21. An apparatus according to any of claims 17 to 20, adapted such that the turning-off of the first timing means for the standby period of time provides a saving in power consumed by the control apparatus.
22. An apparatus according to any of claims 17 to 21, wherein the timing control means are adapted to turn-off general control means of the control apparatus that employ the first timing means, during the standby period of time.
23. An apparatus according to any of claims 17 to 22, adapted for use in a communications system operating on a time division multiplexed access, TDMA, basis.
24. An apparatus according to any of claims 17 to 23, wherein the second-content portion of the transmitted cycle contains paging signals for the mobile station, and the control apparatus is adapted to process the paging signals during the associated operational period of time.
25. An apparatus according to claim 24, wherein the predetermined threshold is set such that in operation the operational period of time for which the first timing means are turned on includes all the time period necessary to receive the paging signals for the mobile station comprised in the associated second-content portion of the transmitted cycle when the error in the timing is less than the threshold.
26. An apparatus according to any of claims 17 to 25, adapted for use in a GSM system.
27. An apparatus according to any of claims 17 to 26, wherein the first timing means comprises a high frequency clock.
28. An apparatus according to claim 27, wherein in operation the high frequency clock provides a clock signal for a processor of the apparatus.
29. An apparatus according to any of claims 17 to 28, wherein the second timing means comprises a low frequency clock.
30. An apparatus according to claim 29, wherein the second timing means further comprises a wake-up timer.
31. An apparatus according to any of claims 17 to 30, wherein in operation the second timing means is left turned-on during the operational period of time.
32. A mobile station for use in a communications system, comprising the control apparatus according to any of claims 17 to 31.
33. A mobile station according to claim 32, adapted for use in a cellular radio communications system.
34. A mobile telephone for use in a cellular radio communications system, comprising the control apparatus according to any of claims 17 to 31.
35. A communications system comprising a mobile station according to claim 32 or claim 33 or a mobile telephone according to claim 34.
36. A controller for a communication receiver operable to receive communications at periodic communication intervals from a transmission station and having a first timer for enabling synchronisation of an operation of the receiver with the transmission station in a communication period, the receiver being arranged to enter a standby mode between communication intervals in which the first timer is switched off and having a second timer for counting a standby interval between communication intervals and for causing the first timer to be reactivated at the end of a standby interval, the controller having error determining means for determining any error between the reactivation of the first timer and the receipt of a communication signal from the

transmission station and control means for inhibiting switching off of the first timer at the end of the communication interval if the error exceeds a predetermined threshold.
37. A method of operating a mobile station in a radio communications system substantially as hereinbefore described with reference to the accompanying drawings.
38. A control apparatus substantially as hereinbefore described with reference to the accompanying drawings.
39. A mobile station substantially as hereinbefore described with reference to the accompanying drawings.
40. A mobile telephone substantially as hereinbefore described with reference to the accompanying drawings.
41. A communications system substantially as hereinbefore described with reference to the accompanying drawings.