GB2361781A - Sorting a list of data items - Google Patents

Sorting a list of data items Download PDF

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Publication number
GB2361781A
GB2361781A GB0010082A GB0010082A GB2361781A GB 2361781 A GB2361781 A GB 2361781A GB 0010082 A GB0010082 A GB 0010082A GB 0010082 A GB0010082 A GB 0010082A GB 2361781 A GB2361781 A GB 2361781A
Authority
GB
United Kingdom
Prior art keywords
sorting
data
list
read
sorted
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
GB0010082A
Other versions
GB0010082D0 (en
GB2361781B (en
Inventor
Jason Woodard
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Aeroflex Cambridge Ltd
Original Assignee
Ubinetics Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ubinetics Ltd filed Critical Ubinetics Ltd
Priority to GB0010082A priority Critical patent/GB2361781B/en
Publication of GB0010082D0 publication Critical patent/GB0010082D0/en
Priority to US10/258,569 priority patent/US20030101196A1/en
Priority to AU48639/01A priority patent/AU4863901A/en
Priority to EP01921672A priority patent/EP1277106A1/en
Priority to CN01810637A priority patent/CN1432150A/en
Priority to KR1020027014308A priority patent/KR20030019362A/en
Priority to PCT/GB2001/001821 priority patent/WO2001082054A1/en
Priority to JP2001579080A priority patent/JP2003532187A/en
Publication of GB2361781A publication Critical patent/GB2361781A/en
Application granted granted Critical
Publication of GB2361781B publication Critical patent/GB2361781B/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/65Purpose and implementation aspects
    • H03M13/6502Reduction of hardware complexity or efficient processing
    • H03M13/6505Memory efficient implementations
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/27Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques

Abstract

Data items in a memory list 12 are de-interleaved or interleaved by sorting them to new positions in the list. A flag f1 - f6 indicates whether an item has been read for sorting and overwriting is not permitted until the contents of a position have been read for sorting.

Description

2361781 DATA PROCESSING This invention relates to data processing. In
particular, this invention relates to the sorting of a list of data items into a desired order.
It is known to interleave data for wireless transmission in order to minimise the effect of errors and enhance data recoverability. Data to be transmitted is buffered in the order in which it is to be read. The data is then interleaved, i.e. sorted into a different order for transmission. The transmitted data is received at its destination and de-interleaved into the order in which it is to be read. The loss of consecutive data items in the transmission stream will not, in general, correspond to consecutive errors in the de-interleaved data sequence. This is advantageous because it is easier to correct isolated errors in a data stream.
A conventional interleaver buffers the data to be transmitted, in the sequence in which they are to be read, in a first memory area. The interleaving process then transfers each of the data items from the first memory area to a position in a second memory area such that the second memory area presents the data items in the interleaved order ready for transmission. The corresponding conventional de-interleaver operates in a similar way, transferring interleaved received data from a first memory area to a second memory area where they are listed in the order in which they are to be read.
A drawback with the conventional interleaver/de-interleaver described above is that two memory areas are used, each of a capacity sufficient to store the entire list of data items being interleaved/de-interleaved.
It is an object of the present invention to achieve data sorting in a more memory-efficient manner.
According to one aspect, the invention provides a method of processing data, comprising sorting a list of data items within a set of memory locations from a first order to a second 2 order by sorting each data item into its sorted position after the contents of the sorted position have been read for sorting.
The invention thus provides for more efficient use of a memory storing the list.
Advantageously, the data processing method comprises the step of examining if the contents of a list position have been read for sorting prior to writing a sorted data item into that position. Preferably, this is achieved by examining the state of an indicator or flag associated with the list position. Thus, overwriting of unsorted data items is avoided. Where the contents of a position are examined in this way, it may be provided that, if the contents of the examined position have not been read for sorting, then the contents of the examined position are read prior to writing the sorted data item into the examined position. Advantageously, the displaced content of the examined position is then treated as the subject of the next sorting step. On the other hand, where the contents of the examined position have already been read for sorting, the sorted data item can be written directly into the examined position and then a list position whose contents have not already been read for sorting is selected as the subject of the next sorting step.
Advantageously, the data processing method may be used to interleave a list of data items (preferably, for transmission), or to de-interleave a list of data items (preferably, for receiving transmitted data). The invention also extends to a program for carrying out any of the aforementioned data processing methods.
According to another aspect, the invention also provides data management apparatus for sorting a list of data items into a desired order, comprising means for storing a list of data items, and processing means for sorting data items within a set of memory locations from a first order to a second order, said processing means being arranged to sort a data item to its sorted position after the contents of the sorted position have been read for sorting.
The data management apparatus according to the invention provides for the efficient use of the storage means containing the list of data items in that the amount of storage used may be reduced.
3 Preferably, the processing means is arranged to refer to an indicating means to determine if the contents of a selected position in the list have been read for sorting. Preferably, the indicating means comprises a flag for each position in the list.
Where the processing means refers to an indicating means, it is desirable that the processing means be arranged to read the contents of the selected position prior to writing the sorted item into it if it is detennined that the contents of the selected position have not already been read for sorting. It is also advantageous for the processing means to treat the displaced contents of the selected position as the subject of the next sorting operation.
Where the processing means is arranged to refer to an indicating means to determine if the contents of a selected position of the list have been read, it is desirable to provide the processing means with the ability to write the sorted item directly into the selected position in the case where the contents of the selected position have already been read for sorting, and, preferably, seek a data item in the list which has not been previously read for sorting.
In one preferred embodiment, the data management apparatus is an interleaver for interleaving a list of data items. The invention also extends to a transmitter including this sort of interleaver.
In another preferred embodiment, the data management apparatus is a deinterleaver for de-interleaving a list of data items. The invention also extends to a receiver including a de-interleaver of this type.
By way of example only, an embodiment of the invention will now be described with reference to the accompanying figures, in which:
Figure 1 illustrates schematically part of the processing circuitry within a de-interleaver; and Figure 2 is a flowchart illustrating the processing performed by the circuitry of Figure 1.
4 The portion of the de-interleaver shown in Figure 1 comprises a processor 10 connected to two memories 12 and 14 via a bus 16.
The memory 12 comprises a sequence of memory locations mI to m6 which store data items b, c, f, etc. which are to be de-interleaved. The other memory 14 contains an entry or flag fl to f16 corresponding to each of the locations mI to m6 in the memory 12. Each of the flags fl to f6 in the flag memory 14 indicates whether or not its corresponding location in memory 12 has been read for sorting or not. Figure 1 shows the initial condition of memory 14 wherein all of the flags are set to zero indicating that none of the memory locations ml. to M6 have yet been read for sorting. The processor 10 is programmed to perfonn the desired type of interleaving and contains registers 18 for temporarily storing data read from memory 12.
Processor 10 is programmed to perform a de-interleaving process whereby the contents of memory locations mI to m6 in memory 12 are sorted into memory locations m2, m3, m6, m4, mI and m5 respectively. The interleaving process is selected to undo an interleaving process used by a transmitter from which the data in memory 12 has been received. In other words, the processor 10 is arranged to operate a de-interleaving algorithm which reorders data items b, c, f, d, a, e to a, b, c, d, e, ú It should be noted that the labels a, b, c, d, e, f do not indicate the actual information content of the memory slots ml to m6.
First, the processor 10 examines flag fl (which is set to zero) and infers that mI, has not been read for sorting. The value of mI (b) is read into one of the registers 18. Flag fl is then changed to 1 to indicate that mI has been read for sorting. In accordance with its de- interleaving algorithm, the processor 10 determines that b is to be written into m.2. The processor therefore examines flag Q and finds that it is also set to zero. To avoid overwriting value of m2, which, as indicated by 2, has not yet been sorted to its correct position, the value of m2 (c) is read into one of the registers 18. Flag 0 is then set to 1. The data b is then written into m2.
The processor 10 then operates on the value c, which is the displaced content of m2. The processor 10 determines that the value c is to be placed in mI The processor 10 inspects 0, which is set to zero. The processor therefore loads the present value of m3 (f) into one of the registers 18 and changes 9 to 1. The processor 10 then stores value c in m3.
The processor 10 then determines the correct location for the value f according to its de-interleaving algorithm. The de-interleaved position for f is m6. The processor 10 examines f6 and finds that it is set to zero. The processor 10 therefore reads the value of m6 (c) into one of the registers 18 and sets f6 to 1. The processor 10 then writes f into m6.
Processor then determines the de-interleaved position of the value e displaced from m6 according to its de-interleaving algorithm. The required position is m5. The processor 10 j examines 0, finds that it is zero, and reads the value of m5 (a) into one of the registers 18. The processor 10 then places the value e in m5.
The processor 10 then determines the de-interleaved position of the displaced content of mS. The correct position is ml. Presently, the content of ml is b. However, processor 10, upon reading fl, finds that its value is 1, indicating that mI has already been read for sorting. Therefore, the processor 10 proceeds with overwriting b in nil with a. The processor has reached the end of a closed loop since there is no value displaced from m I.
The processor 10 then proceeds to look down the flag memory 14 to find a flag indicating that the corresponding location in memory 12 has not been sorted to a de-interleaved position. The processor 10 finds that A is zero. The processor 10 reads the value d from m4 into one of its registers 18 and sets f4 to 1. According to its de-interleaving algorithm, the processor 10 must assign the value of m4 back to m4. Therefore, the processor inspects f4, finds that it is set to 1, indicating that the contents of m4 have been read for sorting already, and overwrites d in m4 with d. The processor 10 therefore completes another closed loop, this time of the shortest possible type. The processor may be arranged to recognise when it is about to write the contents of a location of memory 12 back to the same location and inhibit the writing operation, thus saving processing time. This is a variation on the basic system.
The processor 10 then reviews the flag memory 14 for a flag set to zero. Since there are none, the processor concludes that the de-interleaving of the contents of memory 12 has 6 been completed. The de-interleaved content of memory 12 may then be read in the correct order by a connected piece of apparatus using the data for a predetermined task. New data may then be loaded into nil to m6 and the processor may then begin the de-interleaving program again, with fl to % reset to zero.
The de-interleaving process may be understood fartlier from the flowchart of Figure 2, which is self explanatory.
Although the de-interleaving apparatus described with reference to Figure 1 involved only 6 memory locations nil to m6, it will be appreciated that this number is arbitrary and that fewer or more memory locations could be involved in the de-interleaving process.
In addition, from the foregoing description of a de-interleaver with the respect to Figures 1 and 2, it will also be appreciated that an interleaver (for example, forming part of a transmitter) may be arranged to operate in an analogous fashion. For example, the order b, c, f, d, a, e could be the order in which the data is to be used and the order a, b, c, d, e, f could be the interleaved order for transmission.
It will be apparent that a fixed sequence of reading and writing operations amongst the memory locations of the list is required for a particular type of interleaving/de-interleaving. The present system could therefore be provided with the required sequence for the type of interleaving being used, thus dispensing with the flag memory 14. However, the use of the flag memory 14 provides for transparency in the operation of the (de) interleaver.

Claims (15)

7 Claims
1. A method of processing data, comprising sorting a list of data items within a set of memory locations from a first order to a second order by sorting each data item into its sorted position after the contents of the sorted position have been read for sorting.
2. A method of processing data according to claim 1, comprising examining an indicator associated with a list position prior to sorting a data item into that position, said indicator indicating whether the content of the associated list position has been read for sorting.
3. A method of processing data according to claim 1 or claim 2, comprising reading a data item from its list position before sorting a data item into that position if the current content of that position has not been read for sorting.
4. A method of processing data according to any preceding claim, comprising seeking an unsorted data item in the list after a data item has been sorted into a list position whose content has already been sorted.
5. A method according to any preceding claim, wherein the sorting procedure comprises arranging the list in a de-interleaved order.
6. A method according to any one of claims 1 to 4, wherein the sorting procedure comprises arranging the list in an interleaved order.
7. A program for performing the method of any preceding claim.
8. Data management apparatus for sorting a list of data items into a desired order, comprising means for storing a list of data items and processing means for sorting data items within a set of memory locations from a first order to a second order, said processing means being arranged to sort a data item to its sorted position after the contents of the sorted position have been read for sorting.
8
9. Data management apparatus according to claim 8, wherein the processing means is arranged to refer to an indicating means to determine if the content of a selected list position has been read for sorting.
10. Data management apparatus according to claim 8 or claim 9, wherein the processing means is arranged to read a data item from its list position before sorting a data item into that position if the current content of that position has not been read for sorting.
11. Data management apparatus according to any one of claims 8,9 or 10, wherein the processing means is arranged to seek an unsorted data item in the list after a data item has been sorted into a list position whose content has already been sorted.
12. Data management apparatus according to any one of claims 8 to 11, wherein the sorting procedure implemented by the processing means is a deinterleaving process.
13. Data management apparatus according to any one of claims 8 to 11, wherein the sorting procedure implemented by the processing means is an interleaving process.
14. A method of processing data substantially as hereinbefore described with reference to the accompanying figures.
15. Data management apparatus substantially as hereinbefore described with reference to the accompanying figures.
GB0010082A 2000-04-25 2000-04-25 Interleaving and de-interleaving of telecommunications signals Expired - Fee Related GB2361781B (en)

Priority Applications (8)

Application Number Priority Date Filing Date Title
GB0010082A GB2361781B (en) 2000-04-25 2000-04-25 Interleaving and de-interleaving of telecommunications signals
CN01810637A CN1432150A (en) 2000-04-25 2001-04-24 Data processing
AU48639/01A AU4863901A (en) 2000-04-25 2001-04-24 Data processing
EP01921672A EP1277106A1 (en) 2000-04-25 2001-04-24 Data processing
US10/258,569 US20030101196A1 (en) 2000-04-25 2001-04-24 Data processing
KR1020027014308A KR20030019362A (en) 2000-04-25 2001-04-24 Data processing
PCT/GB2001/001821 WO2001082054A1 (en) 2000-04-25 2001-04-24 Data processing
JP2001579080A JP2003532187A (en) 2000-04-25 2001-04-24 Data processing

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB0010082A GB2361781B (en) 2000-04-25 2000-04-25 Interleaving and de-interleaving of telecommunications signals

Publications (3)

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GB0010082D0 GB0010082D0 (en) 2000-06-14
GB2361781A true GB2361781A (en) 2001-10-31
GB2361781B GB2361781B (en) 2004-12-29

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GB0010082A Expired - Fee Related GB2361781B (en) 2000-04-25 2000-04-25 Interleaving and de-interleaving of telecommunications signals

Country Status (8)

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US (1) US20030101196A1 (en)
EP (1) EP1277106A1 (en)
JP (1) JP2003532187A (en)
KR (1) KR20030019362A (en)
CN (1) CN1432150A (en)
AU (1) AU4863901A (en)
GB (1) GB2361781B (en)
WO (1) WO2001082054A1 (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE60307852D1 (en) * 2003-09-30 2006-10-05 Ericsson Telefon Ab L M In-place deinterlacing of data
DE60322550D1 (en) * 2003-12-09 2008-09-11 St Microelectronics Nv Method and apparatus for deinterleaving successive sequences of interlaced sample data
WO2007066940A1 (en) * 2005-12-05 2007-06-14 Samsung Electronics Co., Ltd. Apparatus and method for controlling an interleaver/deinterleaver memory in a mobile communication system
US8555148B2 (en) * 2007-09-18 2013-10-08 Samsung Electronics Co., Ltd. Methods and apparatus to generate multiple CRCs

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Publication number Priority date Publication date Assignee Title
US5117495A (en) * 1990-03-07 1992-05-26 Syncsort Incorporated Method of sorting data records
US5287494A (en) * 1990-10-18 1994-02-15 International Business Machines Corporation Sorting/merging tree for determining a next tournament champion in each cycle by simultaneously comparing records in a path of the previous tournament champion
GB2289966A (en) * 1994-05-24 1995-12-06 Ibm Mail sorting
US5913215A (en) * 1996-04-09 1999-06-15 Seymour I. Rubinstein Browse by prompted keyword phrases with an improved method for obtaining an initial document set
US6091714A (en) * 1997-04-30 2000-07-18 Sensel; Steven D. Programmable distributed digital switch system

Non-Patent Citations (2)

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Title
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http://www-ee.eng.hawaii.edu/Courses/EE150/Book/chap10/subsection2.1.2.1.html, September 1994 *

Also Published As

Publication number Publication date
GB0010082D0 (en) 2000-06-14
US20030101196A1 (en) 2003-05-29
AU4863901A (en) 2001-11-07
JP2003532187A (en) 2003-10-28
GB2361781B (en) 2004-12-29
WO2001082054A1 (en) 2001-11-01
EP1277106A1 (en) 2003-01-22
KR20030019362A (en) 2003-03-06
CN1432150A (en) 2003-07-23

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732E Amendments to the register in respect of changes of name or changes affecting rights (sect. 32/1977)
PCNP Patent ceased through non-payment of renewal fee

Effective date: 20070425