GB2294599A - A frequency synthesiser - Google Patents
A frequency synthesiser Download PDFInfo
- Publication number
- GB2294599A GB2294599A GB9421841A GB9421841A GB2294599A GB 2294599 A GB2294599 A GB 2294599A GB 9421841 A GB9421841 A GB 9421841A GB 9421841 A GB9421841 A GB 9421841A GB 2294599 A GB2294599 A GB 2294599A
- Authority
- GB
- United Kingdom
- Prior art keywords
- frequency
- synthesiser
- variable
- range
- voltage controlled
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L2207/00—Indexing scheme relating to automatic control of frequency or phase and to synchronisation
- H03L2207/10—Indirect frequency synthesis using a frequency multiplier in the phase-locked loop or in the reference signal path
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L2207/00—Indexing scheme relating to automatic control of frequency or phase and to synchronisation
- H03L2207/12—Indirect frequency synthesis using a mixer in the phase-locked loop
Description
1 A FMuency Synthesiser 2294599 This invention relates to a frequency
synthesiser.
For the implementation of communication systems and associated test equipment, it is necessary to generate high frequency signals. In practice the effect of inherent noise produces unwanted residual phase modulation of the high frequency signal. The effect of this is to limit the dynamic range of a communication system and to degrade the bit error rate. It is therefore an advantage to n-dnimise the amount of residual phase noise.
Figure 1 shows a typical frequency synthesiser for generating a broad spectrum of radio frequency signals. A high frequency signal output by a high ftequency voltage controlled oscillator (VCO) 1 is divided by a frequency divider 3 to provide a low frequency signal. This signal is passed to a phase detector 5 where it is compared in phase to a stable, low frequency, low noise reference provided by source 7. The resulting error signal is used to control high frequency WO 1. The frequency output by WO 1 is controlled by altering the division ratio N of divider 3. Providing WO 1 covers an octave range then a continuous spectrum of low frequency signals may be generated by successive division by two of the output of the synthesiser at 9. For example, if the octave range covered by WO 1 is 1200-2400 MHz, then division of this range by two gives the lower frequency range 600-1200 MHz, and division by two of the range 6001200 MHz gives the lower range 300-600 MHz, etc.
A problem with the synthesiser of Figure 1 is producing high frequency WO 1 with sufficiently low residual phase noise. The noise of an oscillator is determined by: the loss in its resonator; the noise inevitably introduced by the oscillator transistor and its associated components; and the noise introduced by the conversion of amplitude modulation to phase modulation in the operation of the WO tuning diodes. At high frequencies the noise contributed by resonator loss increases due to skin effect losses in the resonator conductors, dielectric losses in the resonator capacitors, and losses in the resonator tuning diodes. Further, the noise contributed by the transistor increases at high frequencies.
The noise introduced by the resonator loss and the amplitude to phase modulation conversion may be reduced by replacing WO 1 of Figure 1 by a series of narrow band oscillators, the narrow bands together covering the range of frequencies covered by WO 1, A narrow band oscillator of the series is switched into the phase locked loop of Figure 1 when it 2 P/60505/MFS is required that the frequency synthesiser generate a frequency within the narrow band of that oscillator. A penalty of using a series of narrow band oscillators is increased complexity and cost.
It is accepted in the art that if a signal of frequency f has phase noise sidebands'that are 6dB greater in magnitude than a signal of frequency f/2, then the two signals are equivalently noisy. The figure of 6dB comes from a consideration of the multiplication by n of a frequency in a manner that adds no phase noise itself. The phase noise sidebands in the signal after multiplication will be 201og10(n) dB or 6dBloctave greater than they were prior to multiplication. Many present day high frequency oscillators have noise that is worse than 6dB greater than oscillators designed to operate at half the frequency due to the noise problems aforementioned.
Figure 2 shows a common alternative architecture to that shown in Figure 1. The architecture is principally the same as that of Figure 1 (like parts labelled with the same reference numerals), but with the addition of a frequency doubler 11 and switched bandpass filters 13. WO 1 is designed to operate at half the frequency with a consequent improvement in phase noise. Doubler 11 doubles the frequency, and an appropriate filter of the switched filters 13 is selected to pass the double frequency and stop leakage and unwanted harmonies of the frequency generated by WO 1. A disadvantage with the synthesiser of Figure 2 is that impracticably fine filtering is required to remove phase noise added by the doubling stage.
According to the present invention there is provided a frequency synthesiser comprising a phase locked loop comprising: a variable frequency oscillator comprising a voltage controlled oscillator, means for generating a plurality of harmonics of the signal output by said voltage controlled oscillator, and variable bandpass filter means for selecting any one of said harmonics, the output of said filter means constituting the output of said variable frequency oscillator and the output of said synthesiser; variable means for reducing the frequency of said output of said variable frequency oscillator; and phase detector means for comparing the reduced frequency output with a reference signal and producing an error signal in dependence on said comparison, said error signal controlling said voltage controlled oscillator.
A frequency synthesiser in accordance with the present invention will now be described, by way of example, with reference to the accompanying drawings, in which:
3 P/60505/MFS Figures 1 and 2, already referred to, are block schematic diagrams of known synthesisers; Figure 3 is a block schematic diagram of the synthesiser according to the invention; and Figure 4 illustrates a modification to the synthesiser of Figure 3.
In Figure 3, like circuit parts to those of Figures 1 and 2 are labelled with the same reference numerals.
Referring to Figure 3, the high frequency WO 1 of Figures 1 and 2 is replaced by a composite variable frequency oscillator 14 comprising a lower frequency low noise WO 15, a harmonic generator 17, and a voltage tuned bandpass filter 19 with an octave tuning range. Harmonic generator 17 produces a comb of frequencies at multiples of the frequency of WO 15, i.e. generator 17 outputs the frequency of WO 15 and harmonics thereof all with approximately the same amplitude (the amplitude of each harmonic is less than a 20dB drop from the amplitude of the component at the frequency of WO 15). One harmonic is selected as the desired synthesiser output frequency by tuned bandpass filter 19.
If, for example, a 1.2 - 2.4 GHz synthesiser is required, then, as will now be explained, this may be achieved by WO 15 having a tuning range of 400-533.33 MHz. For the synthesiser to output frequencies in the range 1. 2-1.6 GHz, the harmonic 3x the frequency of WO 15 is selected by filter 19, and it is necessary that the full 400-533.33 MHz range of WO 15 be utilised. For the synthesiser to output frequencies in the range 1.6 - 2. 0 GHz, the harmonic 4x is selected, and it is necessary that the range 400 - 500 MHz of the full 400 - 533.33 MHz range of WO 15 be utilised. For the synthesiser to output 2.0 - 2.4 GHz, the harmonic 5x is selected, and it is necessary that 400 - 480 MHz of the 400 - 533.33 MHz range be used. Thus, it will be seen that the desired 1.2 - 2.4 GHz range for the synthesiser has been achieved.
The tuning range of WO 15 is both low (covers frequencies 400 - 533.33 MHz) and narrow (is appreciably less than half an octave) compared to the range of frequencies generated by the synthesiser (covers frequencies 1.2 - 2.4 GHz and is an octave in extent). This alleviates the aforementioned phase noise problems. Further, it is easier to design the synthesiser of Figure 3 to have a linear tuning characteristic due to the narrow tuning range of WO 15. Bandpass filter 19 must pass the desired output frequency whilst rejecting the adjacent harmonics 400 533.33 MHz away. The use of a frequency range lower than 400 - 533.33 MHz for WO 15 and the selection of higher harmonic multiples by filter 19 achieves even better noise performance, but requires filter 19 to reject adjacent harmonies closer to the desired output, making filter 19 P/60505/MIFS 4 more complicated.
The output of filter 19 is phase locked. Thus, any phase noise added by harmonic generator 17 and filter 19 will be removed by the phase locked loop, providing it is within the loop bandwidth.
A frequency modulated output of the synthesiser of Figure 3 may be achieved by modulation of the frequency output by WO 15. In the aforegiven example of a 1.2 - 2.4 GHz synthesiser, to obtain a I OOKHz deviation at an output frequency of 1.8 GHz WO 15 need only deviate by 25KHz since it is then multiplied by four. By reducing the deviation required distortion due to non-linearity in the tuning characteristic of the synthesiser is reduced. For large deviations it may be necessary to vary the centre frequency of bandpass filter 19 in sympathy with the frequency modulation.
In Figure 4, like circuit parts to those of Figures 1, 2 and 3 are labelled with the same reference numerals.
Referring to Figure 4, the architecture is the same as that of Figure 3 except fiequency divider 3 is replaced by sampling mixer 21, variable low frequency source 23, and lowpass filter 25. The reduced frequency at the input to phase detector 5 is achieved by appropriately setting source 23. Lowpass filter 25 passes the wanted subtraction of the outputs of filter 19 and source 23, and stops the unwanted addition of these outputs.
P/60505/MFS
Claims (8)
1. A frequency synthesiser comprising a phase locked loop comprising: a variable frequency oscillator comprising a voltage controlled oscillator, means for generating a plurality of harmonics of the signal output by said voltage controlled oscillator, and variable bandpass filter means for selecting any one of said harmonics, the output of said filter means constituting the output of said variable fi-equency oscillator and the output of said synthesiser; variable means for reducing the frequency of said output of said variable fiequency oscillator; and phase detector means for comparing the reduced frequency output with a reference signal and producing an error signal in dependence on said comparison, said error signal controlling said voltage controlled oscillator.
2. A synthesiser according to Claim 1 wherein said variable means for reducing comprises a frequency divider.
3. A synthesiser according to Claim 1 wherein said variable means for reducing comprises a variable frequency source, a mixer for mixing the output of said variable frequency source with said output of said variable frequency oscillator, and a lowpass filter for passing the subtraction of the signals mixed by said mixer and stopping the addition of the signals mixed by said mixer.
4. A synthesiser according to Claim 1 or Claim 2 or Claim 3 wherein the frequency generated by said voltage controlled oscillator is modulated.
5. A synthesiser according to Claim 4 wherein the centre frequency of said bandpass filter means is varied in sympathy with the modulation of the frequency generated by said voltage controlled oscillator.
6. A synthesiser according to any one of the preceding claims wherein: the range of frequencies generated by said voltage controlled oscillator is 400 - 533.33 MHz; said plurality of harmonics consists of 3 times, 4 times, and 5 times the frequency generated by said voltage controlled oscillator; said synthesiser generates frequencies in the range 1200 1600 MHz by tuning said voltage controlled oscillator to frequencies in the range 400 - 533.33 MHz and varying said variable bandpass filter means to select the 3 times harmonic; said synthesiser generates frequencies in the range 1600 - 2000 MHz by tuning said voltage controlled oscillator to frequencies in the range 400 - 500 MHz and varying said variable bandpass filter means to select the 4 times harmonic; and said synthesiser generates frequencies in the range 2000 - 2400 MHz by tuning said voltage controlled oscillator to frequencies in the range 400 - 480 MHz and P/60505/MFS 6 varying said variable bandpass filter means to select the 5 times harmonic.
7. A frequency synthesiser substantially as hereinbefore described with reference to Figure 3 or Figure 4 of the accompanying drawings.
8. A method of using a frequency synthesiser according to Claim 1 comprising: synthesising a first range of frequencies by varying said variable bandpass filter means to select a first harmonic of said plurality of harmonics; and synthesising at least one further range of frequencies by varying said variable bandpass filter means to select at least one further harmonic of said plurality of harmonics.
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB9421841A GB2294599B (en) | 1994-10-28 | 1994-10-28 | A frequency synthesiser |
JP26976595A JP3871727B2 (en) | 1994-10-28 | 1995-10-18 | Frequency synthesizer |
US08/546,555 US5781600A (en) | 1994-10-28 | 1995-10-20 | Frequency synthesizer |
DE19540198A DE19540198B4 (en) | 1994-10-28 | 1995-10-28 | frequency synthesizer |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB9421841A GB2294599B (en) | 1994-10-28 | 1994-10-28 | A frequency synthesiser |
Publications (3)
Publication Number | Publication Date |
---|---|
GB9421841D0 GB9421841D0 (en) | 1994-12-14 |
GB2294599A true GB2294599A (en) | 1996-05-01 |
GB2294599B GB2294599B (en) | 1999-04-14 |
Family
ID=10763610
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB9421841A Expired - Lifetime GB2294599B (en) | 1994-10-28 | 1994-10-28 | A frequency synthesiser |
Country Status (4)
Country | Link |
---|---|
US (1) | US5781600A (en) |
JP (1) | JP3871727B2 (en) |
DE (1) | DE19540198B4 (en) |
GB (1) | GB2294599B (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2324215A (en) * | 1997-04-07 | 1998-10-14 | Motorola Inc | Self centering frequency multiplier |
EP0960533A2 (en) * | 1997-02-11 | 1999-12-01 | Hittite Microwave Corporation | Digital synchronization of broadcast frequency |
Families Citing this family (31)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6061551A (en) | 1998-10-21 | 2000-05-09 | Parkervision, Inc. | Method and system for down-converting electromagnetic signals |
US7515896B1 (en) | 1998-10-21 | 2009-04-07 | Parkervision, Inc. | Method and system for down-converting an electromagnetic signal, and transforms for same, and aperture relationships |
US7236754B2 (en) | 1999-08-23 | 2007-06-26 | Parkervision, Inc. | Method and system for frequency up-conversion |
US6542722B1 (en) * | 1998-10-21 | 2003-04-01 | Parkervision, Inc. | Method and system for frequency up-conversion with variety of transmitter configurations |
US7039372B1 (en) * | 1998-10-21 | 2006-05-02 | Parkervision, Inc. | Method and system for frequency up-conversion with modulation embodiments |
US6370371B1 (en) * | 1998-10-21 | 2002-04-09 | Parkervision, Inc. | Applications of universal frequency translation |
US6853690B1 (en) | 1999-04-16 | 2005-02-08 | Parkervision, Inc. | Method, system and apparatus for balanced frequency up-conversion of a baseband signal and 4-phase receiver and transceiver embodiments |
US6879817B1 (en) | 1999-04-16 | 2005-04-12 | Parkervision, Inc. | DC offset, re-radiation, and I/Q solutions using universal frequency translation technology |
US7065162B1 (en) | 1999-04-16 | 2006-06-20 | Parkervision, Inc. | Method and system for down-converting an electromagnetic signal, and transforms for same |
US7110444B1 (en) | 1999-08-04 | 2006-09-19 | Parkervision, Inc. | Wireless local area network (WLAN) using universal frequency translation technology including multi-phase embodiments and circuit implementations |
US7693230B2 (en) | 1999-04-16 | 2010-04-06 | Parkervision, Inc. | Apparatus and method of differential IQ frequency up-conversion |
US8295406B1 (en) | 1999-08-04 | 2012-10-23 | Parkervision, Inc. | Universal platform module for a plurality of communication protocols |
US6754295B1 (en) | 2000-04-07 | 2004-06-22 | Comrex Corporation | Method and apparatus for synchronizing data transmission and reception over a network |
US7010286B2 (en) * | 2000-04-14 | 2006-03-07 | Parkervision, Inc. | Apparatus, system, and method for down-converting and up-converting electromagnetic signals |
US6463112B1 (en) | 2000-05-25 | 2002-10-08 | Research In Motion Limited | Phase locked-loop using sub-sampling |
US7454453B2 (en) | 2000-11-14 | 2008-11-18 | Parkervision, Inc. | Methods, systems, and computer program products for parallel correlation and applications thereof |
WO2002061946A1 (en) * | 2001-01-26 | 2002-08-08 | True Circuits, Inc. | Phase-locked with composite feedback signal formed from phased-shifted variants of output signal |
US7072427B2 (en) | 2001-11-09 | 2006-07-04 | Parkervision, Inc. | Method and apparatus for reducing DC offsets in a communication system |
US7460584B2 (en) * | 2002-07-18 | 2008-12-02 | Parkervision, Inc. | Networking methods and systems |
US7379883B2 (en) | 2002-07-18 | 2008-05-27 | Parkervision, Inc. | Networking methods and systems |
TW558168U (en) * | 2002-11-19 | 2003-10-11 | Delta Electronics Inc | Voltage controlled oscillator having a bandpass filter |
US7251467B2 (en) * | 2003-10-14 | 2007-07-31 | Qualcomm Incorporated | Telecommunications using a tunable oscillator |
US7541849B2 (en) * | 2005-08-09 | 2009-06-02 | Seiko Epson Corporation | Phase locked circuit |
US7345549B2 (en) * | 2006-02-28 | 2008-03-18 | Teradyne, Inc. | Phase locking on aliased frequencies |
KR200458007Y1 (en) * | 2007-05-29 | 2012-01-16 | 주식회사 지에스인스트루먼트 | Signal generation device |
CN101765974B (en) * | 2007-07-23 | 2012-12-19 | 泰拉丁公司 | Phase locking on aliased frequencies |
US8655296B2 (en) * | 2007-12-18 | 2014-02-18 | Harris Corporation | Frequency synthesizer and related method for generating wideband signals |
US8145171B2 (en) * | 2008-10-08 | 2012-03-27 | Qualcomm Incorporated | Clock clean-up phase-locked loop (PLL) |
FR2988240B1 (en) * | 2012-03-19 | 2015-05-29 | Thales Sa | FREQUENCY GENERATOR FOR RADIO FREQUENCY EQUIPMENT AND METHOD FOR GENERATING AN OUTPUT SIGNAL |
US9553714B2 (en) * | 2015-06-26 | 2017-01-24 | Broadcom Corporation | Frequency multiplier for a phase-locked loop |
US10498346B2 (en) * | 2017-11-09 | 2019-12-03 | Raytheon Company | Midband phase noise reducer for PLLS |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB724942A (en) * | 1952-02-21 | 1955-02-23 | Philips Electrical Ind Ltd | Improvements in or relating to frequency-control systems |
GB942337A (en) * | 1961-03-23 | 1963-11-20 | Racal Electronics Ltd | Improvements in or relating to frequency synthesisers |
Family Cites Families (7)
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US2648006A (en) * | 1949-11-14 | 1953-08-04 | Westinghouse Electric Corp | Frequency generator |
US3694766A (en) * | 1971-08-30 | 1972-09-26 | Gte Sylvania Inc | Frequency synthesizer apparatus |
GB8707509D0 (en) * | 1987-03-30 | 1987-05-07 | Era Patents Ltd | Oscillator stabilisation |
JPH03169289A (en) * | 1989-11-24 | 1991-07-22 | Fanuc Ltd | Driving control of variable reluctance type motor |
JPH04371024A (en) * | 1991-06-19 | 1992-12-24 | Sony Corp | Pll frequency synthesizer |
US5150078A (en) * | 1991-11-29 | 1992-09-22 | Hughes Aircraft Company | Low noise fine frequency step synthesizer |
US5343168A (en) * | 1993-07-09 | 1994-08-30 | Northrop Grumman Corporation | Harmonic frequency synthesizer with adjustable frequency offset |
-
1994
- 1994-10-28 GB GB9421841A patent/GB2294599B/en not_active Expired - Lifetime
-
1995
- 1995-10-18 JP JP26976595A patent/JP3871727B2/en not_active Expired - Fee Related
- 1995-10-20 US US08/546,555 patent/US5781600A/en not_active Expired - Lifetime
- 1995-10-28 DE DE19540198A patent/DE19540198B4/en not_active Expired - Fee Related
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB724942A (en) * | 1952-02-21 | 1955-02-23 | Philips Electrical Ind Ltd | Improvements in or relating to frequency-control systems |
GB942337A (en) * | 1961-03-23 | 1963-11-20 | Racal Electronics Ltd | Improvements in or relating to frequency synthesisers |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0960533A2 (en) * | 1997-02-11 | 1999-12-01 | Hittite Microwave Corporation | Digital synchronization of broadcast frequency |
EP0960533A4 (en) * | 1997-02-11 | 2005-03-23 | Hittite Microwave Corp | Digital synchronization of broadcast frequency |
GB2324215A (en) * | 1997-04-07 | 1998-10-14 | Motorola Inc | Self centering frequency multiplier |
GB2324215B (en) * | 1997-04-07 | 1999-06-16 | Motorola Inc | Self centering frequency multiplier |
US5973570A (en) * | 1997-04-07 | 1999-10-26 | Motorola, Inc. | Band centering frequency multiplier |
Also Published As
Publication number | Publication date |
---|---|
JP3871727B2 (en) | 2007-01-24 |
US5781600A (en) | 1998-07-14 |
JPH08228150A (en) | 1996-09-03 |
DE19540198A1 (en) | 1996-05-02 |
GB2294599B (en) | 1999-04-14 |
GB9421841D0 (en) | 1994-12-14 |
DE19540198B4 (en) | 2006-05-11 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PE20 | Patent expired after termination of 20 years |
Expiry date: 20141027 |