GB2268348A - Noise trap for a high frequency transistor amplifier - Google Patents

Abstract

A noise trap circuit for an amplifying transistor, comprises a resonant circuit such that the circuit in operation substantially diminishes upconversion of noise at one or more resonant frequencies. The resonant circuit comprises a series connexion of capacitor and inductor connected to ground from the transistor base (fig 1) or a parallel connexion of capacitor and inductor connected to ground from the transistor emitter (fig 2). Other embodiments using ground filter networks are described. <IMAGE>

Description

NOISE REDUCTION CIRCUIT FIELD OF THE INVENTION This invention generally relates to noise reduction circuitry.

BACKGROUND OF mE INVENTION Without limiting the scope of the invention, its background is described in connection with GaAs HBT power amplifiers, as an example.

Heretofore, in this field, the GaAs HBT has proven an attractive device for high efficiency applications requiring high levels of integration such as portable radio transmitters running off battery supplies. The device is capable of > 80% collector efficiency when used in conjunction with suitable external circuitry, which may be implemented in either hybrid or monolithic form.

One characteristic of an HBT in common with all other semiconductor devices is that when used as an amplifier or oscillator, for example, noise is generated in addition to the wanted signal. In an amplifier the level of noise generated is characterised by the noise figure of the circuit.

In general the noise output from a circuit is considered to be a spurious product which may in some cases lead to a degradation in the performance of the system in which the circuit is used. In a cellular telephone, noise output from the power amplifier at the receive frequency is an important parameter as noise power at this frequency inevitably leaks into the receive signal path causing a reduction in receiver sensitivity.

Power amplifiers therefore need to generate a low level of noise and normal practice is to take steps in the design of the amplifier to minimise noise generation.

This is generally done by the choice of low noise active devices, optimum bias conditions and the use of impedance matching circuitry to present controlled impedances to the device to minimise the amount ofnoise generated (noise matching).

Filtering may also be employed, either externally or designed into impedance matching circuitry.

SUMMARY OF THE F' INVENTION It is herein recognized that a need exists for a method of reducing noise in, for example, certain GaAs HBT based components. The present invention is directed toward meeting those needs. As an example, the present invention relates to the addition of a circuit network to a GaAs HBT RF amplifier to reduce the level of noise generated away from the carrier frequency. The invention has immediate application in radio transmitters where the level of noise output is of concern.

Generally, a noise trap circuit is presented comprising a resonant circuit such that the circuit in operation substantially diminishes upconversion of noise at one or more resonant frequencies.

In one form of the invention the resonant circuit comprises at least one inductor and at least one capacitor connected in series from an input to ground.

Preferably the input is a base of a Heterojunction Bipolar Transistor.

In another form of the invention the resonant circuit comprises at least one inductor and at least one capacitor connected in parallel from an emitter of a transistor to ground. Preferably, the transistor is a Heterojunction Bipolar Transistor.

In yet another form of the invention the resonant circuit comprises a filter network.

The noise trap circuit is preferably a portion of a power amplifier which is a portion of a cellular telephone. The noise trap circuit may also be used, for example, as a portion of an oscillator.

BRIEF DESCRIPTION OF THE DRAWINGS In the drawings: Figure 1 is a first preferred embodiment schematic of a noise trap circuit using a series resonant circuit applied to an amplifier; Figure 2 is a second preferred embodiment schematic of a noise trap circuit using a parallel resonant circuit applied to an amplifier; Figure 3 is a third preferred embodiment schematic of a noise trap circuit using a general filter network applied to an amplifier; and Figure 4 is a fourth preferred embodiment schematic of a noise trap circuit using a general filter network applied to an amplifier.

Corresponding numerals and symbols in the different figures refer to corresponding parts unless otherwise indicated.

DETALED DESCRIPTION OF PREFERRED EMBODIMENTS GaAs HBTs used in RF.power amplifier have a secondary noise generating mechanism which has been observed to increase the noise output by at least 2dB compared to the level predicted from small signal noise figure measurements when the amplifier is driven with typical input signal. In many applications this 2dB higher noise level would bring the amplifier noise output to an unacceptable level.

Experimental work has demonstrated that the origin of the extra noise is due to upconversion of low frequency noise present as either an input to the amplifier or generated within the device itself. The noise may be eliminated by placing a trap circuit between the input of the device to ground, shorting out the energy at the frequency being upconverted. In one example, the frequency of the trap circuit, in this case a series resonant circuit, was 45MHz, this being the difference between the transmit and receive frequencies of a particular cellular telephone application.

Figure 1 shows a first preferred embodiment of the present invention in, for example, an amplifier. Preferably, M1 10 is an input impedance matching circuit, Q1 12 is a GaAs HBT active device, and M2 14 is an output matching network. The noise trap in this embodiment of the present invention includes a series resonant circuit 16 (C1/L1 18/20) from the base 22 of the transistor 12 to ground 24. The low impedance of the resonant circuit 16 at frequency F, reduces the noise voltage at F at this node, thus effectively preventing the inixing action from generating an upconverted noise signal at a the receive frequency.If the transmit frequency is the relationship between the quantities F,, F= and Fur is given by equations: (1) or (2) In the example described above, F = FX + 45hIHz. Thus the noise trap 16 if tuned to 45MHz always guarantees a "notch" in the noise output at the required receive frequency. An advantage of this circuit is that at an operating frequency (F, for example 900 MHz, the trap 16 presents a high impedance and has little or no effect on the operation of an amplifier circuit.If F, and Ftr were separated by a lesser amount, matching circuit M1 10 would need to be adjusted to compensate for reactive effects of the trap at the operating frequency.

Figure 2 shows an alternate embodiment using a parallel tuned circuit 26 in the emitter 28, tuned to F This circuit 26 presents a high impedance at the noise frequency being upconverted preventing current flow at this frequency resulting in very low up conversion efficiency.

Figure 3 shows another alternate embodiment where a filter network F 30 is used as a noise trap over a wider range of frequencies than can be effected with the circuits shown in Figures 1 and 2. For example, a low pass filter could be used to reduce noise output caused by upconversion from close to the carrier up to the cutoff frequency of the filter, either side of the carrier.

Figure 4 shows yet another alternate embodiment where a filter network F 30 is again used as a noise trap.. However, is this embodiment the filter network 32 is connected at the emitter 28 of the transistor 12 instead of at the base 22 as in Figure 3.

Present technology dictates that the noise trap circuit ofthe present invention generally be implemented off-chip due to the size ofthe components. However, if the components used are of an adequate smallness they may be incorporated monolithically.

A preferred embodiment has been described in detail hereinabove. It is to be understood that the scope of the invention also comprehends embodiments different from those described, yet within the scope ofthe claims. For example, while a power amplifier is described the present invention could be applied to other devices such as oscillators, for example, to reduce noise output. Similarly, while described in relation to a GaAs HBT, the circuit of the present invention could be used with any device that up converts or inherently acts as a mixer. Words of inclusion are to be interpreted as nonexhaustive in considering the scope of the invention.

While this invention has been described with reference to illustrative embodiments, this description is not intended to be construed in a limiting sense.

Various modifications and combinations of the illustrative embodiments, as well as other embodiments of the invention, will be apparent to persons skilled in the art upon reference to the description. It is therefore intended that the appended claims encompass any such modifications or embodiments.

Claims (14)

WHAT IS CLAIMED IS:

1. A noise trap circuit comprising: a resonant circuit such that said circuit in operation substantially diminishes upconversion of noise at one or more resonant frequencies.

2. The circuit of claim 1, wherein said resonant circuit comprises a least one inductor and at least one capacitor connected in series from an input to ground.

3. The circuit of claim 2, wherein said input is a base of a Heterojunction Bipolar Transistor.

4. The circuit of claim 1, wherein said resonant circuit comprises at least one inductor and at least one capacitor connected in parallel from an emitter of a transistor to ground.

5. The circuit of claim 4, wherein said transistor is a Heterojunction Bipolar Transistor.

6. The circuit of claims 3 and 5, wherein said Heterojunction Bipolar Transistor comprises GaAs.

7. A power amplifier including a noise trap circuit as claimed in claim 1.

8. A cellular telephone including a power amplifier as claimed in claim 7.

9. An oscillator including a noise trap circuit as claimed in claim 1.

10. The circuit of claim 1, wherein said circuit is implemented off-chip.

11. The circuit of claim 1, wherein said resonant circuit comprises a filter network.

12. The circuit of claim 11, wherein said filter network is a low pass filter.

13. The circuit of claim 1, wherein said resonant frequency is the difference between a transmit and a receive frequency.

14. A circuit substantially as herein described with reference to the drawings.