GB2267997A - Atomic scale devices - Google Patents

Atomic scale devices Download PDF

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GB2267997A
GB2267997A GB9312522A GB9312522A GB2267997A GB 2267997 A GB2267997 A GB 2267997A GB 9312522 A GB9312522 A GB 9312522A GB 9312522 A GB9312522 A GB 9312522A GB 2267997 A GB2267997 A GB 2267997A
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chain
substrate
conductive
tracks
structure according
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GB9312522D0 (en
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David A Williams
Julian Darryn White
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Hitachi Europe Ltd
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Hitachi Europe Ltd
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    • BPERFORMING OPERATIONS; TRANSPORTING
    • B82NANOTECHNOLOGY
    • B82YSPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y30/00Nanotechnology for materials or surface science, e.g. nanocomposites
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B82NANOTECHNOLOGY
    • B82BNANOSTRUCTURES FORMED BY MANIPULATION OF INDIVIDUAL ATOMS, MOLECULES, OR LIMITED COLLECTIONS OF ATOMS OR MOLECULES AS DISCRETE UNITS; MANUFACTURE OR TREATMENT THEREOF
    • B82B1/00Nanostructures formed by manipulation of individual atoms or molecules, or limited collections of atoms or molecules as discrete units
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B82NANOTECHNOLOGY
    • B82BNANOSTRUCTURES FORMED BY MANIPULATION OF INDIVIDUAL ATOMS, MOLECULES, OR LIMITED COLLECTIONS OF ATOMS OR MOLECULES AS DISCRETE UNITS; MANUFACTURE OR TREATMENT THEREOF
    • B82B3/00Manufacture or treatment of nanostructures by manipulation of individual atoms or molecules, or limited collections of atoms or molecules as discrete units
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B82NANOTECHNOLOGY
    • B82YSPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B82NANOTECHNOLOGY
    • B82YSPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y15/00Nanotechnology for interacting, sensing or actuating, e.g. quantum dots as markers in protein assays or molecular motors
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B82NANOTECHNOLOGY
    • B82YSPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y40/00Manufacture or treatment of nanostructures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/30Electron-beam or ion-beam tubes for localised treatment of objects
    • H01J37/317Electron-beam or ion-beam tubes for localised treatment of objects for changing properties of the objects or for applying thin layers thereon, e.g. for ion implantation
    • H01J37/3174Particle-beam lithography, e.g. electron beam lithography
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System

Abstract

Nanofabricated electro-conductive structures are disclosed, typically fabricated with a scanning tunneling microscope (STM), in which conductive chains of atoms (6) are formed on a substrate (1) by the STM and external connections are provided formed by electron beam lithography and optical lithography. Logic devices are disclosed. Also a method of lithography using an atomic force microscope (AFM) having a conductive tip is described. <IMAGE>

Description

Atomic Scale Devices DESCRIPTION This invention relates to nanofabricated electroconductive structures and methods of fabrication thereof, and has particular but not exclusive application to such structures when formed utilising a probe such as a scanning tunneling microscope (STM).
The STM has been demonstrated as a very useful tool for single atom manipulation and a general review is given in "Atomic and Molecular Manipulation with the Scanning Tunneling Microscope" J. A. Stroscio and D. M. Eigler Science Volume 254 29 November 1991 p. 1319 - 1326.
However, the structures so far reported have been rather impractical and serve only as a demonstration of the possibilities of the technique.
In accordance with the present invention, it has been appreciated that by the manipulation of individual atoms to form structures on an atomic scale and providing appropriate electrical connections, it is possible to achieve quantum electronic devices which do not require vacuum or low temperatures to operate.
In accordance with the present invention from a first aspect there is provided a nanofabricated electroconductive structure comprising a substrate, a nanofabricated chain of atoms on the substrate, the chain exhibiting an electrically conductive characteristic, and electrical connecting means formed on the substrate, said connecting means providing an electrical connection to the chain to permit charge carrier flow along the chain in dependence upon said characteristic.
Conveniently, the connecting means includes a plurality of conductive tracks formed on the substrate, with the chain bridging at least two of the tracks. The tracks can be formed by lithography. The atomic chain can be formed utilising a STM or similar probe e.g. an atomic force microscope (AFM).
The invention accordingly includes a method of forming a nanofabricated electro-conductive structure comprising forming a conductive track on a substrate, and utilising a probe to arrange individual atoms into a chain thereof exhibiting electrically conductive characteristics and which connects said track so as to permit electrical connection thereto.
At least one of the conductive tracks may be utilised as a source of atoms for assembly by the probe into the chain.
The invention also includes a nanofabricated electro-conductive structure comprising: first and second conductive regions with a space therebetween; and an atom selectively movable to and from said space.
This arrangement can be used as a quantum logic device.
The invention also includes a method of fabricating a plurality of electro-conductive structures on a substrate concurrently, wherein each structure includes atoms selectively arranged utilising a movable probe comprising utilising a plurality of such probes formed as a set thereof spaced apart on a common support member, to form features of said plural structures concurrently.
By this method, a plurality of devices can be formed simultaneously thereby increasing manufacturing yield and also permitting the fabrication of parallel structures wherein a plurality of devices are connected for parallel operation.
The invention furthermore includes a nanofabricated structure comprising a substrate, a region on the substrate to receive an atom, a plurality of chains of atoms directed towards said region, and means for providing an external connection to at least one of the chains.
This structure can be used to analyse field effects associated with a single atom received in the region.
The invention additionally includes a method of performing nanometer scale lithography wherein the substrate is provided with a coating of resist, comprising passing an AFM having an electrically conductive stylus over the resist coated substrate, and passing a current from the tip of the stylus to the resist in such a manner as to expose it selectively, whereby to permit selective removal of the resist thereafter.
In order that the invention may be more fully understood embodiments thereof will now be described by way of example with reference to the accompanying drawings, in which Figure 1 is a plan view of a nanofabricated circuit structure in accordance with the invention; Figure 2 is an enlarged view of a part of Figure 1; Figure 3 is a partial sectional view of the arrangement shown in Figure 1; Figure 4 illustrates a number of different configurations for the atomic chain wherein Figure 4A shows a simple chain, with regular atomic spacing; Figure 4B illustrates a chain with a spatial modulation of the atomic spacing along the chain; Figure 4C illustrates a chain made up of more than one type of atom in a regular pattern; Figure 4D illustrates a chain containing an impurity atom; and Figure 4E illustrates a chain with adjacent atoms that provide an external influence; Figure 5 is a schematic plan view of a logic device; Figure 6 is a schematic perspective view of another logic device in accordance with the invention; Figure 7 is a more detailed sectional view of a device operating in accordance with the principle described with reference to Figure 6; Figure 8 illustrates schematically, in section, a sequence of process steps for forming the hole shown in Figure 7; Figure 9 illustrates schematically an array of first and second sets of STM tips on a support member, for use in fabricating a plurality of devices simultaneously; Figure 10 illustrates schematically the electrical connections to the tips shown in Figure 9; Figure 11 is a schematic perspective view of a static device including a plurality of conductive atomic chains for confining a single atom; Figure 12 is a corresponding view wherein a single atom is retained from by fields from the atomic chains; Figure 13 is a schematic diagram of a dynamic device for mapping an atomic wavefunction; Figure 14 illustrates a grating arrangement for use in the device shown in Figure 13.
Figure 15 is a schematic drawing of an AFM used for surface topography; Figure 16 illustrates an AFM tip, coated with a metal, and showing wear; Figure 17 illustrates an AFM tip rendered conductive by ion implantation, and Figure 18 illustrates a lithographic method using an AFM.
Referring to Figure 1, the device consists of a substrate 1 e.g. gallium arsenide on to which a pattern of a conductive material such a gold is deposited so as to form bond pads 2, 3 with extensions 2a, 3a. The relatively large structure of the bond pads and extensions 2, 3 is defined by optical lithography.
An interdigitated structure of conductive tracks is formed between the extensions 2a, 3a. Thus, a series of tracks 4a, b, c connected to extension 2a, are interdigitated with conductive tracks 5a, b connected to extension 3a. This fine, interdigitated structure can be formed by high resolution electron beam lithography. The conductive tracks, 4, 5 are typically formed of gold.
As can be seen in Figure 2, an atomic chain 6 is formed bridging conductive tracks 4a, 5a of the interdigitated structure. This atomic chain can, as will be explained hereinafter, be formed by direct atomic manipulation so as to arrange individual atoms in a chain, for example by means of a STM, or by resist exposure.
The interdigitated structure 4, 5 has the advantage that when the atomic chain is formed, e.g. with the STM, the STM only has to be placed roughly in the region of the interdigitated tracks 4, 5 and the atomic chain can be formed anywhere therein so as to bridge the tracks 4, 5.
Considering the structure in more detail, in order that the bond pads 2, 3 may stick firmly to the underlying substrate 1, the gold layer may be overlaid on a thin layer of nichrome or titanium to improve adhesion with the substrate. The use of gold permits connection wires to be readily bonded to the pads 2, 3. Typical areas for the pads, to achieve efficient bonding, are 100 microns2. The extensions 2a, 3a are typically a few tens of microns wide, and the region between them is typically a few microns wide into which the interdigitated tracks 4, 5 are formed.
In order to fabricate the structure, the bond pads and their extensions 2, 3 can readily be formed using conventional optical lithography and may both be incorporated into the same mask level.
In order to form the interdigitated tracks 4, 5, by electron-beam lithography, a layer of PMMA about 100nm thick is spun onto the whole of the chip. This is somewhat thinner than normal and selected to achieve very high resolution lithography. Using for example a Nanowriter machine as can be found in the Microelectronics Research Centre, Cambridge University, England, it is possible to form a focussed electron beam with a spot size of the order of 5nm. This small spot is scanned over the surface of the resist. The exposed areas are then dissolved in a solvent such as methyl-iso-butyl-ketone/iso-propyl-alcohol solution.
In practice, the tracks can be written as lines 10-30nm wide in the resist with similar spacing. By evaporating metal e.g. gold and then performing liftoff, it is possible to fabricate metal tracks 4, 5 with the aforementioned width and spacing. At the end of this stage, interdigitated tracks are thus formed with a pitch of approximately 10-30nm, leaving a spacing therebetween to be spanned by the atomic chain 6, which will require a few hundred atoms.
The third stage of fabrication is the formation of the atomic chain 6 and an example thereof will now be described using a STM to achieve direct atomic manipulation of atoms in order to assemble the chain.
Many groups have demonstrated the manipulation of single atoms with an STM tip. The most successful attempts have relied on moving adsorbate atoms on the surface of a crystal and rearranging them in some geometrical pattern (Eigler et al, Nature, 352, 600 [1991]) or to remove atoms from the surface and leave single atom vacancies on a crystal of MoS2, as performed by Dr. Hosoki and co-workers at Hitachi Central Research Laboratories, Japan. In the above cited works, line and Roman characters were written using the presence or absence of atoms respectively on the surface of the crystal. However, none of the aforementioned structures were electrically active. In accordance with the example of the invention described herein, an electrically active structure is provided with electrical connections thereto.
An example of such a structure will now be described in detail with reference to Figure 3 which shows a schematic cross section of the device in the region of the interdigitated tracks 4a, 5a. A STM tip is used to manipulate individual atoms so as to form the conductive atomic chain 6. In this example, the chain 6 is formed of gold atoms which are derived from the interdigitated tracks e.g. from the track 4a. Since the tracks 4, 5 are formed themselves of gold, they can be used as a source of atoms for the chain 6.
The process of assembling the chain 6 comprises moving a STM tip 7 over a section of one of the tracks 4a, 5a (in the example track 4a) and removing a single atom.
The tip 7 is then moved into the gap region between the tracks 4a, 5a and the atom is deposited in an appropriate position to form the chain 6. The process for picking up and depositing a single atom is described in detail by Stroscio and Eigler supra In order to test the electrical continuity of the atomic chain 6, an electrical test current can be sourced and sunk by the tracks 4a, 5a and the STM tip 7 which are labelled as (a), (b), and (c) respectively in Figure 3. The values of the resistances between the three contacts during fabrication of the atom chain 6 can be described as follows: R (a)-(b) R (a)-(c) R (b)-(c) initial phase: low high high mid-way phase: medium high high final phase: medium medium low Thus, during the initial phase of fabrication of the chain 6, it contains a small number of atoms so that there is a low resistance between contacts (a) and (b).
However, as the chain length increases, the resistance R (a)-(b) increases. Conversely, the resistance R (b)-(c) is initially high but switches to a low value in the final phase of fabrication, when the chain forms an electrical connection with the conductive track 5a.
In this way, it is possible to monitor the length of the chain 6 and determine when an electrical bridging connection is formed by the chain between the conductive tracks 4a, 5a.
As explained by Stroscio and Eigler supra there are two major processes available for the movement of atoms over the surface of the crystal using an STM. The first is to change the local potential of the structure on which the atom sits in order to encourage the atom to diffuse in one preferred direction. The second method is to slide the atom over the surface of the crystal whilst underneath the STM tip. Both methods can be attempted in order to fabricate the atomic chain 6.
An advantage of using the interdigitated tracks 4, 5 as a basis for STM fabrication is that it facilitates location of the atomic chain once formed. With ordinary STM fabrication, the structure is written on a crystal surface which is a few millimeters in size and as a result, it is extremely easy to lose the position of the structure and almost impossible to re-locate it once the sample is taken out of the machine since the structure is very small in relation to the surface area on which it is formed. However, in the structure provided in the present invention, the tracks provide a guide in order to find the structure again for future imaging or even for modification thereof.
The physical structure of the atomic chain 6 determines the electrical conductive characteristics presented between the bond pads 2, 3 and thus by varying the detailed structure of the chain, different electrical characteristics can be achieved. In an atomic chain, one of the main energy-reducing mechanisms is the Peierls distortion, which leads to a charge density wave in the structure. The charge density wave will give rise to a non-linear conductive characteristic.
This should be observable in a simple regular chain, for example as shown in Figure 4A. However, predetermined pinning can be introduced into the chain by providing a modulation of the spacings between adjacent atoms in the chain, for example as shown in Figure 4B. Also, as shown in Figure 4C, a regular pattern of different atomic elements can be used in the chain to achieve pinning or similar effects.
Furthermore, impurity atoms can be introduced as shown in Figure 4D.
Furthermore, referring to Figure 4E, conduction along the chain can be controlled by Coulomb blockade. Atoms positioned adjacent to the chain 6, such as atoms 10, 11 will produce capacitive couplings with the chain, which may be configured to allow single electron conduction. Reference is directed to our application No. 9206812.1 for a fuller discussion of Coulomb blockade.
Quantum wires and wire-dot arrays fabricated in accordance with the invention will be operable at higher temperatures than have previously been reported, as a reduction in size of the structure gives the concomitant rise in the separation of energies of the eigenstates. It will be appreciated that an isolated atom is in principle a room temperature quantum dot or Coulomb blockade system. It will also be appreciated that the atomic chain can be constructed as an array or a ring structure, or an arbitrary shape for particular applications.
An example of the circuit implementation is shown in Figure 5 in schematic form, in which the discrete energy levels of a single atom are used to allow switching between atomic wires of different eigenstates.
Referring to Figure 5, a first quantum wire 12 is coupled by a single atom 13 to either a second quantum wire 14 or a third quantum wire 15. The quantum wires 12, 14, 15 comprise chains of atoms formed for example using a STM as previously described. The wires also are provided with external connections by means of interdigitated tracks, such as tracks 4, 5 previously described, but which are not shown in Figure 5. The single atom 13 can also be positioned by means of the STM tip 7 according to the technique previously described.
The wire 12 constitutes a multimode quantum wire exhibiting eigenstates A or B. The wires 14, 15 are single mode devices exhibiting eigenstates A and B respectively. The atom 13 is an essentially isolated atom and as a result, has an electron density which is non-uniform in three dimensions and its various electron levels have different spatial distributions as well as different energies and angular momentum states.
The atom 13 is switchable between eigenstates A and B by means of an external field, typically applied by an external electrode (not shown). Thus, the atom 13 can be used to switch connection between wire 12 and wire 14 or wire 12 and wire 15.
The different eigenstates of the wires can be defined in terms of energy or spin or a more complex combination. An example of energy selection would be where the incoming wire 12 has a small sub-band of electron states and each of the outgoing wires 14, 15 have smaller sub-bands, which correspond to discrete levels in the atom 13 and which overlap with the sub-bands of the incoming wire 12. A resulting selection of the conductive path between the wires 12, 14 and 15 is very rigorous due to the discrete nature of the atomic orbitals.
A more sophisticated implementation uses the spatial distribution of the atomic wavefunctions to increase the coupling. For example the atom 13 may have outer p orbitals which lie parallel to the surface, and which could oriented so that there is overlap with the multimode wire 12 and the mode B wire 15 but not with the mode A wire 14, whereas another s orbital can be configured to have overlap with mode A. In this way, selective electrical connection between the multimode wire 12 can be achieved with the single mode wires 14, 15.
Referring now to Figure 6, there is shown schematically a single atom logic device in which a single atom 18 is movable in a hole 19 in order to provide selective electrical connection between first and second conductive regions 20, 21. The device also includes third and fourth conductive regions 22, 23 so that when the atom 18 is moved downwardly in the hole selective connection is provided between the third and fourth regions. The first and second and/or the third and fourth conductive regions are provided with external connections, not shown, formed on the substrate, for example by electron beam and optical lithography in accordance with the principles described with reference to Figures 1 and 2.
A manner of manufacture of the device will now be described in more detail with reference to Figure 7.
The device consists of a substrate on which the third and fourth conductive regions or electrodes 22, 23 are formed as a single molecular layer formed for example by molecular beam expitaxy (MBE). It may also be possible to form the layer by CVD or even simple evaporation. The conductive regions 22, 23 are covered by an insulating layer 24, typically formed by MBE.
The first and second conductive regions 20, 21 are thereafter formed by MBE on the insulating layer 24.
The hole 19 is thereafter formed in the structure by removing atoms using a STM tip as will now be described with reference to Figure 8.
Referring to Figure 8A, the STM tip 7 is brought into close vicinity with substrate 1 which has formed thereon single atomic layers 24, 25 and 26, formed by MBE. As previously mentioned, the layer 24 is electrically insulating whereas the layers 25 and 26 are used to form the first second and third electrically conductive regions, as will now be explained.
Referring to Figure 8B, current is fed from the STM tip into the substrate so as to dig a hole through the layers 24, 25, 26. As shown in Figure 8B, the periphery of the hole has coarsely defined edges. As shown in Figure 8C, the hole is reconstructed at its edges, using the STM tip to manipulate individual atoms into appropriate positions. As shown in Figure 8D, the STM tip is used to construct an arrangement corresponding to that shown in Figure 7 wherein the first, second, third and fourth conductive regions 20-23 are formed, with a sharply defined hole 19 for receiving a single atom.
The STM tip 7 is then used to position a single conductive atom 18 in the hole 19 (not shown in Figure 8).
The lateral extent of the various layers 24, 25 and 26 is defined by conventional electron beam lithography.
Referring again to Figure 7, once the atom 18 has been installed in the hole 19, a capping layer 27 is applied over the surface of the hole 19 in order to retain the single atom 19. Additionally, an electrode (not shown) is applied over the capping layer so as to apply a field to the movable atom 18 to control its movement vertically within the hole 19. The layer 27 can be applied by any suitable conventional technique.
Thus, in use, when the movable atom 18 is biased to the position shown in Figure 7, an electrical connection is formed between the first and second conductive regions 20, 21, and no connection is provided between the third and fourth regions 22, 23.
However, when the movable atom 18 is biased downwardly, the connection between regions 20, 21 is disconnected and a connection is formed between regions 22, 23.
It will be appreciated that the device can be used as a switch or as a logic device. It may be manufactured as part of a circuit in which the larger scale features are formed by optical and electron beam lithography and only the finest features such as the hole 19, being formed by use of the STM.
In order to speed up the STM manufacturing step, it is possible to exploit the fact that many memory or logic circuits consist of multiple arrays of identical units.
Referring to Figure 9, there is shown an STM head which includes a plurality of STM tips, for permitting a plurality of circuit elements to be manufactured in parallel. As shown in Figure 9, four STM manufacturing tips 28, 29, 30 and 31 are arranged on a common support surface 32, with four outer tips 33, 34, 35 and 36.
The first, inner set of tips 28-31 are used to form four circuit devices in parallel whereas the outer, second set of tips are used for alignment purposes.
As shown in Figure 10, the support member 32 is provided with a metalisation pattern so that a common connection is provided to the first, inner set of tips 28-31 and individual contacts are provided for the second outer set 33-36.
In use, the tip heights need to be the same to within approximately two or three atomic diameters. This can be achieved by controlled electrolysis wherein an MBE grown wafer is held adjacent the tip, or by means of field ion emission. The tip array is brought close to the adjacent electrode and positioned approximately.
Then electrolysis or field emission is used to make the array uniform with the result that those tips nearest the other electrode erode the most quickly so that the tips assume a common height.
The invention also includes a device for atom mapping, for performing measurements on individual atoms, such as mapping their atomic wavefunctions. This can be achieved statically, or dynamically using a femtosecond laser system, with or without local solid state pulse compression. A static system will firstly be described.
Recently, there has been much work done on the physics of isolated ions and atoms held in electromagnetic traps. Referring to Figures 11 and 12, an electrostatic trap is formed by a plurality of nanofabricated finger structures, in the form of atomic chains fabricated using an STM tip, in the manner previously described. Thus, referring to Figue 11, the structure consists of a substrate 42 e.g. SiO2 with a central region 43, with a plurality of elongate atomic chains 44-49 extending radially outwardly, the atomic chains having been formed using an STM tip as previously described. Referring to Figure 12, an atom 50 under investigation is retained within the central region 43 by the application of suitable control potentials to the atomic chains 44-49, which are conductive. Suitable control potentials may be applied through conductive tracks such as the tracks 4, 5 as associated bond pads 2, 3 described with reference to Figure 1. The wavefunctions of the atom can then be investigated using an STM tip (not shown) which is brought close to the atom 50. By changing the bias on the atomic chains 44-49 selectively, it may be possible to move the atom around within the central area 43.
Improved imaging may be achieved using an atomic force microscope (AFM) in combination with the STM.
Furthermore, it may be possible to map the atomic wavefunction of the atom 50 using the atomic chains 44-49 individually thereby avoiding the need to use a separate movable STM tip. As shown in Figures 11 and 12, the atomic finger structures 44-49 are one atom in width and one or two atoms deep.
This system can be combined with a femtosecond laser system as shown in Figure 13 to observe single atom dynamics and to perform time resolved atomic tomography.
Referring to Figure 13, a single atom 50 is retained in a confinement region 43 by atomic chains 44, 47 (and perhaps others) in a manner corresponding to that shown in Figure 12. The atomic chain 47 is provided with an external connection 51 coupled to a laser pump 52 so as to supply an electrical pulse on a dynamic basis to the atom 50 under test.
The atomic chain 44 is provided with external connections, in the manner described with reference to Figure 1 so as to provide conductive channels 53, 54.
In use, an STM tip is brought close to the atom 50 and the STM tunneling current (the tunneling current that occurs between the tip 7 and the channel 54) is measured on a dynamic basis in response to an electrical pulse from the diode pump 52. The tunnel current as a function of time is a measure of the dynamic wavefunction of the atom 50. The conductive channel 53 can be utilised to receive a gate impulse from an external probe 55 to bias the tunneling current off during the occurrence of the input pulse from the laser 52. Thereafter the time related decay of the tunneling current can be measured in order to investigate the dynamic characteristics of the atom in response to the applied optical pulse.
Referring to Figure 14, the device can be modified to include a pulse compressor for the output from the laser pump 52. The pulse compressor consists of a waveguide 56 that receives a pulse from the pump 52 (not shown), the waveguide including a non-linear material 57. The output of the waveguide is fed to first and second gratings 58, 59 which are formed as a microfabricated structure on the substrate. The output of the gratings is fed into another waveguide 60 to be directed to the system under test. The pulse is thus compressed by means of the gratings, which improves the time resolution. The grating arrangement can be used both on the input from the laser pump 52 and/or the probe 55. This will allow a variable delay to be situated outside a dilution refrigerator or other test apparatus containing the configuration shown in Figure 13, and would compensate for dispersion in input fibers supplying the optical pulse to the system in Figure 13.
The nonlinear material 57 shown in Figure 14 introduces a frequency spread or "chirp" into the pulse which is then combined by the pair of gratings 58, 59, in a direct analogy of the conventional optical pulse compressor. The grating pair 58, 59 is fabricated as an integral part of the waveguide by optical or electron beam lithography and the resulting compressed pulse is injected into the sample under test 50.
Thus, in the foregoing examples of the invention, atomic chains are fabricated using an STM tip, which involves physically picking up atoms at the end of the STM tip, which is then moved to another region of the device where the adatom is then disposited. There are however other strategies for STM based nanofabrication which fall within the scope of the invention, but which have a substantially lower resolution. In these, the STM tip is used to score lines in the surface of a substrate or to create small raised areas by indenting the surface with the tip and then withdrawing the tip from the surface. In another method of nanofabrication, the STM tip is used as a current source in order to expose a thin layer of resist in a similar manner to electron beam lithography. This particular technique consists of using a substrate which is coated in some electron beam sensitive resist such as PMMA. The STM tip is scanned over the surface of the substrate whilst sourcing a current and in this case it would be difficult for the STM to image the substrate as the current would not be a tunnel current in the same sense as in normal STM operation. As long as the device is set in a constant current mode, the tip can be scanned in order to form a desired pattern in the resist. Using this technique, Dobisz et al (Appl. Phys. Lett., 58, 2562 [1991]) attained line widths of less than 30nm in SAL-601-ER7 resist, with the advantage over previous attempts that the thickness of the resist used was over twice that previously used when writing such narrow lines in PMMA. In accordance with the invention, this method can be improved by using an AFM instead of the STM for exposing the resist. To illustrate the advantages of using an AFM in this manner, its method of operation will now be outlined.
An AFM is basically a fine tip, similar to an STM tip but which, in contrast with an STM, makes mechanical contact with the surface under investigation and as long as the force applied between the tip and the surface does not surpass the yield stress of the surface under investigation, no permanent damage is effected to the surface. Thus, the AFM can image both condcutors and insulators alike and the harder the surface, the higher the resolution that is ultimately attainable. The AFM is described in detail in G Binnig and D.P.E. Smith, Rev. Sci. Instrum. 57, 726 (1986) and an example of the AFM is shown in Figure 15. A sharp stylus 62, mounted on a flexible cantilever 63 is dragged over a surface 64 under investigation. As this is done, the deflection of the cantilever is sensed, for example by measuring deflection with a laser beam 65, which gives a map of the surface topography. As the tip of the stylus 63 is in close proximity to the surface, within a few A, it experiences a predominantly repulsive interaction with the surface, and hence this mode of operation is termed as the "repulsive mode" namely repulsive with the Van-der Waals force which exists between isolated molecules. In a slightly more sophisticated mode of operation, if the deflection of the cantilever 63 is assumed to be proportional to the applied force between the surface and the stylus, which is usually true for small displacements, this can be equalised as it is scanned over the surface. This is achieved by mounting either the substrate or the tip on a slab of piezo-electric material (not shown) whose extension is controlled by a feedback signal produced from the displacement sensor, namely the sensor which senses the reflected laser beam 66. In this way, the surface topography of samples with a large height variation can be measured, of the order of microns, which would otherwise lead to breakage of the stylus due to excessive movement.
In a related method of operation, instead of the cantilever being effectively in contact with the surface under investigation as in the repulsive mode of operation, the stylus tip can be withdrawn, such that it hovers over the surface where it experiences a much weaker attractive force with the surface under investigation. In this mode, called the "attractive mode", during the imaging process, the tip effectively "flies" over the surface and is attracted to the surface when it encounters a protuberance. In a similar way, the resulting small deflection of the tip (and hence the cantilever) can be sensed by means of the laser beam and used to control a feedback system wherein the tip-sample distance is kept constant during the scanning. The signals from the feedback system can be used to provide a map of the surface. The main feature of this mode of operation is that the force exerted by the tip on the surface is much reduced, as compared to the previous mode, so that it can be used to image soft surfaces such as biological films and polymeric resists, without damaging the specimens.
The sensitivity of the AFM is such that it is presently capable of measuring height variations of a few over lateral areas of a few nanometers, when in the repulsive mode. Due to the smaller forces involved in the attractive mode, the resolution of this mode is less than the repulsive mode, but still of the order of a few nanometers.
As previously mentioned, an STM has been used hitherto as a current source in order to expose a thin layer of resist in a similar manner to electron beam lithography. However, the STM suffers from a number of disadvantages. Hitherto, the STM has been used in a field-emission mode for this purpose and although this technique has been successful, there are two inherent obstacles. Firstly, there is no control on the force between the STM tip and the PMMA film so that surface irregularities or slight variations in film thickness can push the tip into the film thereby damaging it.
Secondly, during imaging in a field emission mode, it is possible to chemically modify the film as a result of the imaging process, which degrades performance when the lines are actually written into the film thereafter.
In accordance with the present invention, it has been appreciated that these problems can be overcome by using an AFM.
The ability of the AFM to image the surface of the polymeric resist material, without necessarily exposing it to an electron beam, opens up the possiblity of using the device for the creation of patterns in the resist in a similar manner to prior art electron beams, where the tip of the AFM is used as a well-defined, small area source of electrons. To perform lithography with the AFM, it is necessary to provide the AFM with a conducting tip and an example of such an arrangement is shown in Figure 16. For conventional operation, the tips of atomic force microscopes are fabricated from hard materials such as silicon dioxide or silicon nitride, both of which are very good electrical insulators. In order to make the tip conducting, a thin layer of metal can be evaporated or sputtered over the end of the tip. Thus, referring to Figure 16, the tip 63a of the stylus is provided with a metal coating 67. However, as shown in Figure 16, if the metal is not stuck well to the surface of the tip or is soft in nature, then particularly in the repulsive mode, it can become mechanically worn at the apex of the tip as it is scanned over the surface, as shown in the region illustrated in dotted outline. Therefore, the metal used should be mechanically hard as it needs to be stuck particularly well to the underlying tip.
Suitable material is tantalum. Alternatively, the tip could be formed of a hard metal such as tungsten. A further possiblity is shown in Figure 17 wherein a dielectric AFM tip 63a is subjected to bombardment with metal ions, such as gallium such that a thin surface layer 68 of heavily implanted dielectric is formed on the exterior surface of the tip to provide a suitable conducting region at the apex of the tip. In this arrangement, the conducting layer is directly integrated into the material of the cantilever and so will not, in normal circumstances be worn off the end of the tip.
Referring now to Figure 18, this illustrates schematically the process of writing a line on a substrate with the AFM. The stylus 63 of the AFM is moved along a predetermined path over the surface of the substrate 70 which is coated with a polymeric (PMMA) resist layer 71. Current from a source 72 is applied through the conductive tip of the stylus 63 through the resist 71 to the substrate, which is essentially conductive. The passage of current through the resist layer 71 alters its composition chemically so that the resist can thereafter be removed in the region of a line by an appropriate chemical washing process.
If the resist 71 is conductive, it is possible for the current to flow by a pure ohmic conduction, with the AFM tip 63a in contact with the upper surface of the resist. Alternatively, the tip can be held at a large negative voltage relative to the substrate, in which case electrons will be field emitted from the end of the relatively sharp AFM tip. Here, the tip is acting like an electron source in an electron-beam column.
Under these conditions, the passage of electrons through the resist would be independent of the conductivity of the resist although it should be noted that this process occurs at a relatively higher voltage as compared to the case of the conducting resist. For the case of the AFM operating in the attractive mode, the field emission mode would be the only possible method, as the tip is not in physical contact with the surface.
In the foregoing, it is assumed that the substrate is conductive. However, reference should be made to our co-pending application GB9213423.8 which discloses a manner in which the substrate can be changed temporarily into a conductive condition and thereafter returned to an insulating condition so that the structures written on the substrate can be operated electrically after formation.

Claims (49)

1. A nanofabricated electro-conductive structure comprising a substrate, a nanofabricated chain of atoms on the substrate, the chain exhibiting an electrically conductive characteristic, and electrical connecting means formed on the substrate, said connecting means providing an electrical connection to the chain to permit charge carrier flow along the chain in dependence upon said characteristic.
2. A structure according to claim 1 wherein the connecting means includes a plurality of conductive tracks formed on the substrate, with the chain bridging at least two of the tracks.
3. A structure according to claim 2 wherein the electrical connecting means includes first and second sets of electrically conductive tracks, the tracks within each set being connected to one another, and the tracks of respective sets being interdigitated with one another, with said atomic chain forming a connection with a track of each set thereof.
4. A structure according to claim 2 or 3 wherein said tracks have been formed by lithography.
5. A structure according to claim 4 wherein said tracks have been formed by electron beam lithography.
6. A structure according to claim 5 wherein the tracks of each set thereof are electrically connected to a respective region formed on the substrate by optical lithography.
7. A structure according to any preceding claim wherein said atomic chain has been defined by arranging atoms in a chain with a movable probe.
8. A structure according to claim 7 wherein the atomic chain has been formed with a STM.
9. A structure according to any preceding claim wherein the spacings between adjacent atoms in the chain are arranged to differ for defining said electrically conductive characteristic.
10. A structure according to claim 9 wherein the spacing between adjacent atoms is provided with a preselected spatial modulation.
11. A structure according to claim 9 or 10 wherein the spacings define capacitive couplings between atoms in the chain, whereby charge flow along the chain is limited by Coulomb blockade.
12. A structure according to any preceding claim wherein the chain includes a plurality of different types of atoms arranged in a predetermined sequence for defining said electrically conductive characteristic.
13. A structure according to any preceding claim wherein said chain includes a first section operable at a plurality of different eigenstates, a second section operable at at least a first of said plurality of eigenstates, a third section operable at at least a second different one of said eigenstates, and a fourth section switchable between said first and second eigenstates for coupling said first section selectively to the second and third sections.
14. A structure according to claim 13 wherein fourth section comprises an atom in the chain.
15. A structure according to claim 13 or 14 including means for applying an external bias field to the fourth section for switching it selectively between said first and second eigenstates.
16. A structure according to claim 13, 14, 15 wherein said eigenstates comprise atomic energy levels.
17. A structure according to claim 13, 14, 15 wherein said eigenstates comprise spin states.
18. A method of forming a nanofabricated electroconductive structure, comprising forming a conductive track on a substrate, and utilising a probe to arrange individual atoms into a chain thereof exhibiting electrically conductive characterisitics and which connects to said track so as to permit electrical connection thereto.
19. A method according to claim 18 wherein said conductive track is utilised as a source of atoms for assembly by the probe into said chain.
20. A method according to claim 18 or 19 wherein said probe comprises the tip of a STM.
21. A method according to claim 18, 19 or 20 wherein said probe comprises the tip of an AFM.
22. A method according to any one of claims 18 to 21 including first and second of said tracks at spaced apart locations measuring the electrical resistance between the probe and the tracks for determining progress in formation of the chain, whereby to form a chain bridging said tracks.
23. A method according to any one of claims 18 to 22 including forming first and second sets of said tracks with the tracks within each set thereof being connected together, and the tracks of the respective sets being interdigitated with one another, and forming said atomic chain to bridge between said track of each set thereof.
24. A method according to any one of claims 18 to 23, including forming the or each of said tracks by electron beam lithography.
25. A method according to claim 23, including forming conductive regions by optical lithography to which the tracks of the repsective sets thereof are electrically connected.
26. A nanofabricated electro-conductive structure comprising a substrate; first and second conductive regions on the substrate with a space therebetween; and an atom selectively movable to and from said space to provide a selective connection between said first and second conductive regions, and electrical connection means formed on said substrate and providing electrical connections to said first and second conductive regions respectively.
27. A structure according to claim 26 including third and fourth conductive regions with a space therebetween, and means for moving said atom between said spaces to provide selective connection between said first and second regions or said third and fourth regions.
28. A method of fabricating a structure according to claim 26 or 27 comprising forming on a substrate a first conductive layer, forming a hole through said conductive layer so as to define said first and second conductive regions, providing a movable atom in the hole, and covering the hole with a cover layer.
29. A method according to claim 28 when appendant to claim 27, including forming a insulating layer over said first layer, forming a second conductive layer over said insulating layer, and forming said hole through said first conductive, said insulating and second conductive layers, whereby to form said third and fourth regions.
30. A method according to claim 28 or 29, including forming said layers by MBE.
31. A method according to claim 28, 29 or 30 including forming said hole with the tip of a movable probe.
32. A method according to claim 31 including selectively re-forming side walls of the hole using said probe to move atoms separately.
33. A method according to claim 31 or 32 when said probe comprises the tip of a STM or AFM.
34. A method of fabricating a plurality of electroconductive structures on a substrate concurrently, wherein each structure includes atoms selectively arranged utilising a movable probe, comprising utilising a plurality of probes formed as a set thereof spaced apart on a common support member, to form features of said plural structures concurrently.
35. A method according to claim 34 including a further set of said probes on the support member, and including the step of aligning at least one of the further probes with a predetermined reference on the substrate.
36. A method according to claim 35 wherein separate electrical connections are provided on the support member to said first and further sets of probes, and including the step of applying current to the first set to achieve selective movement of atoms on the substrate, and applying a signal to the further set for detecting alignment thereof relative to reference marks.
37. A nanofabricated structure according to any one of claims 1 to 8 including a region on the substrate to receive an atom to be tested, a plurality of said chains of atoms being directed towards said region, and said connecting means providing an external connection to at least one of the chains.
38. A structure according to claim 37 wherein said chains have been formed by selective positioning of single atoms with a probe.
39. A structure according to claim 37 or 38 including means for applying an optical pulse to one of said chains, and means for analysing the time dependent response of the atom to the pulse.
40. A method of performing nanometer scale lithography wherein the substrate is provided with a coating of resist, comprising passing an AFM having an electrically conductive stylus over the resist coated substrate, and passing a current from the tip of the stylus to the resist in such a manner as to expose it selectively, whereby to permit selective removal of the resist thereafter.
41. A method according to claim 40 including subsequently chemically removing the exposed regions of the resist.
42. A method according to claim 40 including subsequently removing non-exposed regions of the resist.
43. A method according to any one of claims 40 to 42 including moving the stylus over the substrate in such a manner that it contacts the surface of the resist, and supplying currents to the tip of the stylus such that current flows through the resist by ohmic conduction, to the substrate.
44. A method according to any one of claims 40 to 42 including moving the stylus over the surface of the resist, so as to be spaced therefrom, and causing current to flow by field emission from the stylus to the substrate through the resist.
45. A method according to any one of claims 40 to 44, wherein the AFM includes a stylus of non-conducting material, provided with a metallic coating.
46. A method according to any one of claims 40 to 44, wherein the AFM includes a stylus of non-conducting material, formed with an ion implanted conductive region at the tip thereof.
47. A method according to any one of claims 40 to 46, wherein the AFM is operable in an attractive or a repulsive mode.
48. A nanofabricated electro-conductive structure substantially as hereinbefore described with reference to Figures 1 to 4 or 5 or 6 to 8 or 9 and 10 or 11 and 12 or 13 and 14 or 15 to 18 of the accompanying drawings.
49. A method of nanofabricating an electroconductive structure substantially as hereinbefore described with reference to Figures 1 to 4 or 5 or 6 to 8, 9 and 10 or 11 and 12 or 13 and 14 or 15 to 18 of the accompanying drawings.
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EP1292361A1 (en) * 2000-05-26 2003-03-19 Northwestern University Methods utilizing scanning probe microscope tips and products therefor or produced thereby
US6744065B1 (en) 1997-11-21 2004-06-01 Btg International Limited Single electron devices
EP1542222A2 (en) * 2003-12-10 2005-06-15 Pioneer Corporation Recording/reproducing head, method of producing the same, recording apparatus and reproducing apparatus
EP1597194A1 (en) * 2003-02-07 2005-11-23 Nano Cluster Devices Ltd. Templated cluster assembled wires
US7199305B2 (en) 2002-08-08 2007-04-03 Nanoink, Inc. Protosubstrates
US7223444B2 (en) 2000-05-04 2007-05-29 Qunano Ab Particle deposition apparatus and methods for forming nanostructures

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US4987312A (en) * 1989-11-07 1991-01-22 International Business Machines Corporation Process for repositioning atoms on a surface using a scanning tunneling microscope
EP0427443A2 (en) * 1989-11-07 1991-05-15 International Business Machines Corporation Process and structure wherein atoms are repositioned on a surface using a scanning tunnelling microscope

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EP0376045A2 (en) * 1988-12-26 1990-07-04 Hitachi, Ltd. Method and apparatus for processing a fine pattern
US4987312A (en) * 1989-11-07 1991-01-22 International Business Machines Corporation Process for repositioning atoms on a surface using a scanning tunneling microscope
EP0427443A2 (en) * 1989-11-07 1991-05-15 International Business Machines Corporation Process and structure wherein atoms are repositioned on a surface using a scanning tunnelling microscope

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Publication number Priority date Publication date Assignee Title
EP0576263A2 (en) * 1992-06-24 1993-12-29 Hitachi Europe Limited Method for fabricing nano-scale devices and nano-scale device fabricated by that method
EP0576263A3 (en) * 1992-06-24 1994-10-19 Hitachi Europ Ltd Method for fabricing nano-scale devices and nano-scale device fabricated by that method.
US5763933A (en) * 1992-06-24 1998-06-09 Hitachi, Ltd. Nanofabricated structures having a region of changeable conductivity
US6744065B1 (en) 1997-11-21 2004-06-01 Btg International Limited Single electron devices
US7223444B2 (en) 2000-05-04 2007-05-29 Qunano Ab Particle deposition apparatus and methods for forming nanostructures
EP1292361A1 (en) * 2000-05-26 2003-03-19 Northwestern University Methods utilizing scanning probe microscope tips and products therefor or produced thereby
EP1292361A4 (en) * 2000-05-26 2004-07-07 Univ Northwestern Methods utilizing scanning probe microscope tips and products therefor or produced thereby
US7199305B2 (en) 2002-08-08 2007-04-03 Nanoink, Inc. Protosubstrates
EP1597194A1 (en) * 2003-02-07 2005-11-23 Nano Cluster Devices Ltd. Templated cluster assembled wires
EP1597194A4 (en) * 2003-02-07 2007-09-26 Nano Cluster Devices Ltd Templated cluster assembled wires
EP1542222A2 (en) * 2003-12-10 2005-06-15 Pioneer Corporation Recording/reproducing head, method of producing the same, recording apparatus and reproducing apparatus
EP1542222A3 (en) * 2003-12-10 2006-08-09 Pioneer Corporation Recording/reproducing head, method of producing the same, recording apparatus and reproducing apparatus

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