GB2250112A - Computer testing capture device - Google Patents

Computer testing capture device Download PDF

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Publication number
GB2250112A
GB2250112A GB9124188A GB9124188A GB2250112A GB 2250112 A GB2250112 A GB 2250112A GB 9124188 A GB9124188 A GB 9124188A GB 9124188 A GB9124188 A GB 9124188A GB 2250112 A GB2250112 A GB 2250112A
Authority
GB
Grant status
Application
Patent type
Prior art keywords
capture
circuit
screen
serial
device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
GB9124188A
Other versions
GB9124188D0 (en )
GB2250112B (en )
Inventor
John Gerard Curran
Edward Joseph Edmonds
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Elverex Ltd
Original Assignee
Elverex Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/30Monitoring
    • G06F11/34Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment
    • G06F11/3466Performance evaluation by tracing or monitoring
    • G06F11/348Circuit details, i.e. tracer hardware
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/30Monitoring
    • G06F11/34Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment
    • G06F11/3466Performance evaluation by tracing or monitoring
    • G06F11/3485Performance evaluation by tracing or monitoring for I/O devices
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/22Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2205Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
    • G06F11/2221Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested to test input/output devices or peripheral units
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/22Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2294Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing by remote test

Abstract

A capture device for use in testing a target computer 7 has a screen capture circuit 2 including a decode circuit 18 which reads pixel control signals transmitted to a target screen 17, to generate bytes for storage in a capture memory 19 and control signals for a memory pointer circuit 20. This allows monitoring of what is actually displayed on a target screen 17 rather than what is transmitted to the target screen memory 15. The device also includes a serial capture circuit (3, Fig 1) which carries out monitoring and/or simulation of transmitted or received serial signals for the target computer 7. <IMAGE>

Description

"A computer testing capture device" The invention relates to a capture device for use in testing of a target computer.

Heretofore, capture devices have included screen capture circuits which are constructed to read data transmitted to a screen memory of a target computer. The screen data is read from the screen memory and transmitted to a host computer where the data is stored either for recording as a reference target computer output or for comparison with a reference.

However, the screen data is generally a representation of what is displayed on the screen, for example, the letter "A" as seen on the screen is actually stored in screen memory as 41 Hex in some target computers. In such a situation, the screen capture circuit would only know that a representation of the letter "A" has been transmitted to the screen memory and it does not known what is actually displayed on the target screen. Accordingly, character fonts used and the manner (e.g. colour) in which pixels are displayed are not checked.

The invention is directed toward providing a capture device to overcome these problems.

According to the invention, there is provided a computer testing capture device comprising a screen capture circuit comprising: a decode circuit for decoding pixel control signals of a target screen and generating decoded data bytes representing displayed pixels; a capture memory for the decoded data bytes; an output interface for reading the decoded data for transmission to a host computer; and a capture memory address pointer circuit for directing access of the output interface to the capture memory, and wherein the decode circuit comprises means for controlling the pointer circuit in response to position control signals within the pixel control signals.

In one embodiment, the device further comprises a serial capture circuit comprising means for monitoring and simulation of serial data flow between a target computer and a serial device under control of the host computer.

The invention will be more clearly understood from the following description of some preferred embodiments thereof, given by way of example only with reference to the accompanying drawings in which: Fig. 1 is a block diagram showing a capture device of the invention, in use; Fig. 2 is a detailed drawing showing a screen capture circuit of the device; and Figs. 3, 4 and 5 are block diagrams showing different configurations for use of the capture device.

Referring to the drawings, and initially to Fig. 1 there is illustrated a capture device of the invention, indicated generally by the reference numeral 1. The device 1 includes a serial capture circuit 3 and a host computer bus interface 4. The bus interface 4 is connected to a host computer 5 by a cable interface 6. A screen capture circuit 2 is connected in a target computer 7 and to an interface circuit'8. The serial capture circuit 3 includes a microprocessor and a memory storing simulation programs. It is connected to transmit and receive lines 9 and 10 respectively connecting the target computer 7 with a serial device 11. The serial device may be a computer, a terminal, a tablet, a mouse or any other serial device.

Referring now to Fig. 2, the screen capture circuit 2 is illustrated in more detail together with portion of the target computer 7. Portions of the target computer 7 which are illustrated are a screen memory 15, which is connected to a graphics display circuit 16, which is in turn connected to a target screen 17. These circuits are conventional and require no further description. The screen capture circuit 2 comprises a decode circuit 18 which is connected to the output of the graphics display circuit 16. The decode circuit 18 is constructed to monitor the position and clock signals of pixel control signals and to generate hexadecimal bytes representing displayed pixels. The position and clock signals are used to generate these bytes and to generate control signals for the memory pointer circuit 20.The decode circuit 18 is connected to a capture memory 19 and a memory pointer circuit 20. The capture memory 19 is connected to an arbitration circuit 21 which is in turn connected to the bus interface 4.

In operation, as the target computer 7 operates, screen data is transmitted to the screen memory 15 from where it is read by the graphics display circuit 16, which in turn generates control signals for display of pixels at the target screen 17.

The pixel control signals include various electronic signals such as pixel data lines, horizontal and vertical synchronous signals, clock signals and blank signals. The pixel control signals are delivered directly to the decode circuit 18, in parallel with delivery to the target screen 17. The decode circuit 18 generates hexadecimal memory bytes from the pixel control signals, which memory bytes are transmitted to the capture memory 19 for storage. Monitored position signals within the pixel control signals are used to address these bytes and to generate control signals for the memory pointer circuit 20 to allow the host computer to read the capture memory 19 in an intelligent manner via the bus interface 4 and the arbitration circuit 21 (which controls access of the bus interface 4 to the capture memory 19).The position signals within the pixel control signals which are used for generation of the control signals for the memory pointer circuit 20 are horizontal and vertical synchronous signals and clock signals.

In addition, the decode circuit 18 is constructed to allow examination of individual pixels, which is useful where a computer test engineer wishes to filter out certain colour pixels for storage and/or comparison.

It will thus be appreciated that the screen capture circuit allows a user to examine the actual signals controlling the target screen so that such things as different fonts or even individual pixels may be monitored. The user is thus given a picture of what exactly is displayed rather than a representation of what should be displayed on the target screen.

Simultaneously with monitoring of what is displayed on the target screen, the capture device 1 allows capture of serial data on serial lines such as the lines 9 and 10 connecting the target computer 7 to the serial device 11. The serial data is also delivered to the host computer 5 in a suitable format by the serial capture circuit 3 for storage and/or verification.

As shown by the interrupted lines of Fig. 1, the serial capture circuit 3 may simply monitor the transmitted and received serial data.

Referring now to Figs. 3, 4 and 5 other arrangements are illustrated which show the manner in which the serial capture circuit 3 may be used. In Fig. 3, an arrangement is shown whereby the serial capture circuit generates signals which simulate received signals for the target computer 7 and monitors the subsequent transmit signals for line 9. This is carried out under control of the host computer 5. The reverse situation is illustrated in Fig. 4 in which the serial capture circuit 3 generates simulated transmit signals which are delivered by the serial capture circuit 3 to the serial device 11. The signals are monitored by the host computer 5.

Another arrangement is illustrated in Fig. 5 whereby the serial capture circuit 3 simulates both receive and transmit signals for the target computer 7 and the serial device 11, respectively.

It will thus be appreciated that the invention provides a capture device which is versatile in operation as it allows capture of both screen and serial signals of a target computer.

The invention is not limited to the embodiments hereinbefore described, but may be varied in construction and detail.

Claims (3)

1. A computer testing capture device comprising a screen capture circuit comprising: a decode circuit for decoding pixel control signals of a target screen and generating decoded data bytes representing displayed pixels; a capture memory for the decoded data bytes; an output interface for reading the decoded data for transmission to a host computer; and a capture memory address pointer circuit for directing access of the output interface to the capture memory, and wherein the decode circuit comprises means for controlling the pointer circuit in response to position control signals within the pixel control signals.
2. A device as claimed in claim 1, further comprising a serial capture circuit comprising means for monitoring and simulation of serial data flow between a target computer and a serial device under control of the host computer.
3. A device substantially as hereinbefore described with reference to and as illustrated in the accompanying drawings.
GB9124188A 1990-11-14 1991-11-14 A computer testing capture device Expired - Fee Related GB2250112B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
IE410290A IE904102A1 (en) 1990-11-14 1990-11-14 A screen capture circuit

Publications (3)

Publication Number Publication Date
GB9124188D0 GB9124188D0 (en) 1992-01-08
GB2250112A true true GB2250112A (en) 1992-05-27
GB2250112B GB2250112B (en) 1994-06-01

Family

ID=11039334

Family Applications (1)

Application Number Title Priority Date Filing Date
GB9124188A Expired - Fee Related GB2250112B (en) 1990-11-14 1991-11-14 A computer testing capture device

Country Status (2)

Country Link
BE (1) BE1003383A6 (en)
GB (1) GB2250112B (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0573686A1 (en) * 1992-06-10 1993-12-15 B.O.S. SOFTWARE GmbH Method for determining the state of a computer system
EP0642085A1 (en) * 1993-07-22 1995-03-08 Texas Instruments Incorporated Sampling circuits
WO1998010349A2 (en) * 1996-09-03 1998-03-12 Nuweb Content display monitor
WO2000013373A1 (en) * 1998-08-28 2000-03-09 Green Cathedral Limited Computer network information use monitoring

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2217070A (en) * 1988-03-30 1989-10-18 Elverex Ltd Software testing apparatus

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2217070A (en) * 1988-03-30 1989-10-18 Elverex Ltd Software testing apparatus

Cited By (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0573686A1 (en) * 1992-06-10 1993-12-15 B.O.S. SOFTWARE GmbH Method for determining the state of a computer system
EP0642085A1 (en) * 1993-07-22 1995-03-08 Texas Instruments Incorporated Sampling circuits
US7644156B2 (en) * 1996-09-03 2010-01-05 The Nielsen Company(US), LLC. Content display monitor
WO1998010349A3 (en) * 1996-09-03 1998-09-17 Nuweb Content display monitor
US8719698B2 (en) 1996-09-03 2014-05-06 Comscore, Inc. Content display monitor
US6108637A (en) * 1996-09-03 2000-08-22 Nielsen Media Research, Inc. Content display monitor
US8713428B2 (en) 1996-09-03 2014-04-29 Comscore, Inc. Content display monitor
US7386473B2 (en) * 1996-09-03 2008-06-10 Nielsen Media Research, Inc. Content display monitoring by a processing system
CN100507868C (en) 1996-09-03 2009-07-01 尼尔逊媒介研究股份有限公司;奈特若汀斯公司 Content display monitor
WO1998010349A2 (en) * 1996-09-03 1998-03-12 Nuweb Content display monitor
US7653724B2 (en) * 1996-09-03 2010-01-26 The Nielsen Company (Us), Llc. Content display monitor
US7716326B2 (en) * 1996-09-03 2010-05-11 The Nielsen Company (Us), Llc. Content display monitor
US7720963B2 (en) * 1996-09-03 2010-05-18 The Nielsen Company (Us), Llc Content display monitor
US7720964B2 (en) * 1996-09-03 2010-05-18 The Nielsen Company (Us), Llc Content display monitor
US7756974B2 (en) * 1996-09-03 2010-07-13 The Nielsen Company (Us), Llc. Content display monitor
US8769394B2 (en) 1996-09-03 2014-07-01 Comscore, Inc. Content display monitor
US6763383B1 (en) 1998-08-28 2004-07-13 Green Cathedral Limited Computer network information use monitoring
WO2000013373A1 (en) * 1998-08-28 2000-03-09 Green Cathedral Limited Computer network information use monitoring

Also Published As

Publication number Publication date Type
GB9124188D0 (en) 1992-01-08 grant
BE1003383A6 (en) 1992-03-10 grant
GB2250112B (en) 1994-06-01 grant

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Legal Events

Date Code Title Description
PCNP Patent ceased through non-payment of renewal fee

Effective date: 19971114