GB2241362A

GB2241362A - Computer aided processing of geometrical constructional objects (CAD models)

Info

Publication number: GB2241362A
Application number: GB9103539A
Authority: GB
Inventors: Michael Muenke
Original assignee: Fraunhofer Gesellschaft zur Forderung der Angewandten Forschung eV
Current assignee: Fraunhofer Gesellschaft zur Forderung der Angewandten Forschung eV
Priority date: 1990-02-23
Filing date: 1991-02-20
Publication date: 1991-08-28
Anticipated expiration: 2011-02-20
Also published as: GB2241362B; GB9103539D0

Abstract

Model data and relations are constantly retrieved, modified and stored and freed memory locations are processed during the model working process, and data from CAD models which are already generated, and which are stored e.g. in a hard disc data file, can be read into a model data structure to be processed for common further processing. The model data and relations are structured in a particular manner and partial structures are formed, which are each bounded by a start and an end address and the start address together with the end address and the associated partial structures are stored separately and can be retrieved separately. The method is carried out in a CAD workstation which additionally comprises a functional memory system, which consists of a functional access control, a structure processor, a table memory and a word-organised model data memory, as well as a buffer stage and a bush interface for coupling the functional memory system to the system bus of the CAS workstation. <IMAGE>

Description

Method of Computer-Aided Processing of Geometrical Constructional Objects (CAD Models) The invention relates to a method according to the pre-characterizing part of claim 1 and to a CAD workstation according to the precharacterizing part of claim 6.

1. Technical Field of Application The invention finds application as an optional hardware add-on device for CAD workstations for shortening the response time in interactive computer-aided modelling of very large and complex constructional objects (models) in the field of application of "mechanical construction and modelling of geometrical constructional objects" with the aid of 3D volume orientated CAD systems.

2. State of the Art 2.1 Introductorv Outline of Problem In the present state of the art CAD systems are increasingly based on universal workstations with CAD software implemented thereon. The computers are equipped with CAD-matched input/output devices for the operating environment of the CAD user.

The user of a CAD system expects it to develop and put into effect a possibility of realisation of a constructional object conceptually available to him, with the aid of the system and according to its internal rules. The conceptual process taking place during the construction is - on account of the interactive mode of operation with the computer - always informed by the CAD system as to the determination of the correctness or ability to be solved of the conceptual route. This takes place through the visual representation of the current state of development of the constructional object. Only through this representation is the system user informed as to the correctness of his way of thinking or of his possible erroneous thinking.So long now as the conceptual progress of the constructor can advance continuously, the working process of the man/computer system is optimal and ergonomic for the constructor. However the efforts to enlarge the scope of the data and the concomitant increase in complexity of the geometric data objects processed by CAD, as well as the increasing facilities of the CAD systems, lead to an increase in the system response time in modelling objects, which - in addition to other possible inadequacies in the functionality - even call into question the value of a 3D-CAD system.

The requirement for working memory capacity simply for the CAD model tends to the order of magnitude of 10 Mbyte or more. This applies all the more to future product models, in which not only the geometric data but all the data on a product are stored in a model internal to the computer. The anticipated higher functionality of future CAD systems and the very high increase in model data to be processed instantaneously thus require a sufficiently high processing capacity of the computer, both numerically and also for the model access and the model structuring in the working memory.

Model information, which is created in a B-rep modeller (boundary representation, surface boundary representation of geometrical objects), consists of the elements (e.g. geometrical elements: points, contours, surfaces, volume elements) and of their relationships (relations), e.g.

volumes to surfaces, surfaces to edges, edges to points. Analysis of the frequency distribution of the kinds of access in the modelling of various geometrical objects show that the central frequencies lie in the read accesses of the geometrically related element names, the element data and the element relations (Figure 1). Read accesses have the smaller duration relative to the write and erase functions. The two latter need additional operations modifying the structure as well as the operations concerning the data, which prolong the duration of the access substantially.

2.2 Disadvantages of the State of the Art To explain the disadvantages the following global processing tasks in the modelling of constructional objects with the aid of CAD will be considered: - the numerical computation of the topology and geometry of the model by the processor and co-processor and - the access to the structured data of the model in the working memory by the processor.

The processing times for both tasks are dependent on the loading of the processors involved and the access time of the working memory, which determines the speed of the transfer of commands and data to the processor. The model complexity and the model scope of information enter In as indeterminate dependent magnitudes.

Investigations by the applicant in a CAD system showed a high dependence of the process running time on the speed of the model data accesses, for which the following points can be cited as cause: - The access to the model data is implemented by software sub routines. The working through of the sub-routines is thus subject to the von Neumann bottleneck, which is imposed by the conventional computer architecture. By the von Neumann bottleneck is meant the kind and manner with which the implementing processor processes program instructions and data in the working memory.

- Accesses to the structured data of CAD models always require the traversal of an access path, i.e. an item of information has a reference (pointer) to the next item. Furthermore the data of the elements and the relations are stored scattered through the working memory on account of the dynamic modelling process. The constant changes in the model structure during the CAD process through writing and erasing model data accesses additionally require management for the model structure and working memory. Altogether there are mainly needed for this address computations, data transport and comparison operations. An accelerating support by the co-processor as in the actual geometrical computations of the model is not possible for this, since integer operations are involved in the memory operations.

- The potentially available possibility of parallel processing with model data access is not usable in CAD computer systems.

3. Brief Descrintion of the Invention The object of the invention is to avoid the disadvantages set forth under 2.2. and to shorten the processing times in CAD systems by speeding up the model data access.

In accordance with the invention this object is met by a method according to claim 1 in a CAD workstation with a supplementary functional memory system according to claim 6. Advantageous developments are characterized in the sub-claims.

The function unit can also be used for retro-speeding-up of existing workstations by designing the hardware interface as a standard bus interface. Figure 2 shows the principal system concept of the CAD workstation with the functional memory system.

The essential advantage of the method according to the invention according to claim 1 is that all operations which involve the management of and access to the CAD model data are separated from the actual CAD computing process and are carried out speeded up and thus relieve the central unit.

The features according to claim 2 effect a very rapid availability of the geometric data and relations in the read access and a further speeding up of the CAD process by writing and erasing running in parallel with the modelling process. Furthermore the design of the structure processor also permits the performance of memory operations on other data and relations in the model data memory.

The features according to claims 3 and 4 implement the separation of memory addresses as well as a small amount of data of individual data from the large amount of data of the structured model data and relations. Furthermore they have the effect that the separated individual data can be made available or stored by the hardware as fast as possible.

The features of claim 5 have the effect that the data amounts of the structured geometry-related data and relations are made available or stored sequentially in the FIFOs by the hardware with speeding up.

By means of the CAD workstation according to claim 6 the parallel processing in the computer system at the level of the CAD memory operations, e.g. when writing or erasing, as well as a pipelined mode of operation, e.g. by simultaneous reading of structured data in the functional memory system and its processing in the central unit, are made possible.

The invention will now be described by way of example with reference to the accompanying drawings, in which: Fig. 1 is a graphical representation of a frquency analysis of the model data accesses for an exemplary CAD model; Fig. 2 is a block diagram of the system concept of a CAD workstation with functional model memory system embodying the invention; Fig. 3a is a graphical representation of data organisation in the table memory of the embodiment of Fig. 2; Fig 3b is a graphical representation of address organisation in the working memory of the structure processor of the embodiment of Fig. 2; Fig. 4a is a graphical representation of relations partial structures for contours and points; Fig. 4b is a graphical representation of relations partial structures for surfaces and contours; Fig. 4c is a graphical representation of relations partial structures for volume bodies and surfaces;; Fig. 4d is a graphical representation of data sets for elements and relations; Fig. 4e is a graphical representation of relations partial structures for other relationships (here like relationships); Fig. 4f is a graphical representation of chaining of data sets for other data of an element; Fig. 5 is a block diagram of the hardware architecture of the embodiment of the invention; Fig. 6 is a graphical representation of the format of a command word; Fig. 7 is a graphical representation of access operations; Table l is a table of initialisation codes of the memory functions; and Table 2 is a table illustrating comparison of the read accesses for element relations.

4. Outline of the Method of Solution 4.1 Principle On the basis of the frequency analysis of the accesses to model data the following method of approach applies: All read accesses are carried out with support of hardware to attain the highest possible speed of access. This is effected in that the relevant access algorithms are transferred to a micro-coded controller and the storage of the data of the CAD model is supported by a suitable memory organisation, which consists of a table memory and a parallel memory.

Writing and erasing accesses are carried out in parallel with the central unit. The necessary operations for memory management are complex and are undertaken by a separate structure processor.

This also takes care of the updating of the table memory.

4.2 Hardware-orientated Data Oranisation The start addresses of all essential access paths of the model data structures are stored in a table memory and moreover in such a manner that all element-related in access paths are addressable already by detailing one geometrical element (e.g. point, contour, surface or volume element). This "reference element" is used as a key address for the rows of the table memory. In order that an unambiguous value is obtained for this address, it is furnished computationally from the.

value for the element type (e.g. edge), an identification number (e.g.

edge No. 25), which represents the individual element, as well as the current field start address in the table memory (Figure 6). This simple computing operation is effected before each access. As well as the start addresses the table memory contains additionally a column for the name of an element (e.g. for characterizing the element types "flat surface", "straight line", "semicircle", etc.). In Figure 3a the data organisation of the table memory is shown. The model data and the following addresses of the structured model information are however stored in a separate model data memorv.

For the addressing of the table columns an "access code" is used as well as the reference element. It contains declarations as to the kind of the access (read, write, erase) and further represents the information type "data of a model element" or "element relation" or "data of an element relation". The access code additionally includes an indication of the direction type of the relations partial structures. The relations partial structures are the organisation structures in which the data of the relations between model elements are stored. In the following the relations "surface - > volume element", "contour - > surfaces" and "point - > contours" are designated upwards relations.The relation directions pointing in the opposite direction "volume - > surfaces", "surface - > contours" and "contour - > points" are called downwards relations. The relations occur in pairs (e.g. K2- > P1 and K2 < -P1). They are therefore assembled in a data set (Figures 4a, 4b, 4c and 4d). The infrequent relations between like elements are called like relations.

The data associated with an element, e.g. the three coordinates of a point, are stored in a common element data set in the model data memory.

The address of an element data set is located in the corresponding associated memory location of the table memory (Figure 3a). The data set contains as additional information in the first datum the value of the number of the subsequently stored data (Figures 4d and 4f).

4.3 Coooeration with the Modelling Processes in the Central Unit Most access functions require the preparation of additional information, which specifies the operations to be carried out for the access. For example, for each data access, it must be indicated whether the access is an element data access or an access to relation data. The amount of the additional information increases through a further parameter when the data is arranged in different planes (e.g. to distinguish geometrical data and technological data, etc.). The evaluation of this information is a sequential process, since the making available is also sequential. With maintenance of a defined sequence this specification step can be pipelined with preparatory basic operations of the functional memory system.

In the communicating system "geometrical modeller - functional memory system" the following sequential steps are defined, according to which the memory system carries out each of the basic operations for the complete preparation for the model access (see also for this Table 1): Step 1: Initialisation of the functional memory system by transfer of a general access code (lust initialisation code), then Step 2: Transfer of the specification (2nd initialisation code), as to whether it concerns an "element access or relation access as well as a plane parameter possibly required, then Step 3: Transfer of the data inputs for the model representation within the computer or Wait for the data output and processing of the data.

After the second step the actual access procedure begins in the memory system. Figure 7 shows the time-wise cooperation between the central unit and the functional memory system schematically.

5. Svstem Architecture The functional memory system consists of five groups of components (Figure 5). these are - the group of components of the functional access control, - the group of components of the structure processor, - the table memory, - the model data memory and - the input/output buffer stage.

5.1 Functional Access Control The functional access control contains the algorithms of the most frequently used element data and relation accesses in a micro-programmed controller as sequences of callable hardware system states, which control all other components of the system. This arises from interpretations of access instructions and parameters, which reach the access control through the input buffer stage (FIFO 1). On the basis of the access instructions the access control determines next whether it a) can undertake the data access alone, or whether b) the access must be carried out in cooperation with the structure processor on account of additional structure operations, or whether c) the structure processor alone is to be active.

In both the last cases the structure processor is activated by the access control.

The access control has at its disposal for the reading and writing process an address generator as well as a down counter and a comparator.

The object of the address generator is to generate memory addresses for the model data memory to that data which is to be stored there or read out, e.g. addresses for the coordinates of the element "point" or addresses for the data and following pointer in a relation partial structure (Figures 4a, 4b, 4c).

The down counter stops the address generation when the number of the generated memory addresses is reached.

The address comparator informs the controller when the end of a passage through a relation partial structure is attained. This occurs through comparison of the address of a relation element with the current end address of the partial structure. This end address is present as an item of information in the table memory.

The address multiplexer normally only passes the addresses which are present on the internal system bus to the address generator and address comparator. In the case in which the structure processor must have access to the model data memory, the address path is redirected to the structure processor bus.

The control line multiplexer has the object of associating the control bus with either the controller or the structure processor. The switching itself is effected by the controller.

5.2 Structure Processor The purpose of the structure processor is to carry out the less frequent but time-intensive operations on the data structure or for the memory space management, e.g. in write and erase accesses. During the time that the structure processor is not needed by the access control it carries out the computations for memory space management. In addition it furnishes the identification numbers for elements to be newly entered and keeps account of the number of the elements for the different element types.

A further purpose is to carry out completely infrequent model data accesses for which hardware support is not made available. In this case the addresses are stored in the working memory of the structure processor, namely in a similar organisation to that in the table memory.

The difference lies however in the software implementation (e.g. as a firmware program in the PROM of the structure processor) and not in the hardware technology implementation.

The circuit of the component groups of the structure processor is conventional.

The bus interface serves for isolation and short-term connection of the bus systems during data transfer between the structure processor and the model data memory, the table memory or the input/output system.

Furthermore a possibly required data format conversion is effected in the bus interface. This is necessary when the microprocessor employed treats the data bits in a different sequence from the central unit.

Through the status register the structure processor obtains from the controller the information that it has been assigned the system control for the processing of certain complete access functions or parts thereof.

5.3 Table memory The table memory stores the relevant addresses for geometry-related element data of relation accesses for the element and relation data fields stored in the model data memory as well as the geometry-related names of the model elements in segments of a memory word (= table row), one element being associated with each memory word of the table memory.

The row address is designated as reference element address (see section 4.2). This is furnished via register 2 to the table memory. The segments (columns) of the table memory are addressed by the access control or if necessary by the structure processor on the basis of the access instruction.

5.4 Model Data Memorv The model data memory is laid out in parallel to obtain a short access time, i.e. while one memory bank effects a data transfer the following access is initiated in the next memory bank (pipelined data access).

This data organisation speeding up the data access is particularly well suited to the present application, since in all element related data accesses at least four words are written or read (e.g. three coordinate values for the "point" geometry element as well as the number "3". In the read data access two memory locations lying behind one another are to be read out per relation element. The parallel memory organisation is state of the art in the technology of mainframe computers, especially in vector computers.

5.5 InDut/OutDut Buffer Stage The FIFOs and registers serve as a buffer stage for equalising the different processing speeds of the coupled systems of central unit functional memory system.

5.6 Operating Principle 5.6.1 Access without Structure-Modifving Operations (Case a) The command word is passed to the controller via FIFO 1. The reference element address relevant to the access and the relation direction code are applied via register 2 to the address bus of the table memory or to the control line multiplexer. One row of the table memory is thus firstly addressed. After the interpretation of the access instruction a specific column of the table memory is activated by the controller, in the case of relation accesses using the direction code.

For a read access the stored word is applied to the internal bus.

According to the nature of the access instruction this word is either treated as an element name and loaded from the access control into the output FIFO 2 or it is treated as start address of a relation partial structure or of an element data set. In this case the address is applied to the model data memory though the address multiplexer and the address generator. From there the access control reads the required structured data sequentially and loads it into the FIFO 2 or, when it is not element data but element relations, into the FIFO 3.

In an element name write access on the other hand the datum is fetched from the FIFO 1 and entered in the addressed table memory location via the internal bus.

5.6.2 Access with Structure-Modifving Operations (Case b) On recognising a structure-modifying model access the structure processor is caused by the controller to read the command word likewise stored temporarily in the register 1. Then the structure processor takes over the control of the table memory (via the multiplexer and access control) and enters the immediately required and already generated addresses in the table memory. Then it transfers system control to the controller again. In the case of entering element data the controller reads the new address out and then fetches the data from the FIFO 1 and enters it in the model memory. While it does this the structure processor already computes the next free memory location.

In the case of entry of relation elements the structure processor reads the identification number of the relation element from FIFO 1 via the internal system bus and enters it itself in the model data structure in the model data memory. Whether a downwards, upwards or like relation is involved is apparent from the direction code, which is stored in register 1.

5.6.3 Infrequent Accesses (Case c) This concerns erase accesses in the model data structure and in the table memory and infrequent write or read accesses or those accesses which do not relate to the geometry of the model and are therefore not supported by the access control. The order of events is otherwise similar to case b.

5.7 Implementation Standard components are used for all hardware components.

Two cascaded single chip controllers AM29CPL152 for example can be used a microprogrammable controller. The use of PAL components or if desired gate arrays for the further components of the access control is advantageous in obtaining a high operating speed and in order to obtain a high packing density.

On account of the use of predominantly only elementary computing operations a RISC processor is suitable for the realisation of the structure processor, which has a higher processing speed than a conventional CISC processor, on account of its simple structure.

5.8 Software Interface and Range of Functions The functional memory system is caused to respond through instruction codes (initialisation codes) and additional parameters from the central unit. The command format is shown in Figure 6. As additional attributes to the initialisation code the command word contains, depending-on the kind of the instruction, the relation direction code and the reference element address of the value which represents the element type or the identification number of an element. The range of functions is apparent from Table 1.

The sub-division of the second initialisation code into geometry-related and non-geometry-related portions facilitates saving an additional plane parameter for the predominantly geometry-related, more precisely model geometry-related, data accesses in the initialisation. For example, auxiliary data for the visualisation can also be geometry data (e.g.

angle of view) while other auxiliary data can be dependent on computing methods of the modelling program - e.g. relations between volume elements for indicating that these should be combined with each other into a complex geometrical shape (like relations) - though such data are not determinative of form for the elements of the CAD model. For the initiation of such model data accesses initialisation codes basically in the category "non-geometrical" are used with the additional transmission of a plane parameter. This again facilitates the storage of in principle arbitrary model data in the functional memory system.

There exist in addition two collective codes which can be used to carry out groups of memory operations.

The combinations - read out element name, - read out element-related geometry data as well as - the said combination plus - read out element relations (upwards or downwards relations) are frequently of use in B-rep modelling and reduce the communication between the central unit and the functional memory system.

5.9 Exslanation of Exemplarv Functions of the Group of Accesses without Operations Modifying Structure (case a) 5.9.1 Exnlanation of the Instruction "read out qeometrv-related element data": See in this respect Table 1, Figure 4d, Figure 3a, Figure 5 and Figure 6.

Initial situation: The modelling program in the central unit needs the geometry data of the point element P1.

Functional Course of Events: The reference element address for the point element PI is determined and loaded into the FIFO 1 together with the first initialisation code (X3..XO:0111 and T2..TO:001) as command word. The controller reads out the command word and transfers it at the same time into register 1. The part of the command word which contains the reference element address and the relation direction code is moreover held in the register 2. In the present case however the direction code has no meaning.

While the controller interprets the first initialisation code and carries out a pre-prepared initialisation, it follows from the program sequence in the central unit that element-related geometry accesses are involved. Accordingly the second initialisation code (T2..TO:xxl; xmeans don't care) is then loaded in the FIFO 1. The initialisation of the functional memory system for the geometry data access is thereby completed.

According to the interpretation of the second initialisation code the controller loads the data field address from the table memory into the address generator. Furthermore the address generator is put into the burst access mode; i.e. the address generator applies the next address to the model data memory with each clock. The start address is applied at the same time to the model data memory. Thus the first datum is addressed in the model data memory and is loaded into the FIFO 2 by the controller. The central unit can read out this value for processing. The first datum gives by definition the number of the following geometry data. Accordingly it is loaded at the same time into the down counter.

Since the components of the functional access control are clocked from a common system clock the counting down, the generation of the memory location addresses and the reading of the data from the model data memory into the FIFO 2 are effected synchronously by the controller. As soon as the down counter has reached the value zero, the address generator is stopped by the controller.

5.9.2 Explanation of the Instruction "read out geometrv-relations": See in this respect Table 1, Figure 3a, F1gure#4b, Figure 5 and Figure 6.

Initial situation: The modelling program in the central unit needs all edges which are geometrically related to the surface element F1.

Functional Course of Events: The reference element address for the element F1 is determined and loaded into the FIFO 1 together with the first initialisation code (X3..XO:1000 and T2. .T0:010) as well as the relation direction code (R1..R0:10). The controller reads out the command word and transfers it at the same time into register 1. The part of the command word which contains the reference element address and the relation direction code is moreover held in the register 2 and applied to the table memory or to the control line multiplexer.

While the controller interprets the command and carries out a preprepared initialisation, it follows from the program sequence in the central unit that qeometrical element relations accesses are involved.

Accordingly the second initialisation code (T2. .T0:xlx; x means don't care) is then loaded in the FIFO 1. The initialisation of the functional memory system for the relation access is thereby completed.

After the interpretation of the second initialisation code the controller loads the start address of the relation partial structure from the table memory into the address generator and the end address into the address comparator. Furthermore the address generator is put into the burst mode. The address generator applies the start address at the same time to the model data memory. Accordingly the first relation element in the model data memory is addressed and transferred to the FIFO 3. The central unit can read out this value already for processing.

The address generator in the meantime applies the next address to the model data memory in accordance with the burst access mode. The content of this memory location is however by definition the memory location address of the subsequent relation element. The burst access mode is briefly interrupted by the controller, in order to load the following address into the address generator as a new start address. The address is at the same time compared by the address comparator with the end address of the relation partial structure. If the result of this comparison is negative, the burst mode is continued for the reading out next relation element. In the case when there is equality the controller is caused to end the relations access after the current access cycle and an end symbol is loaded into the FIFO 3 instead of a following address in the last data set.The address generator is then stopped by the controller.

5.9.3 Explanation of the Instruction "read out/write geometry element name": See in this respect Table 1, Figure 3a, Figure 5 and Figure 6.

Initial situation for read access: The modelling program in the central unit needs the name of the surface element F2.

Functional Course of Events: The reference element address for the element F2 is determined and loaded into the FIFO 1 together with the first initialisation code (X3..X0:0110 and T2..TO:100). The controller reads out the command word and transfers it at the same time into register 1. The part of the command word which contains the reference element address and the relation direction code is moreover held in the register 2. In the present case however the direction code has no meaning.

While the controller interprets the command it follows from the program sequence in the central unit that a geometry-related element access is involved. Accordingly the second initialisation code (T2..T0:1xx; x means donut care) is loaded in the FIFO 1.

The controller now activates a read access on the column of the table memory which stores the element name and loads the value in the FIFO 2, which is addressed by the reference element address. The central unit can read out this value for further processing.

Initial situation for write access: The modelling program in the central unit has determined the name of the element F2. This is to be stored in the model structure.

Functional Course of Events: The reference element address for the element F2 is determined and loaded into the FIFO 1 together with the first initialisation code (X3..X0:0010 and T2..T0:0l1). The controller reads out the command word and transfers it at the same time into register 1. The part of the command word which contains the reference element address and the relation direction code is moreover held in the register 2. In the present case however the direction code has no meaning.

While the controller interprets the command it follows from the program sequence in the central unit that a qeometrv-related element access is involved. Accordingly the second initialisation code (T2..TO:Oxx; x means don't care) is loaded in the FIFO 1 and then the element name which is to be enterd in the model structure. The central unit can then carry on with the modelling process.

The controller now activates a write access on the column of the table memory which stores the element name and transfers the element name from FIFO 1 into the row of the table memory which is addressed by the reference element address.

5.10 Explanation of Exemplary Functions of the Grout of Accesses with Operations Modifvinq Structure (case b) 5.10.1 Explanation of the Instruction "write aeometrv-related element data": See in this respect Table 1, Figure 3a, Figure 4d, Figure 5 and Figure 6.

Initial situation: The modelling program in the central unit has determined the geometry data of a geometrical element. This is to be stored in the model structure.

Functional Course of Events: The reference element address for the geometrical element is determined and loaded into the FIFO 1 together with the first initialisation code (X3. .X0:0011 and T2. .T0:101) as command word. The controller reads out the first command word and transfers it at the same time into register 1. The part of the command word which contains the reference element address and the relation direction code is moreover held in the register 2. In the present case however the direction code has no meaning.

On the basis of the first initialisation code the controller recognises that it must activate the structure processor for the system transfer.

This is effected by setting a bit in the status register and by switching over the path in the control line and address multiplexers, so that the structure processor can assume control of the system.

The structure processor reads the command word from the register 1, interprets it and waits for the second command word.

In the meantime the transfer into the FIFO 1 of the second initialisation code (and T2. .T0:000) and the geometrical data which is to be entered in the model structure takes place.

The central unit can then carry on with the modelling process.

After the interpretation of the second initialisation code the structure processor transfers the already determined address, under which the geometrical data is to be deposited in the model data memory, through the bus interface into the table memory. Then the structure processor reactivates the controller which carries out the actual data transfer.

To this end the controller loads the address just entered in the table memory into the address generator. This applies the address at the same time to the model data memory. By reading the FIFO 1 by the controller the first datum reaches the model data memory. This datum, which by definition contains the number of the following geometrical data, is loaded simultaneously into the down counter and into the register 1. It is read by the structure processor so that this can already compute and reserve the required memory location addresses for the later write accesses. Since the components of the functional control are clocked by a common system clock, the counting down, the generation of the memory location addresses in the address generator and the transfer of the next datum from the FIFO 1 into the model data memory take place synchronously through the controller.As soon as the down counter has reached the value zero the controller stops the address generator.

5.10.2 Explanation of the Instruction "create #eometrv-relation": See in this respect Table 1, Figure 3a, Figure 4a, Figure 5 and Figure 6.

Initial situation: The modelling program in the central unit requires the formation of the relations between the contour K3 and the points P1 and P3, so that the spatial position and length of the contour are determined. The formation of the relation takes place in two independent accesses. The relation formation K3- > Pl is explained here.

Functional Course of Events: The reference element address from the reference element K3 is determined by the central unit and loaded into the FIFO 1 together with the first initialisation code (X3. .X0:0100 and T2. .T0:000) and the relation direction code (R1..R0:10) as command word. Then it is determined in the course of the program in the central unit that a geometrical relation access is involved. Accordingly the second initialisation code (T2. .T0:000) together with the identification number of the point P1 are loaded as second command word in FIFO 1.

The central unit can then proceed with the modelling process.

On the basis of the first initialisation code the controller recognises that it must activate the structure processor. This is effected by setting a bit in the status register. Furthermore the path in the address multiplexer and in the control line multiplexer is so switched that the structure processor can assume control of the system.

The structure processor reads the first command word from the register 1 and determines the reference element address and the relation direction code. Then it reads the second command word with the identification number of the relation element from the FIFO 1.

As soon as the structure processor has interpreted the second initialisation code and the relation direction code, it reads out of the table memory the end address of the relation partial structure in question, the addressing of the table row already being effected in hardware by the reference element address in register 2.

Since no point relation has hitherto existed for the contour K3, the value 0 stands as the end address. Accordingly a free memory location address in the model data memory already determined beforehand by the structure processor is entered as end and as start address in the corresponding table memory location.

Then the structure processor enters a new relation data set in the model data memory through the address generator and the internal system bus.

This data set contains the identification number of the two relation partners, i.e. of K3 and P1. The identification number of K3 is determined by the structure processor from the reference element address. The following address is occupied by an end symbol, e.g. the value null. Other memory locations of the data set can be filled with appropriate information by other, separately executed access instructions, e.g. "enter relation-related name" or "enter relationrelated data".

In the second step now following the corresponding upwards relation P1- > K3 is created.

The structure processor determines from the identification number of P1 the reference element address and loads it, together with the relation direction code for the upwards relation (Rl..RO:01), in the register 2.

Then it reads from the table memory the end address of the upwards relation partial structure of PI.

Since a relation for point P1 to the contour K1 already exists (see Figure 4t), there applies as end address the value which points to the identification number,of K1 of the last relation set. In this case the value is identical with the start address. The end address is therefore overwritten by the structure processor with the value which points to a memory location of a new relation set in the model data memory, in which the identification number of K3 is stored. Then the structure processor places this new data set in the model data memory. The following address is occupied by the end symbol.

Finally the controller is reactivated by setting a bit at the controller input The controller switches the multiplexers back again and waits for the next instruction. Meanwhile the structure processor computes the next free memory location in the model data memory.

5.11 Ex#lanation of Exemplary Functions of the Group of Infrequent Accesses (case c) Other model accesses, e.g. such as do not concern the geometry of the model but also instructions for the generation of elements are carried out by the structure processor.

5.11.1 ExDlanation of the Instruction "create geometrical element": See in this respect Table 1, Figure 5 and Figure 6.

Initial situation: A surface element F < x) is to be created. The modelling program requires the corresponding identification number < x) for the surface element.

Functional Course of Events: The central unit loads into the FIFO 1 the number representing the element type "surface" instead of a reference element address together with the first initialisation code (X3..X0:0001 and T2..TO:000).

The controller reads the command word out and transfers it at the same time into the register 1. The holding of the part of the command word which contains the reference element address and the relation direction code in the register 2 has no meaning in the present case.

On the basis of the first initialisation code the controller recognises that it must activate the structure processor. This is effected by setting a bit in the status register. Furthermore it switches over the address multiplexer and the control line multiplexer so that the structure processor can assume control of the system. The structure processor now reads the first initialisation code and the element type number from the register 1 and interprets the instruction. Since it is to be expected that the identification number will be for the geometrical element type, a running number for the element in question is held ready for input to the FIFO 2.

In the meantime it is determined in the course of the program in the central unit that a geometric element is involved. Accordingly the second initialisation code (T2. .T0:Oxx; x means don't care) is loaded in the FIFO 1.

The structure processor reads this second command word from the FIFO 1 and interprets the second initialisation code. In this case the geometrical reference is determined. Accordingly the structure processor loads the identification number held at the ready into the FIFO 2. Then the system control is again given to the controller.

5.11.2 Explanation of the Instruction "erase geometry element name": See in this respect Table 1, Figure 3a, Figure 5 and Figure 6.

Initial situation for read access: The name of the surface element F2, accordingly the value which specifies the "surface" element type more precisely, e.g. "flat surface", is to be erased in the model data structure.

Functional Course of Events: The reference element address for the element F2 is determined by the central unit and is loaded into the FIFO 1 together with the first initialisation code (X3. .X0:1011 and T2. .T0:000) . The controller reads out the command word and transfers it at the same time into register 1.

The part of the command word which contains the reference element address and the relation direction code is moreover held in the register 2. In the present case however the direction code has no meaning.

On the basis of the first initialisation code the controller recognises that it must activate the structure processor. This is effected by setting a bit in the status register. Furthermore it switches over the control line multiplexer and the address multiplexer so that the structure processor can assume control of the system. The structure processor now reads the first initialisation code out of the register 1 and interprets the instruction.

In the meantime it is determined in the course of the program in the central unit that a geometricallv-related element access is involved.

Accordingly second initialisation code (T2. .T0:000) is loaded in the FIFO 1.

The central unit can then carry on with the modelling process.

The structure processor reads this second command word out of the FIFO 1 and interprets the second initialisation code. In this case the geometrical reference is determined. Accordingly there follows a write access to the name column of the table memory, e.g. by overwriting the name with the value 0. The table row is already hardware addressed by the reference element address in register 2. Then the system control is given back to the controller.

5.11.3 ExPlanation of the Instruction "erase qeometrv-related element data": See in this respect Table 1, Figure 3a, Figure 5 and Figure 6.

Initial situation: The data of the surface element F1 are to be erased in the model data structure.

Functional Course of Events: The reference element address for the element F1 is determined by the central unit and loaded into the FIFO 1 together with the first initialisation code (X3. .X0:1100 and T2. .T0:000) . The controller reads out the command word and transfers it at the same time into register 1.

This is effected by setting a bit in the status register. Furthermore it switches over the control line multiplexer and the address multiplexer, so that the structure processor can assume control of the system. The structure processor reads the first initialisation code, interprets the instruction and then waits for the second command word.

In the meantime it is found in the course of the program in the central unit that a qeometrv-related element data access is involved.

Accordingly the second initialisation code (T2. .TO:100) is loaded into the FIFO 1.

The central unit can then continue with the modelling process.

The structure processor reads this second command word from the FIFO 1 and interprets the second initialisation code, In this case the geometrical reference is determined. Accordingly there follows a write access to the memory location of the table memory which contains the address of the element data set, in that the old address is overwritten e.g. with the value 0. The table row is already hardware addressed by the reference element address in the register 2. Before the erasure however the old address is read out into the working memory of the structure processor, since it is needed for the following memory location management. On the basis of the old element data set address the structure processor determines the length of the data set which is no longer needed in the model data memorv.

The system control is then given back to the controller.

While the controller waits for the next instruction from the central unit, the memory locations of the just erased data set are taken into the free space management by the structure processor for later requirements.

5.11.4 Explanation of the Instruction "erase geometrv-relation": See in this respect Table 1, Figure 3a, Figure 4b, Figure 5 and Figure 6.

Initial situation: The geometry relation between the surface Fl and the edge K2 is to be erased in the model data structure.

Functional Course of Events: The reference element address from the reference element F1 is determined by the central unit and loaded into the FIFO 1 together with the first initialisation code (X3. .XO:1101 and T2..TO:000) and the relation direction code (Rl..R0:10). The controller reads out the command word and transfers it at the same time into register 1. The part of the command word which contains the reference element address and the relation direction code is moreover held in the register 2. The reference element address and the relation direction code are applied to the table memory and to the control line multiplexer respectively.

On the basis of the first initialisation code the controller recognises that it must activate the structure processor. This is effected by setting a bit in the status register. Furthermore it switches the control line multiplexer and the address multiplexer so that the structure processor can assume control of the system. The structure processor now reads the first initialisation code out of the register 1 and interprets the instruction.

In the meantime the second initialisation code (T2. .T0:000) together with the identification number of the relation element K2 are loaded into FIFO I instead of a reference element address.

The central unit can then proceed with the modelling process.

The structure processor reads the second command word out of the FIFO 1 and interprets the second initialisation code.

Then the start address, which marks the start of the relation of the downwards relation, is read out of the table memory. This address is applied by the structure processor to the model data memory through the address generator. The addressed memory word contains the identification number of the relation element. This word is compared with the identification number temporarily stored in the working memory of the structure processor. On lack of equality, by applying the next higher memory address, the following address of the relation partial structure is read out. By means of this address the next relation element to Fl is obtained and compared with the temporarily stored identification number.

This continues until the end of the relation partial structure is reached or until the comparison gives a positive result and the desired relation data set F1- > K2 is found. In this case the relation data set is eliminated in such a way that the following address of the preceding relation data set is corrected. In the case in which the sought for relation data set lies at the beginning or the end of the partial structure, the start or end address in the table memory is corrected.

Thereafter the start and end addresses for the downwards relations to F1 in the table memory are erased, i.e. they are overwritten with the null value.

Finally the system control is passed to the controller and the structure processor carries out the memory location management.

5.11.5 Explanation of the Instruction "erase geometrv-element": See in this respect Table 1, Figure 3a, Figures 4a to 4f, Figure 5 and Figure 6.

Initial situation: The geometry element F1 is to be erased together with all associated data and relations in the model data structure.

Functional Course of Events: The reference element address for the geometrical element is determined and loaded into the FIFO 1 together with the first initialisation code (X3. .XO:1010 and T2. .T0:00O) and the relation direction code (Ri. .R0:10). The controller reads out the command word and transfers it at the same time into register 1. The part of the command word which contains the reference element address and the relation direction code is moreover held in the register 2.

This is effected by setting a bit in the status register. Furthermore it switches over the control line multiplexer and the address multiplexer, so that the structure processor can assume control of the system.

The structure processor reads the command word from the register 1 and interprets the instruction. It then furnishes the identification number of the element to be erased from the reference element address.

In the meantime the second initialisation code (T2..TO:Ox; x means don't care) is loaded into the FIFO 1.

Then the central unit can proceed with the modelling process.

In the first step the name and the element data of the element F1 are erased. This takes place in accordance with the description under sections 5.11.2 and 5.11.3.

In the following step all relation elements to F1, accordingly downwards, upwards and possibly existing like relations, are transferred from the model data memory to the working memory in the structure processor and are stored there temporarily.

This is effected in that firstly the start address is read out of the table memory, which marks the start of the downwards relations to Fl (the row of the table memory is already addressed by the reference element address in register 2). The structure processor applies the start address through the address generator to the model data memory.

The addressed relation element is read out and stored temporarily in the working memory of the structure processor. By applying the next higher memory address the following address of the relation partial structure is read out. By means of this address the next relation element for Fl is obtained. This continues until the end of the relation partial structure is reached. Then the start and end addresses for the downwards relations for F1 are erased in the table memory, i.e. they are overwritten with the null value.

In the subsequent steps the relation set which contains the element F1, in the relation partial structures of the uDwards relations of each just obtained relation element, is erased. This takes place such that the structure processor determines the reference element address for each relation element and loads this in the register 2. Then it searches through the upwards relations with the aid of the start and end addresses in the model data memory and removes the relation set which contains the element F1.

The same procedure is repeated for the upwards and like relations to F1, the processing of the like relations not being additionally supported by the table memory but being undertaken solely in the working memory of the structure processor and in the model data memory.

At the conclusion the system control is given back to the controller.

While the controller awaits the next instruction from the central unit, the memory space of the data sets just erased is taken into the free space management by the structure processor for later requirements.

5.11.6 Explanation of the Instruction "read out element number for a geometry-element tvpe": See in this respect Table 1, Figure 5 and Figure 6.

Initial situation: The modelling program in the central unit needs the number of the geometry elements belonging to the "contour" element type, which already exist in the model data structure.

Functional Course of Events: The central unit loads into the FIFO 1 instead of a reference element address the number representing the "contour" element type, together with the first instruction code (X3..X0:1111 and T2..T0:000).

The controller reads out the command word and transfers it at the same time to the register R1. Holding the part of the command word which contains the reference element address and the relation direction code in the register R2 has no significance in the present case.

The structure processor now reads the first initialisation code and the element type number from the register 1 and interprets the instruction.

Since the number of the geometrical elements is presumably expected this is already held ready for output by the FIFO 2.

In the meantime it is determined in the course of the program in the central unit that a seometrv-related access is in question. Accordingly the second initialisation code (T2..TO:Oxx; x means don't care) is loaded into the FIFO 1.

The structure processor reads this second command word out of the FIFO 1 and interprets the second initialisation code. In this case the geometrical reference is ascertained. Accordingly the structure processor loads the value held at the ready into the FIFO 2. Then the system control is given back to the controller.

5.11.7 Ex#lanation of the Instruction "generate like relation": See in this respect Table 1, Figure 3b, Figure 4e, Figure 5 and Figure 6.

Initial situation: A'relation is to be created between the volume elements V3 and V4 so that these elements can be combined into an associated geometrical form in a later computing process.

Functional Course of Events: The reference element address from the reference element V3 is determined by the central unit and loaded into the FIFO 1 together with the first initialisation code (X3.,XO:0100 and T2..TO:000) and the relation direction code (R1..RO:11). The controller reads out the command word and transfers it at the same time into the register 1. The intermediate storage in the register 2 of the part of the command word which contains the reference element address and the relation direction code has however no significance in the present case. Then it is determined in the course of the program in the central unit that an access for like relations is involved. Accordingly the second initialisation code (T2..T0:001) and then sequentially the identification number of the volume element V4 and the plane parameter are loaded in FIFO 1.

The central unit can then proceed with the modelling process.

The structure processor now reads the command word from the register 1 and interprets the instruction. On the basis of the relations direction code it recognises the option "like relation". Then it reads sequentially through the bus interface the identification number of the relation element and the plane parameter from the FIFO 1.

By means of the reference element address stored in the register 1 the structure processor determines from the pointer list in its working memory the associated pointer (Figure 3b).

The structure processor reads out the end address from the address list in the working memory and then enters a new relation data set in the model data memory, in which are incorporated the type numbers and identification numbers of the two relation elements and the data plane.

Then the end symbol in the previously last relation data set is replaced by the new end address. Likewise the old end address in the pointer field is replaced by the new.

Then the reference address is determined from the identification number of V4 and the type number and the end address, which points to the new relation data set, is entered in the associated address list. In this case the end and start addresses have previously had the value 0, since no further special relations existed for the element V4. Accordingly the start address is overwritten identically with the end address.

In conclusion the computation of the memory space management takes place.

5.11.8 Explanation of the Instruction "read out like relation": See in this respect Table 1, Figure 3b, Figure 4e, Figure 5 and Figure 6.

Initial situation: A modelling program in the central unit requires the volume element which has a relation with the volume element "V2", so that these elements can then be geometrically combined with each other.

Functional Course of Events: The reference element address from the reference element V2 is determined by the central unit and loaded into the FIFO 1 together with the first initialisation code (13.10:1000 and T2..TO:010) and the relation direction code (R1..RO:11). The controller reads out the command word and transfers it at the same time into the register 1. The intermediate storage in the register 2 of the part of the command word which contains the reference element address and the relation direction code and the following preparation of the functional memory system for a geometry-related relation access have however no significance in the present case.

In the meantime the central unit sends to the FIFO 1 the 2nd initialisation code for reading the like relation (T2..0:xOx; x means don't care) as well as the plane parameter which specifies the logical data plane in which the like relation is stored in the data structure.

This code is also transferred into register 1 on read out by the controller, so that the 1st initialisation code is overwritten.

On the basis of the second initialisation code the controller recognises that it must activate the structure processor and therefore interrupts the previously running preparations for the geometry-related relation access and sets the bit for activating the structure processor in the status register. Furthermore it switches the address multiplexer and the control line multiplexer so that the structure processor can assume control of the system.

The structure processor now reads the command word out of the register 1 and interprets the instruction. Then it reads the plane parameter out of the FIFO 1 through the bus interface. By means of the reference element address stored in the register 1 it determines the start and end addresses for the other relations partial structures associated with the reference element (Figure 3b). Furthermore the type of the reference element is determined from the reference element address. On the basis of the relation direction code the option like relation" is recognised.

Then the relation data sets of the partial structure are searched through in the model data memory via the address generator, wherein the plane value and the relation type stored therein can be checked against the search criteria. On a positive comparison result for both checks the stored identification number is loaded into the FIFO 3. This operation occurs until the last relation is reached and the end symbol is loaded into the FIFO 3.

6. Advantages and ImDrovements obtained comPared with the State of the Art By distribution of the working memory capacities and memory organisation adapted to a CAD model as well as with a CAD-specific model memory control, the hardware architecture of the computer is matched to the requirements of the CAD. This leads to the following advantages: - The software algorithms employed for the model date access are for a substantial part replaced by an algorithm transferred into hardware.

The von Neumann bottleneck effect between processor and working memory in the course of the access algorithm is avoided. The operations are therefore always carried out more quickly than with a software controlled processor.

- Access operations altering structure, that is write and erase, take place in parallel with the central unit, in which the modelling programs run. The modelling program can therefore continue with the computations after initialising an access requirement.

- With an exclusively reading model access an overlapping mode of operation between the central unit and the memory function unit is possible (pipeline method), e.g. by reading out all model data for the visualisation process or in the transfer of the data to the hard disc.

- The reading in of the model in a fixed disc data file and the read out of the model structure into the model memory take place more rapidly on account of the hardware supported construction and disassembly of the model data structure.

- The functional memory system replaces working memory capacity and further reduces the intermediate storage on the hard disc.

7. Exemplarv Simulation of the Hardware-Surrorted Relation Access One of the most frequent access functions is read-out of the element relations, according to the model analyses. This function requires the traversal of the relation partial structures for geometrical relations.

The comparison between the analyzed machine code for the MC68020 microprocessor widely used in CAD workstations and the simulated results for an exemplary development version of the functional access control shows a substantial speed up for the read access to element relations, which acts particularly advantageously with a high number of relation elements (Table 2).

Claims

1. Method of computer-aided processing of CAD models, wherein the model data for constructing the model consist of elements and element relations and associated geometrical data and wherein these model data and relations are constantly retrieved, modified and stored and freed memory locations are processed, and wherein data from CAD models which are already generated, and which are stored e.g. in a hard disc data file, can be read into a model data structure to be processed for common further processing, characterized in that the element relations are defined by upwards and downwards relations and are stored with a data set (e.g. element and partner element, following addresses, relation name, etc.) and a plurality of data sets which are connected by an upwards or a downwards relation form partial structures, which are each bounded by a start address and end address, and the start address in common with the end address and the associated partial structure are separately stored and can be separately retrieved, and in that the element data and relation data are each defined by a data set, which is addressed in each case by an address, wherein the address of an element data set is stored separately from the element data and can be separately retrieved, and in that the addresses of the relation data are contained in the data sets of the relation partial structures.

2. Method according to claim 1, characterized in that the operation of writing element data and element names in the data structure as well as the operation of reading element data and relations are effected by a controller and addressing means associated therewith (functional access control) and in that the determination of all addresses for the storage of the model data and the process of the memory management in the writing and erasing of the data as well as the implementation of write and read accesses to seldom required supplementary data are effected by a processor (structure processor).

3. Method according to claim 1, characterized in that the operations in the model data accesses and the memory space management are called in and carried out by access instructions and in that the operations of writing, erasing and the memory space management are effected in parallel with the model computing processes and in that the operations for writing and reading on the one hand and for management of the memory space on the other hand run partially in parallel.

4. Method according to claims 1 to 2, characterized in that the storage of the element data and the relations is effected in a data memory (model data memory) in each case using addresses, the addresses for the geometry-related model data and relations being stored in a further memory (table memory), in that the geometry-related element names are likewise stored in the table memory, in that the addresses of other data and relations are stored in the working memory of the structure processor, in that the storing and up-dating of the addresses in the table memory are effected by the structure processor during the write and erase operations of geometry-related model data accesses and in that the storing of the addresses and of the element names in the table memory is effected under a single reference address and the addresses or the element name in question in each case (accordingly the corresponding table columns) is selected by the controller on the basis of the access instruction.

5. Method according to claims 1 - 4, characterized in that in the reading of geometry-related relations the start and end addresses of the corresponding partial structure are read out of the table memory and are fed to the model data memory via addressing means and an address comparator and in that the relation element is read out of the addressed data set and the following address stored after the relation element and is fed afresh to the addressing means and the address comparator and this operation is repeated until the address comparator indicates the end of the partial structure, and in that, on reading and writing of geometry data the address of the corresponding data set is read out of the table memory and is fed via addressing means to the model data store and the first read-out or written datum, which contains the length of the data set as a word, is applied to a counter and the data set is then read or written with the aid of the addressing means until the counter indicates the end of the data set.

6. CAD workstation with a central unit as well as a working memory associated therewith, an alphanumeric input/output, a graphical input/output system and a mass storage system (hard disc), which communicate with each other over a system bus, especially for carrying out the method according to claims 1 - 5, characterized in that there is additionally provided a functional memory system for management of CAD model data and for carrying out the model data accesses, consisting of: a) a functional access control, which controls the access, i.e.

read, write, erase, etc. of the functional memory system, b) a processor system (structure processor) especially for the memory space management, c) a table memory which stores the addresses for the element data and relations as well as the element names and has a long enough word length for a word to hold the following information items, which are capable of being written, read or erased independently of one another:: - the geometry-related element name - the address for the element data set - each of the start and end addresses for the geometry-related upwards relations - each of the start and end addresses for the geometry-related downwards relations d) a word-organised model data memory, which comprises a plurality of memory banks operating in parallel and which stores the element data, relations and relation data, e) an input/output buffer stage, which comprises a plurality of FIFOs and registers for matching the different processing speeds of the central unit and the functional memory system, f) a bus interface for coupling the functional memory system to the system bus of the CAD workstation.

7. CAD workstation according to claim 6, characterized in that the functional access control comprises a micro-programmed controller, a control line multiplexer for the system control bus of the functional memory system, an address multiplexer and an address generator connected thereafter, with address comparator and furthermore a down counter.

8. CAD workstation according to claims 6 and 7, characterized in that the controller itself contains the down counter.

9. CAD workstation according to claims 6 - 8, characterized in that the structure processor comprises an additional status register for communication with the controller and furthermore a bus interface through which the processor is capable of accessing the model data memory, the table memory and the FIFOs, and which facilitates parallel operation of the structure processor and of the controller in the case of memory management computation.