GB2217132A

GB2217132A - Switching circuit

Info

Publication number: GB2217132A
Application number: GB8806885A
Authority: GB
Inventors: Andrew Marshall
Original assignee: Texas Instruments Ltd
Current assignee: Texas Instruments Ltd
Priority date: 1988-03-23
Filing date: 1988-03-23
Publication date: 1989-10-18
Anticipated expiration: 2008-03-23
Also published as: GB2217132B; GB8806885D0

Abstract

In a transistor circuit, rapid turn-off of a bipolar transistor 1 is facilitated by connecting the base to a path of controlled conductivity of a second transistor 9 having its control electrode connected to an input terminal 4 and by arranging 9 to become conductive to turn off 1 by increasing the input signal at 4 (normally keeping transistor 1 conductive but not transistor 9) above a predetermined threshold level immediately before a falling transistion of the input signal. Transistor 9 is then turned off when input at 4 becomes sufficiently low. A diode or a zener diode may be included in the bias circuit of 9 for use with smaller input signals. An FET may be used in place of transistor 9 and a Schottky diode may be connected to the gate to delay turn-off of the FET for preventing a short burst of conduction of transistor 1. <IMAGE>

Description

IMPROVEMENTS IN OR RELATING TO TRANSISTOR CIRCUITS This invention relates to transistor circuits, and in particular to such circuits using bipolar transistors in which they are required to be switched rapidly to a nonconducting state.

Bipolar transistors are widely used as discrete devices and in integrated circuits, and it is well known that when switching such a transistor to a non-conducting state the charge carriers stored in the base region can delay the actual termination of collector current following the application of the switching signal to the base. A technique which has been used to reduce the charge carrier storage time is to apply an input signal of relatively high voltage of such polarity as to tend to switch off the bipolar transistor, so that the charge carriers are more quickly drawn out of the base region into the input signal circuit.

For applications when the range of variation of the input signal is restricted to one polarity only, as in conventional digital integrated circuits, this technique cannot be used.

It is an object of the present invention to reduce the charge carrier storage time whilst avoiding the difficulty mentioned above.

According to the present invention there is provided a transistor circuit including a bipolar transistor of which the emitter-collector path is connected to output terminals, connectable to an output circuit, an input terminal for receiving an input signal, resistive means connected from the input terminal to the base of the bipolar transistor, a second transistor having a control electrode and a path of controlled conductivity, the path of controlled conductivity being connected directly from the base of the bipolar transistor to a conductor which, in use, is maintained at a potential that would render the bipolar transistor nonconducting if it were to be applied to its base, and a connection from the input terminal to the control electrode of the second transistor, the circuit being such that a voltage applied to the input terminal between a first threshold level and a second threshold level causes the bipolar transistor only to conduct, and a voltage applied to the input terminal differing from the second threshold level in the opposite sense to the first threshold level, whilst tending to maintain the bipolar transistor conducting also causes the second transistor to conduct and to switch off the bipolar transistor.

The circuit may be used to provide a pulse output to the output circuit. Alternatively, the circuit may be arranged to provide linear amplification of input signal voltages between the first and second threshold levels.

When the second transistor conducts it collects the current fed to the base of the bipolar transistor through the resistive means and also removes charge carriers from the base of the bipolar transistor, so that the bipolar transistor is turned off quickly.

The second transistor may be a bipolar transistor.

This has the advantage that if the voltage applied to the input terminal is reduced rapidly from above the second threshold level to below the first threshold level, the second transistor may continue to conduct for a sufficient time period after the voltage has fallen below the second threshold level, by virtue of the charge carriers stored in its base, to hold the first-mentioned bipolar transistor nonconducting until after the voltage has fallen below the first threshold level.

The circuit connecting the input terminal to the control electrode of the second transistor will influence the second threshold level voltage at which the second transistor conducts. The connection circuit may comprise a series connected diode so that the second threshold level voltage exceeds the first threshold level voltage by the forward conduction voltage of the diode. As an alternative, the connection circuit may be a resistance potentiometer connected from the input terminal to a reference voltage, such as ground.

The second transistor may be a field effect transistor. The field effect transistor may have a conduction threshold voltage higher than that of the bipolar transistor, so that the gate of the field effect transistor may be connected directly to the input terminal. Means may be provided for maintaining the conduction of the field effect transistor during a falling transition from above the second threshold level voltage to below the first threshold level voltage.

Three examples of a transistor circuit according to the invention will now be described with reference to the accompanying drawings, of which: FIGURE 1 is a circuit diagram of one transistor circuit; FIGURE 2 is a diagram to be used in explaining the operation of the circuit of Figure 1; FIGURE 3 is a circuit diagram of a second transistor circuit; FIGURE 4 is a diagram similar to Figure 2 but to be used in explaining the operation of the circuit of Figure 3; FIGURE 5 is a circuit diagram of a third transistor circuit; and FIGURE 6 is a diagram similar to Figures 2 and 4 but to be used in explaining the operation of the circuit of Figure 5.

In Figure 1 there is shown an NPN output transistor 1 of which the emitter is connected to a grounded conductor 2.

An input terminal 3 is connected to the conductor 2 and an input terminal 4 is connected through a conductor 5 and a resistor 6 to the base of the transistor 1. The conductor 2 is also connected to an output terminal 7, a second output terminal 8 being connected to the collector of the transistor 1. A second NPN transistor 9 has its collector connected to the base of the transistor 1 and its emitter connected to the conductor 2. The base of the transistor 9 is connected to the junction of resistors 10 and 11 connected in series between the conductor 5 and the conductor 2.

The operation of the circuit of Figure 1 will now be described with reference to the diagram of Figure 2. When the input voltage applied across the input terminals 4 and 3 is close to ground voltage, both transistors 1 and 9 are not conducting. This condition is indicated by the region A indicated in Figure 2. For input voltages lying between approximately 0.7 volt and about 4 volts depending on the ratio of the values of resistors 10 and 11, the transistor 1 operates as a conventional amplifier and permits a controlled current to flow in an output circuit connected to terminals 7 and 8. This condition is indicated in Figure 2 by the reference B. At this time the transistor 9 is not conducting.For an input voltage in excess of about 4 volts determined by the ratio of resistors 10 and 11 the transistor 9 becomes conducting and connects the base of the transistor 1 to ground, thereby open-circuiting the connection between terminals 7 and 8 and terminating current flow in an output circuit connected to those terminals. It is clear that so long as the input voltage lies within a range E shown in Figure 2, between about 0.7 volt, indicated by the broken line F, and about 4 volts, indicated by the broken line G, the transistor 9 is not conducting, so that the transistor 1 operates as a, possibly linear, amplifier. The input voltage at which the transistor 9 starts to conduct can be adjusted to other values in excess of 0.7 volts by suitable choice of the values of the resistors 10 and 11.

If it is required to terminate the conduction of the transistor 1, the input voltage can be reduced below the 0.7 volt threshold, but the termination of conduction will be delayed following the change of the input voltage as a result of the charge carriers stored in the base of the transistor 1.

The conduction of the transistor 1 can be terminated without delay by raising the input voltage to a voltage level above that indicated by the broken line G, so that the transistor 9 conducts. This is represented by the region C in Figure 2. The size of the transistor 9 is chosen so that the base voltage of the transistor 1 is taken close to ground potential as a result of the conduction of the transistor 9 despite the current being applied to it through the resistor 6. This results in the transistor 1 being turned off and the stored charge carriers being rapidly taken from the base through the transistor 9 to ground. Whilst it would be possible to hold the transistor 1 non-conducting by maintaining the input voltage above the level represented by the broken line G, it might prove inconvenient to do so.The input voltage can, however, be rapidly taken down to a value close to zero again, and the transistor 1 held in a nonconducting state throughout the transition, until the input voltage is below the 0.7 volt threshold, by virtue of the charge carriers stored in the base of the transistor 9 which maintain that transistor conducting for the short period during which the input voltage traverses the range E to reach the region D indicated in Figure 2.

The example of the invention shown in Figure 1 is a relatively simple circuit capable of causing the conduction of the transistor 1 to be terminated rapidly when required, only a positive (for an NPN output transistor) pulse of short duration being required to be added to the input signal immediately before a falling transition to operate the circuit.

The circuit has the advantage that the additional pulse required to implement the rapid turn off of the output transistor is applied to the circuit along with the input signal on the same conductor as that signal. The transistor 9 used to produce the rapid turn off of the transistor 1 may be much smaller than the transistor 1 provided that its emitter-collector conduction is sufficiently high to draw the charge carriers from the base of the transistor 1 within a required time interval. Apart from the small load imposed on the driving circuits by the resistive potentiometer formed by the resistors 10 and 11, the transistor 9 absorbs substantially none of the power from the driving circuit whilst the transistor 1 is conducting.

The charge carrier storage in the base of the transistor 9 enables the input voltage to be returned to close to zero after the rapid turn off of the transistor 1 without a possibly undesirable short burst of conduction during the falling transition, so that apart from the need to provide a short duration voltage pulse to effect the rapid turn off of the transistor 1, the construction of the drive circuit may be conventional.

Figure 3 shows another example of the circuit according to the invention in which the NPN transistor 9 is replaced by an n-channel enhancement-mode field effect transistor 12. The gate of the transistor 12 is connected directly to the conductor 5 because use can be made of the threshold conduction voltage of the transistor 12 to provide the upper limit indicated by the broken line G in Figure 4 to the input voltage conduction range of the circuit. Although the transistor 12 does not display the charge carrier storage effect on its gate in the same way as a bipolar transistor does on its base, the gate capacitance of the transistor 12 may be arranged to maintain the transistor in conduction for a sufficient time to prevent the output transistor 1 becoming conducting during a falling transition of the input voltage across the range E.If necessary, the discharge of the gate of the transistor 12 may be delayed by the provision of a Schottky diode in the connection from the conductor 5 to the gate, allowance being made for the forward conduction potential of the diode in choosing the threshold conduction voltage of the field effect transistor 12.

Figure 5 shows a third example of the invention in which the base of the transistor 9 is connected through a diode 1 to the junction of a resistor 13 and the resistor 6 connected in series from the input terminal 4 to the base of the transistor 1. This circuit operates in a manner similar to the circuit shown in Figure 1 but with a much smaller range E of input voltage for which the output transistor 1 conducts. In the circuit of Figure 5, the transistor 1 becomes conducting for an input voltage of about 0.7 volt as in the circuit of Figure 1, but the transistor 9 becomes conducting for an input voltage of about 1.4 volts provided by the forward conduction threshold voltage of about 0.7 volt of the diode 14 together with the 0.7 volt threshold of conduction at the base of the transistor 9.

The circuit of Figure 5 could be modifed by connecting the diode 14 to the tapping of the potentiometer of the type shown in Figure 1 composed of resistors 10 and 11 in series between the conductor 5 and the conductor 2.

The NPN transistors used in the described examples could be replaced by PNP transistors, with reversal of the supply voltage polarity, and of the channel polarity of the field effect transistor if that is used. In all of the described examples, the ranges of the input voltage, for which the output transistor 1 conducts, can be altered from those mentioned by modification of resistor values in the potentiometer, by the addition of a diode or a zener diode or otherwise changing the circuitry connecting the input terminal to the control electrode (base or gate) of the second transistor.

Claims

CLAIMS:

1. A transistor circuit including a bipolar transistor of which the emitter-collector path is connected to output terminals, connectable to an output circuit, an input terminal for receiving an input signal, resistive means connected from the input terminal to the base of the bipolar transistor, a second transistor having a control electrode and a path of controlled conductivity, the path of controlled conductivity being connected directly from the base of the bipolar transistor to a conductor which, in use, is maintained at a potential that would render the bipolar transistor non-conducting if it were to be applied to its base, and a connection from the input terminal to the control electrode of the second transistor, the circuit being such that a voltage applied to the input termina] between a first threshold level and a second threshold level causes the bipolar transistor only to conduct, and a voltage applied to the input terminal differing from the second threshold level in the opposite sense to the first threshold level, whilst tending to maintain the bipolar transistor conducting also causes the second transistor to conduct and to switch off the bipolar transistor.

2. A circuit according to claim 1, wherein the second transistor is a bipolar transistor.

3. A circuit according to claim 2, wherein the second bipolar transistor can store charge carriers in its base to sustain it in conduction while an input voltage applied to the input terminal falls from above the second threshold voltage to below the first threshold voltage.

4. A circuit according to claim 1, wherein the second transistor is a field effect transistor.

5. A circuit according to any one of claims 1 to 4 having a circuit connecting the input terminal to the control electrode of the second transistor, which circuit comprises a series connected diode so that the second threshold voltage exceeds the first threshold voltage by the forward conduction voltage of the diode.

6. A circuit according to any one of claims 1 to 4 having a circuit connecting the input termina] to the control electrode of the second transistor, which circuit includes a resistance potentiometer connected from the input terminal to a reference voltage.

7. A circuit according to claim 4, wherein the field effect transistor has a higher conduction threshold voltage than the bipolar transistor and the gate of the field effect transistor is connected directly to the input terminal.

8. A circuit according to claim 7 including means for maintaining the conduction of the field effect transistor during a falling transition of a voltage applied to the input terminal from above the second threshold voltaae to below the first threshold voltage.

9. A circuit according to claim 8, wherein means for maintaining the conduction of the field effect transistor includes a Schottky diode connected in series from the input terminal to the gate of the field effect transistor to delay the discharge of the gate capacitance of the field effect transistor during the falling transition.

10. A circuit according to any preceding claim wherein the bipolar transistor operates as a linear amplifier for input voltages between the first threshold vo]tage and the second threshold voltage.

11. A transistor circuit substantially as described herein and as illustrated by Figures l and 2, Figures 3 and 4, or Figures 5 and 6 of the accompanying drawings, or modified as herein described.