GB2200771A

GB2200771A - Time-keeping apparatus

Info

Publication number: GB2200771A
Application number: GB08702142A
Authority: GB
Inventors: Jr Billy Wesley Beyers
Original assignee: RCA Corp
Current assignee: RCA Corp
Priority date: 1986-01-31
Filing date: 1987-01-30
Publication date: 1988-08-10
Also published as: KR870007470A; KR950003343B1; DE3702662C2; SG24892G; JPS62203089A; DE3702662A1; GB8702142D0; GB2200771B

Abstract

Time-keeping apparatus includes a microcomputer 26 having a normal, relatively high power consumption mode of operation and a standby relatively low power consumption mode of operation. The AC power supply 10 includes energy storage providing standby power for operation during power interruption. A controllable delay arrangement including capacitor 46 causes the microcomputer to operate in a cyclical mode wrth a relatively long duration in the standby mode of operation and a relatively short duration in the normal mode of operation. The time period of the relatively long duration, having been previously stored in memory, is utilized for incrementing the time-keeping during the relatively short duration in the normal mode until the end of the power interruption ends the cyclical mode of operation. <IMAGE>

Description

TIME-KEEPING APPARATUS The present invention relates to the field of time-keeping apparatus, particularly such apparatus as includes provision for keeping time during a period of interruption of a primary supply of operating power.

Electronic clocks commonly use the alternating current (AC) power line mains for an accurate time base as well as for their supply of operating power. Such clocks may typically be incorporated in electronic equipment such as video cassette recorders (VCR's), as timers for controlling timed operation and as timepieces for providing a display of the time of day.

Generally, it is desirable to maintain time-keeping during an AC power failure, particularly in a timer controlling the operation of other apparatus.

Standby power typically may be provided by a battery or, preferably, a large capacitor. Although in practical terms, a battery can generally provide a greater energy supply than a capacitor of comparable size and cost, batteries are not desirable, particularly in domestic AC line powered apparatus, since periodic replacement may be needed. This is a nuisance and requires access to internal circuit connections which is not desirable from a user safety aspect.

Many timers and clocks, particularly such as are incorporated in modern electronic equipment such as VCR's, employ a microcomputer. During standby periods, the clock oscillator associated with the microcomputer can be used as a reference source for time-keeping. A disadvantage of such a system is that, in order to keep time when AC power has failed, the microcomputer has to run continuously, thus consuming relatively high operating power. As a result, a relatively large standby energy storage capability is needed, so that time-keeping can only be maintained for a relatively short period of time.

Furthermore, accurate frequency control is also required in the absence of AC power, and is typically obtained by using a crystal.

In accordance with an aspect of the invention, apparatus for time-keeping while operating on a standby power supply during an interruption in a main power supply for a clock arrangement uses a microcomputer for generating and storing time information. The microcomputer has selectable normal and standby modes of operation respectively associated with relatively high and relatively low supply power consumption. Sensing circuitry is included for sensing the interruption when the microcomputer is in the normal mode. In response to the sensing of an interruption, the microcomputer triggers controllable delay circuitry for providing a delay period and selects the standby mode of operation.Mode selection circuitry is coupled to the microcomputer and to the controllable delay circuitry for selecting the normal mode in response to the delay period ending, so as to perform the cycle of operation repetitively so long as the sensing means senses the interruption.

In accordance with a further aspect of the invention, the number of times the cycle is performed and the duration of the delay period are stored in the microcdmputer.

In accordance with a still further aspect of the invention, the microcomputer augments the time information being stored by the multiplication product of the number count and the delay period. The microcomputer computes the multiplication product in the normal mode selected in response to the delay period ending in the last performance of the cycle in the interruption.

In accordance with another aspect of the invention, the microcomputer augments the time information being stored by the delay period at each performance of the cycle.

FIGURE 1 shows partly in block diagram form and partly in circuit schematic form a time-keeping apparatus for keeping time during a power failure, embodying the present invention; and FIGURE 2 shows a flow chart indicating certain operations useful in facilitating an understanding of the operation of the embodiment of Figure 1.

In the time-keeping apparatus of FIGURE 1, a supply of DC operating voltage Vcc is derived from the AC power line, represented by block 10. One pole of the supply line is coupled to a ground 12 while the other supply pole is coupled to the apparatus by way of a switch 14, representing an on/off switch. Switch 14 also represents that the AC supply is liable to interruption, as when a power failure occurs. The AC supplied by way of switch 14 when it is closed is rectified by a diode 16 and is applied to a filter and storage capacitor 18. A current limiting resistor 20 supplies DC current from capacitor 18 to a limiting avalanche dr Zener diode 22 which stabilizes the operating voltage Vcc at a supply conductor 24 at a suitable value relative to ground.A capacitor 25 coupled in shunt with diode 22 further reduces ripple and provides further energy storage and a low impedance AC shunt path to ground.

A microcomputer 26 which includes a memory is coupled to receive a supply of operating voltage between supply conductor 24 and ground by way of terminals 28 and 30, respectively. A microcomputer considered suitable is the Type HMCS 404, by the Hitachi Company of Japan. An LC tuned circuit 31 is coupled to a clock oscillator in microcomputer 26 for generating a clock signal for clocking of programmed computer operations. The frequency controlled by LC circuit 31 is subject to relatively wide tolerance variations and is therefore unsuitable as a time base for accurate time-keeping. Microcomputer 26 also receives a timing signal by way of a sensing terminal 32.

The timing signal is derived from the AC power line voltage supplied by way of switch 14 through a current limiting resistor 34 which is coupled between switch 14 and the joined cathodes of two diodes, 36 and 38. The anode of diode 36 is coupled to ground. The anode of diode 38 is coupled to terminal 32 and also to supply conductor 24 by way of a resistor 40. Diode 36 limits to one forward diode drop the negative voltage excursions at its cathode with respect to ground and thereby clamps negative voltage excursions at terminal 32 at groundipotential because of the compensating forward drop of diode 38 which is forward biased by Vcc through resistor 40. During positive voltage excursions of the AC power line voltage, diode 36 is reverse biased and diode 38 becomes reverse biased when the line voltage exceeds Vcc.Accordingly, the timing signal at terminal 32 will be approximately a square wave switching between Vcc and ground potential at the line frequency rate, for example, 60 Hz in the United States.

This timing signal provides an accurate time-base and is also utilized by microcomputer 26 to sense when a power interruption has occurred.

Microcomputer 26 has a NORMAL operating mode in which it provides normal computing and memory storage functions. In a STANDBY mode, the contents of the memory are retained but the clock oscillator is stopped and substantially all other functions are disabled, except for the capability of reverting to the NORMAL mode on command.

There is also a RESET mode which resembles the STANDBY mode except that the clock oscillator is operating. The RESET mode is employed briefly prior to entering the NORMAL mode.

The STANDBY mode is entered from the NORMAL mode under program control. Returning to the NORMAL mode is achieved by first selecting the RESET mode by applying a positive logic signal to microcomputer 26 by way of a RESET terminal 42 which is normally kept at ground potential.

Returning the signal at RESET terminal 42 to ground potential then causes the NORMAL mode to be selected.

RESET terminal 42 is coupled to circuitry, which in conjunction with microcomputer 26 determines mode selection, as will be explained. The output of a one-shot circuit 43, which is triggered when its trigger input voltage exceeds a predetermined trigger level, is coupled to RESET terminal 42. When triggered, one-shot 43 provides a positive output pulse of a duration which is long enough to enable the clock oscillator to restart and stabilize at the proper frequency. The trigger input of one-shot 43 is coupled to supply conductor 24 by way of a resistor 44 and to ground by way of a capacitor 46. An n-channel field effect transistor 48 has its drain electrode coupled to the junction of resistor 44 and capacitor 46, and its source electrode coupled to ground. The gate electrode of transistor 48 is coupled to an output terminal 50 of microcomputer 26.A time display module 52 is coupled to microcomputer 26 by way of a multiple data bus, as indicated in FIG. 1 by the broad line, for providing a display of the time of day as determined by the microcomputer.

In operation, AC power is first applied to the FIGURE 1 apparatus with no charge present on the capacitors prior to the circuit being energized. On closing switch 14, the clock signal is applied to terminal 32 and the operating voltage Vcc is quickly established at its proper level for microcomputer 26. Transistor 48 remains non-conductive and capacitor 46 is charged at a predetermined rate through resistor 44, causing the voltage at RESET terminal 42 to reach the level for triggering one-shot 43. Microcomputer 26 then briefly enters the RESET mode for the duration of the one-shot period and then enters the NORMAL mode of operation.

This sequence causes microcomputer 26 to operate in a CALIBRATE cycle (in the NORMAL mode), in which it applies a turn-on bias to the gate of transistor 48 by way of terminal 50, causing capacitor 46 to discharge rapidly and substantially completely through the low channel on-resistance.

Microcomputer 26 remains operational and biases transistor 48 off, thus allowing the voltage at the trigger input of one-shot 43 to begin rising as capacitor 46 begins to recharge. At the same time, microcomputer 26 measures the duration of the time interval required from the time transistor 48 was biased off for the voltage at the trigger input of one-shot 43 to reach the level required to trigger one-shot 43 by using the AC line frequency clock pulses as a reference, and stores the time interval measurement in memory. Thereafter, microcomputer 26 enters the RESET mode for the duration of the one-shot period and then returns to the NORMAL mode for its normal operations, including time-keeping and providing a time display in module 52.

The time of day information is derived by utilizing the timing signal at terminal 32. It is stored in memory and is continually updated as required.

When a power failure occurs, the clock signal at terminal 32 will stop immediately, whereas Vcc will be maintained for a time by the charge on capacitors 18 and 25, thus maintaining microcomputer 26 operational. When the clock signal stops, hicrocomputer 26 biases transistor 48 on, thereby starting to discharge rapidly capacitor 46 and causing the voltage at the trigger input of one-shot 43 to fall to ground level, and enters the STANDBY mode under program control. As explained, this causes substantially all microcomputer functions to cease except for memory retention.Transistor 48 is no longer biased on and capacitor 46 begins to recharge causing the voltage at terminal 50 to reach the level for triggering one-shot 43 after a time interval, this being the same time interval whose duration was previously measured and stored in the CALIBRATE cycle as was described. When one-shot 43 is triggered, its output pulse causes microcomputer 26 to enter the RESET mode briefly and then to enter the NORMAL mode when the output pulse ends. Microcomputer 26 then retrieves the time interval duration information from memory and uses it to increment the stored time of day information. This involves augmenting the stored time of day information by the actual time interval duration and is accomplished in a very brief interval. Thereafter, microcomputer 26 biases transistor 48 on to discharge capacitor 46 and returns to its STANDBY under program control.Transistor 48 is made nonconductive, capacitor 46 begins to recharge again and the cyclical mode-of operation continues and maintains the correct time of day so long as the charge on capacitors 18 and 25 is sufficient, until AC power is restored.

The time required for switching operations is very short and may be neglected in comparison with the time interval during which capacitor 46 is being charged. It is noted that the controllable delay time provided by the time constant of resistor 44 and capacitor 46 does not have to be known exactly for maintaining exact time. The stored time interval duration information, however, is precise, being the result of the time measurement performed in the CALIBRATE cycle using the AC line frequency clock signal, as previously explained. In the cyclical mode of operation, microcomputer 26 remains in the STANDBY mode of operation for most of the time, the periods of NORMAL operation being very brief in comparison. Typically, the power consumption may be ten times greater in the NORMAL mode than in the STANDBY mode, e.g. 100 microamperes and 10 microamperes, respectively.Accordingly, considerable economy in the STANDBY power requirements is achieved by the cyclical mode of operation which requires only recurrent brief intervals of operation in the NORMAL mode.

A part of this sequence of operation is shown in the simplified flow chart in FIGURE 2. When power is first applied at START, the delay period time is measured and stored in the microcomputer. When power is interrupted, the delay time starts to run and the microcomputer STANDBY mode is selected. When the delay period is completed, the microcomputer NORMAL mode is selected and the stored time information is updated by adding to it the stored value of the delay period time. The cycle is repeated until the power interruption is over, whereupon the operation returns to the START condition.

The implementation of the invention in accordance with FIGURES 1 and 2 is illustrative. Various modifications will readily suggest themselves to one skilled in the art for implementing the invention in accordance with the present description. For example, in the described embodiment, the time interval for discharging capacitor 46 by means of transistor 48 has been assumed to be negligibly short. In a different arrangement, this assumption may not be justifiable and it is then desirable to measure and store the total-time interval duration required for charging and discharging capacitor 46 in a CALIBRATE cycle. The total time duration is then used to increment the time of day.Also, it is not essential that a CALIBRATE cycle be employed each time power is restored, since the time constant of resistor 44 and capacitor 46 is not likely to change much over a considerable period of time. In such a case, it is possible to make the measurement once initially, for example using factory equipment, and to store the reading for use in operation.

Furthermore, while the time of day is incremented at every cycle in the described embodiment, this is not essential.

In an alternative embodiment, only the number of cycles is counted and the computation of total elapsed time as the product of the number of cycles and the stored time interval is performed only when AC power is restored. It is also clear that a battery may be employed instead of capacitor energy storage as shown in the exemplary embodiment. Such modifications are contemplated to be within the scope of the present invention.

Claims

CLAIMS:

1. 'Apparatus for time-keeping of a clock arrangement while operating on a standby power supply during an interruption in a main power supply comprising: sensing means for sensing said interruption, microcomputer means for generating and storing time information, said microcomputer means having selectable normal and standby modes of operation respectively associated with relatively high and relatively low supply power consumption, said microcomputer means selecting said standby mode of operation in response to said sensing means sensing said interruption; controllable delay means which provides a delay period in response to said sensing means sensing said interruption; and mode selection means which causes the microcomputer means to enter said normal mode in response to said delay period ending, the apparatus performing cycles of operation wherein said microcomputer means selects said standby mode of operation and said mode selection means selects said normal mode of operation repetitively so long as said sensing means senses said interruption.

2. Apparatus according to Claim 1 wherein said microcomputer means stores the number of times said cycle is performed.

3. Apparatus according to claim 1 or 2 wherein said microcomputer means stores the duration of said delay period.

4. Apparatus according to Claim 3 wherein said microcomputer means augments said time information being stored by the multiplication product of the number of times said cycle is performed and said delay period.

5. Apparatus according to Claim 4 as dependant indirectly on claim 2 wherein said microcomputer means computes said multiplication product in said normal mode selected in response to said delay period ending in the last performance of said cycle in said interruption.

6. Apparatus according to Claim 4 wherein said microcomputer means augments said time information being stored by said delay period at each performance of said cycle.

7. Apparatus according to Claim 6 wherein said microcomputer means augments said time information in said normal mode selected in response to said delay period ending.

8. Apparatus according to any of claims 3 to 7 having a calibration mode of operation for measuring said delay period.

9. Apparatus according to Claim 8 wherein said delay period is measured during said calibration mode in the absence of said interruption.

Apparatus according to any one of the preceding claims wherein said selecting by said mode selection means occurs with relatively small time delay in comparison with said delay period.

11. A method of time-keeping while operating on a standby power supply during an interruption in a main power supply for a clock arrangement using a microcomputer for generating and storing time information, said microcomputer having selectable normal and standby modes of operation respectively associated with relatively high and relatively low supply power consumption, comprising the steps of: (a) sensing the occurrence of said interruption during operation on said main power supply; (b) starting a delay period running in delay circuitry; (c) selecting said standby mode of operation; (d) selecting, at the end of said delay period, said normal mode of operation; and (e) repeating the cycle of steps (a),(b),(c) and (d), so long as said interruption continues to exist.

12. A method according Claim 11 further comprising the steps of: (f) computing the multiplication product of the number of times said cycle is performed and the time duration of said delay period; (g) starting said delay period running in said timing circuit when said interruption is over; and (h) measuring and storing the time duration of said delay period.

13. A method according to claim 11 or claim 12 further comprising the steps of: (i) storing the time of day provided by said clock arrangement during the absence of said interruption; and (j) augmenting said time of day being stored in accordance with the number of times said cycle is performed and the time duration of said delay period.

14. Time-keeping apparatus for operation from a supply liable to power interruption, said apparatus including: microcomputer means having first and second operating modes, respectively associated with relatively high and relatively low operating supply power consumption, said second mode of operation being selectable under program control, and having an input for selecting said first operating mode responsive to a mode selection signal, having memory means for storing a count throughout said first and second operating modes, having an output for providing a control signal, having sensing means coupled to said supply for sensing the occurrence of said power interruption;; power supply means for deriving a supply of operating voltage for said microcomputer means from said supply and including energy storage means for providing said operating voltage on the occurrence of said power interruption; and controllable delay means having a control input coupled to said microcomputer output and being responsive to said control signal for providing said mode selection signal so as to cause a cyclical mode of operation during said power interruption wherein said microcomputer, being normally in said first mode of operation in the absence of said power interruption selects, when said sensing means senses said power interruption, said second mode of operation and causes said delay means to select, after a time delay, said first operating mode so as to complete a cycle and cause another cycle to begin.

15. Apparatus according to Claim 14 wherein said microcomputer means includes timing means for providing a time base and provides and stores a time-keeping signal.

16. Apparatus according to Claim 14 or Claim 15 wherein said memory means stores the respective durations of said time delay.

17. Apparatus according to Claim 16 wherein said duration of said time delay stored in said memory means is permanently stored therein.

18. Apparatus according to Claim 16 wherein said duration of said time delay stored in said memory means is determined by said microcomputer means in the absence of said power interruption.

19. Apparatus according to Claim 18 wherein said microcomputer means performs a calibration cycle in the absence of said power interruption to determine said duration of said time delay and stores said duration.

20. Apparatus according to any one of claims 16 to 19 wherein said microcomputer means, when in said cyclical mode of operation, increments said time-keeping signal by the duration of said time delay when said delay means selects said first operating mode so as to complete a cycle.

21. Apparatus according to any one of claims 16 to 19 wherein said microcomputer means, when in said cyclical mode, cumulatively counts each cycle of said cyclical mode when in said first operating mode to obtain a total stored count of cycles of said cyclical mode.

22. Apparatus according to Claim 21 wherein said microcpmputer means, following said power interruption, determines the product of said total stored count of cycles and said duration of said time delay stored in said memory means.

23. Apparatus for time-keeping during an interruption of a main power supply substantially as herein described with reference to the accompanying drawings.

24. A method of time-keeping during an interruption of a main power supply substantially as herein described with reference to the accompanying drawings.