GB2193354A - Microprocessor-co-processor interface - Google Patents

Microprocessor-co-processor interface Download PDF

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Publication number
GB2193354A
GB2193354A GB08708137A GB8708137A GB2193354A GB 2193354 A GB2193354 A GB 2193354A GB 08708137 A GB08708137 A GB 08708137A GB 8708137 A GB8708137 A GB 8708137A GB 2193354 A GB2193354 A GB 2193354A
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United Kingdom
Prior art keywords
processor
microcomputer
combination
adaptor
bbc
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
GB08708137A
Other versions
GB8708137D0 (en
Inventor
Ian Tresman
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
ABBASFORD Ltd
Original Assignee
ABBASFORD Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ABBASFORD Ltd filed Critical ABBASFORD Ltd
Publication of GB8708137D0 publication Critical patent/GB8708137D0/en
Publication of GB2193354A publication Critical patent/GB2193354A/en
Withdrawn legal-status Critical Current

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Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3877Concurrent instruction execution, e.g. pipeline or look ahead using a slave processor, e.g. coprocessor

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  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Power Sources (AREA)

Abstract

A BBC microcomputer 36 is equipped with a co-processor 34 via the external tube 38 of the microcomputer. This is enabled by an adaptor interface incorporating two I/O ports 40, 42 which are connected to the custom interface chip 44 of the co-processor and connect with the external tube to effect interfacing of the co-processor with the microcomputer. The adaptor interface preferably incorporates a buffer 37 through which the co- processor is provided with its own controlled power supply 39. <IMAGE>

Description

SPECIFICATION Method of and means for equipping a microcomputer with a co-processor Field of the invention This invention relates to a method of equipping a microcomputer with a co-processor and to the combination, with the co-processor, of means for enabling its attachment to a microcomputer equipped with an interface socket for a second processor.
Definitions As used herein, the term "co-processor" means a supplementary processor which in the prior art has utilised the mains power available from on-board the microcomputer to which the supplementary processor is connected, and commonly has a series of plug-in cards which plug into internal sockets specifically provided for the purpose within the microcomputer.
The term "second processor" as used herein means a supplementary processor which has its own mains power supply circuit, and is adapted to plug into an external socket provided on the microcomputer specifically for that purpose.
The term "tube" as used herein means the interface between the microcomputer and a supplementary processor. Thus, a co-processor normally interfaces with the microcomputer through an internal tube, while a second processor normally interfaces with the microcomputer through an external tube.
Background to the invention The invention hereinafter to be described is more especially concerned with the range of computers manufactured by Acorn Computers Ltd. This range currently comprises the BBC Model B, the BBC Model B+ and the BBC Master 128.
In the case of the Master 128, supplementary processors available are the 65c102, the 80186 and the 32016, which are all co-processors known as the Turbo, the 512 and the Scientific co-processors. Any one of these coprocessors can be interfaced with the Master 128 through an internal tube.
In the case of all the BBC computers in the range, second processors available are the 6502, the Z80 and the 32016, any one of which will interface with the microcomputer through an external tube.
The 6502, Z80 and 32016 second processors are all provided with their own power supply circuits, but in the prior art the Turbo, 512 and Scientific co-processors have all drawn power from the on-board supply in the microcomputer.
It is an object of this invention to provide a method of and means for attaching a co-processor to a microcomputer through an external tube.
The invention According to one aspect of this invention, there is provided a method of equipping a microcomputer with a co-processor (as hereinbefore defined), said microcomputer being equipped with an external socket for attachment of a second processor (also as hereinbefore defined), according to which the custom interface chip of the co-processor has an adaptor interface including two l/O ports connected thereto, and an interfacing means is employed to connect the two I/O ports of the co-processor adaptor to the external socket of the microcomputer, whereby in use the coprocessor is adapted to operate in conjunction with the microcomputer processor.
According to a second aspect of the invention, there is provided, in combination with a co-processor (as hereinbefore defined) modified by the provision of an adaptor interface including two I/O ports connected to its custom interface chip, apparatus for attaching the co-processor to a microcomputer having an external socket for attachment of a second processor (also as hereinbefore defined), said apparatus comprising interfacing means for connecting the two I/O connectors of the coprocessor adaptor with the external socket of the microcomputer, whereby in use the coprocessor is enabled to operate in conjunction with the microcomputer processor.
The microcomputer referred to is, in particular an Acorn microcomputer known as the BBC Model B, BBC Model B+ or the BBC Master 128. The co-processor is, more especially, but not exclusively, the equivalent of the known Turbo, 512 or Scientific co-processors, respectively incorporating the 65c102, 80186 or 32016 processors together with additional memory of from 64K up to 512K and possibly also incorporating a mathematics processor in the case of the 32016 co-processor. However, the co-processor of this invention connects to any of the current Acorn range of microcomputers via an external tube (external interface), regardless of the fact that such supplementary processor is a co-processor normally connecting via an internal tube.
In a preferred arrangement, the co-processor is modified by the connection of an adaptor interface to the custom interface chip, which adaptor includes a buffer by which the two I/O ports are connected to the custom interface chip, the buffer also connecting to a controlled power supply circuit, preferably via a power fail detect circuit. In the alternative, the co-processor derives power from the microcomputer, as in co-processors known from the prior art, but via the external tube instead of the internal tube.
Description of drawings Further features of the invention will be ap parent from the following description, which makes reference to the accompanying drawings, in which: Figure 1 is a block circuit diagram applicable to a BBC Master 128 microcomputer when equipped in known manner with a co-processor; Figure 2 is a block circuit diagram applicable to any microcomputer in the current Acorn range when equipped in known manner with a second processor; Figure 3 is a block circuit diagram applicable to any microcomputer in the current Acorn range when equipped in a preferred manner in accordance with this invention with a co-processor;; Figure 4 is a circuit connection diagram showing the minimum connections provided, in accordance with this invention, at a coprocessor adaptor, more especially a co-processor embodying the 65c102, 80186 or 32016 processors, in order to enable interfacing with the external tube of any one of the BBC Master 128, BBC Model B or BBC Model B+ microcomputers; Figure 5 shows the circuit connections of a preferred co-processor adaptor interface in accordance with the invention; and Figure 6 and 7 show details of the preferred co-processor adaptor interface.
Prior Art Referring to Figure 1, it can be seen that the co-processor 10, in the form of circuit boards, normally interfaces with the Master 128 microcomputer 12 via an internal tube 13 which comprises two internal sockets 14, 16.
Connectors 18, 20 of the co-processor, connected with the custom interface chip 22 of the co-processor, plug directly into these internal sockets 14, 16.
Referring to Figure 2, it can be seen that the second processor 24, in the form of a self powered separate unit, normally interfaces with a microcomputer 26 of the current Acorn range via an external tube 27 which comprises an external socket 28 which connects with the custom interface chip 30 of the second processor through a single connector 32 provided on said second processor.
It has hitherto not been possible to interface a co-processor equivalent to the Turbo, 512 or Scientific co-processors, referenced 10 in Figure 1, with the BBC Model B or Model B+ microcomputer, referenced 26 in Figure 2, because these microcomputers are not equipped with internal sockets for effecting an internal interface. Users of these microcomputers have been restricted in choice to those second processor units which incorporate their own power supply circuits and have been designed specifically to interface externally with the microcomputer at an external socket. On the other hand, in the case of the BBC Master 128 microcomputer, connection of a co-pressor has been possible only via the internal tube.
Description of embodiment of this invention In accordance with the present invention, a co-processor unit 34 is interfaced externally with any one of the current range of Acorn computers 36. The interface is such that a coprocessor equivalent to the Turbo, 512 or Scientific co-processors interfaces with any BBC microcomputer at the external socket or tube 38 thereof. The co-processor could be arranged to draw power from the supply available on board the microcomputer, but in the preferred embodiment illustrated in block diagram form in Figure 3 a regulated power supply 39 providing OV and 5V is incorporated in the adaptor interface, together with a buffer 37 and a power fail detect circuit 35. The power supply 39 in the co-processor adaptor interface avoids possible excess power requirements at the microcomputer.
More particularly, the co-processor is generally of one of the known types above referred to, but is provided at the adaptor interface, in addition to the power supply and the power fail detect circuits, with two I/O ports 40, 42 which connect with the standard custom interface chip 44 of the co-processor 34 via the buffer 37. Said buffer 37 also connects to the controlled power supply 39 via the power failure detect circuit 35. The co-processor unit 34 interfaces with the external tube 45 of the microcomputer through connection of the two I/O ports 40, 42 of the adaptor interface to the external socket 38 of the microcomputer.
For a more complete understanding of practice of the invention, reference is made to Figure 5, which will be clear to those skilled in the art without detailed description. Figures 6 and 7 show details of the buffering and power fail detect circuitry and of the controlled power supply circuitry, respectively.
The buffer provides for buffering of all signal lines. In Figures 4, 5 and 6, the connectors referenced SK1 and SK2 respectively correspond to connectors 40 and 42 of Figure 3 and socket PL12 corresponds to socket 38.
Figure 4 shows in the upper part the adaptor interface connections which connect, via the buffer and the I/O ports, to the male socket of the external tube, the latter being shown in the lower part of the figure.
The co-processor 34 is equipped on its underside with an on/off power switch 50. It would alternatively be possible for such switch to establish a power connection with the microcomputer 36 via two conductors of the ribbon cable 52, as shown in the modified circuit diagram of figure 4, in which the Co-processor adaptor interface omits the power supply, power fail detect and buffer circuitry. Figure 4, therefore, represents the minimum connections required to interface the co-processor with the external tube of the Acorn microcomputer.
In the preferred arrangement, the co-processor complete with power supply and related circuitry is accommodated in a metal housing, which has apertures at the rear for passage of the mains power supply cable and the ribbon cable to the host microcomputer.
Various modifications of the illustrated and abovedescribed embodiments are possible within the scope of the invention hereinbefore defined.

Claims (13)

1. A method of equipping a microcomputer with a co-processor (as hereinbefore defined), said microcomputer being equipped with an external socket for attachment of a second processor (also as hereinbefore defined), according to which the custom interface chip of the co-processor has an adaptor interface including two I/O ports connected thereto, and an interfacing means is enployed to connect the two I/O ports of the co-processor adaptor to the external socket of the microcomputer, whereby in use the co-processor is adapted to operate in conjunction with the microcomputer processor.
2. A method according to claim 1, applied to an Acorn microcomputer of the type known as the BBC Model B, BBC Model B+ or BBC Master 128.
3. A method according to claim 1 or claim 2, applied to a co-processor substantially of the kind known as the Turbo, 512 or Scientific co-processor, respectively incorporating a 65c102, 80816 or 32016 processor in combination with additional memory.
4. A method according to claim 1 or claim 2 or claim 3, according to which the adaptor interface also serves to connect the co-processor with a controlled power supply separate from the microcomputer power supply.
5. A method according to claim 1 or claim 2 or claim 3, according to which the adaptor interface is arranged to connect the co-processor for supply of power through the external socket of the microcomputer.
6. In combination with a co-processor (as hereinbefore defined) modified by the provision of an adaptor interface including two l/O ports connected to its custom interface chip, apparatus for attaching the co-processor to a microcomputer having an external socket for attachment of a second processor (also as hereinbefore defined), said apparatus comprising interfacing means for connecting the two I/O connectors of the co-processor adaptor with the external socket of the microcomputer, whereby in use the co-processor is enabled to operate in conjunction with the microcomputer processor.
7. A combination as claimed in claim 6, wherein the co-processor is a co-processor substantially of the kind known as the Turbo, 512 or Scientific co-processor, respectively incorporating a 65c102, 80816 or 32016 processor in combination with additional memory.
8. A combination as claimed in claim 6 or claim 7, in further combination with a microcomputer of the type known as the BBC Model B, BBC Model B+ or BBC Master 128.
9. A combination according to any of claims 6 to 8, wherein the adaptor interface includes a buffer by which the two 1/0 ports are connected to the custom interface chip, the buffer also connecting to a controlled power supply for the co-processor.
10. A combination according to claim 9, wherein the buffer connects with the controlled power supply via a power fail detect circuit.
11. A combination according to any of claims 6 to 8, wherein the adaptor interface includes circuit means for establishing a power supply connection from the microcomputer to the co-processor via the external socket of the microcomputer.
12. A method of equipping a microcomputer with a co-processor (as hereinbefore defined) substantially as hereinbefore described with reference to Figure 3 or to Figure 4 or to Figures 5 to 7 of the accompanying drawings.
13. A co-processor/adaptor interface combination substantially as hereinbefore described with reference to Figure 3 or to Figure 4 or to Figures 5 to 7 of the accompanying drawings.
GB08708137A 1986-07-25 1987-04-06 Microprocessor-co-processor interface Withdrawn GB2193354A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB868618158A GB8618158D0 (en) 1986-07-25 1986-07-25 Equipping microcomputer with co-processor

Publications (2)

Publication Number Publication Date
GB8708137D0 GB8708137D0 (en) 1987-05-13
GB2193354A true GB2193354A (en) 1988-02-03

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Application Number Title Priority Date Filing Date
GB868618158A Pending GB8618158D0 (en) 1986-07-25 1986-07-25 Equipping microcomputer with co-processor
GB08708137A Withdrawn GB2193354A (en) 1986-07-25 1987-04-06 Microprocessor-co-processor interface

Family Applications Before (1)

Application Number Title Priority Date Filing Date
GB868618158A Pending GB8618158D0 (en) 1986-07-25 1986-07-25 Equipping microcomputer with co-processor

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GB (2) GB8618158D0 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AT395494B (en) * 1988-06-14 1993-01-25 Automations Und Informationssy Integrated circuit arrangement

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
WO 84/03376 *

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AT395494B (en) * 1988-06-14 1993-01-25 Automations Und Informationssy Integrated circuit arrangement

Also Published As

Publication number Publication date
GB8708137D0 (en) 1987-05-13
GB8618158D0 (en) 1986-09-03

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