GB2167254A - Frequency standards - Google Patents

Abstract

A local frequency standard suitable for use in a clock to be synchronised with a reference frequency standard (such as the Rugby MSF transmission) includes a precision local resonator 5 the frequency of which can be adjusted. Periodic determination of the phase deviation between the local and reference frequency standards is performed and the values are accumulated over a period of time. The frequency of the local resonator is then adjusted on the basis of both integrated phase deviation and average phase deviation, with the contribution of at least the former depending upon the reduction of the absolute phase deviation. Microcomputer 3 calculates proportional plus integral terms and simulates switching of filter time- constant by reducing the contribution of the integral term when it has been detected that the phase deviation has been within certain limits for a certain length of time. The proportional term is reduced correspondingly to keep damping constant. Corrections may be logged and then extrapolated when the reference fails, and may also be correlated with temperature or time of day. The loop is preferably third-order. <IMAGE>

Description

SPECIFICATION Frequency standards This invention relates to a method of and apparatus for establishing a frequency standard, suitable for use for example in highly accurate clocks.

An instrument or device that produces a steady and uniform cyclic output in whatever form is said to have a frequency of operation. Most clocks, but particularly very accurate and precise ones, have or use suitable frequency standards. The first clocks based on a frequency standard were introduced about 400 years ago and employed a pendulum as the frequency determining element. In order that the pendulum may serve as a frequency standard, it has to be set in motion and kept in motion. A source of energy is necessary together with means to transfer this energy to the frequency determining element. In mechanical clocks this source of energy is typically the main spring, and the energy is transferred by mechanical means which are controlled by the pendulum itself in order to permit the proper amount of energy transfer at the proper time in synchronism with the movement of the pendulum.In addition to such a frequency standard, a clock requires a read-out mechanism which counts and accumulates the beats of the pendulum, and displays the result. This may be accomplished by a suitable gear-train driving hands which traverse a clock face.

The unit of time nowadays is the second [s]. The second is defined with reference to a frequency determining element. Since 1967 by International agreement this element is the natural caesium atom. One second is defined in the official wording as "the duration of 9192631770 periods of the radiation corresponding to the transition between the two hyperfine levels of the ground state of the caesium-133 atom''. Accordingly, the frequency of the caesium pendulum is 9192631770 events per second. The unit of frequency is define as the Hertz (symbol Hz), one Hertz being the repetitive occurrence of one even per second.

For the precise measurement of time intervals, absolute sychronisation of clocks to a universal time scale is not important. For example, to determine the performance of an athelete running a measured distance it is only necessary to synchronize the clock system to the starter and to read the clock precisely at the finish. However there are other applications in astronomy, communications and navigation where synchronization to a universal time scale is required to an accuracy of one millionth of a second or better. A number of laboratories throughout the world maintain primary frequency standards for their countries, such as the NPL in the United Kingdom, NBS in the USA and PTB in Germany. Time and frequency information from some 1 7 such standards laboratories is collected by the Bureau International de I'Heure (BIH) in Paris.The information is evaluated and the actual time corrections for each contributing clock are determined. By agreement all UTC time scales must agree with the UTC time scale operated by the BIH to within plus or minus one millisecond. In practice synchronisation is achieved to within a few microseconds with the prospect of a reduction to a few nanoseconds becoming available following establishment of the synchronous satellite navigational system known as Global Positioning System (GPS).

A reliable low cost means of access to these standards is available from various LF standard frequency broadcasts in the range 30-300 kHz. Of these the most accurate for precision timing purposes is the navigational aid known as Loran C transmitted on a carrier frequency of 100 kHz. Some of the other broadcasts carry both time and frequency information.

The received carrier signal, although highly accurately controlled at the transmitter, is subject to daily and seasonal fluctuations in frequency due to propagation disturbances of various kinds.

The principal disturbance is the variation in effective height of the ionosphere as the path between receiver and transmitter enters sunrise or sunset. As the path changes from all darkness to all daylight the ionosphere lowers causing an advance in the received carrier phase, until the entire path is in sunlight. At dusk the reverse change occurs, causing a phase retardation.

The magnitude of the change is a function of the path length and the rate of change a function of path direction. These cyclic changes having a period of one day are said to be diurnal. In order to obtain a high quality frequency standard from such a signal source it is necessary to use a local frequency standard which can average these fluctuations.

The local frequency standard is required to carry out two principal functions: 1. It must average the short and medium term fluctuations perceived in the received frequency to reproduce the best mean frequency output; and 2. It must provide a continuous output in the absence of a received signal due to transmitter failure or maintenance, for a period of seconds to days.

In each case the optimum strategy for controlling the local standard depends on the characteristics of the standard itself and those of the propagation path. The choice of which type of local frequency standard to emply is determined by those factors which are important to the user. It generally rests between the use of a high quality oven-based quartz crystal oscillator or Rubidium gas cell frequency standard.

It is known to compare the phase of a local standard frequency source with the phase of a received carrier signal and then to control the frequency of the local standard to maintain a desired phase relationship, within a particular accuracy range. Because the local standard is operating to a higher frequency stability than the received carrier signal over short periods of time, the phase error may be allowed to increase before any substantial correction occurs to the local standard. The magnitude of the error and length of time for which it is permitted to occur are dependent upon the known characteristics of the local standard, and the known characteristics of the propagation path.

For most purposes a high quality quartz crystal oscillator provides all of the necessary characteristics for reconstructing the transmitted frequency standard with a fractional frequency error of a few parts in 1X10'0 over seconds and a few parts in 1X 1014 averaged over days.

A quartz crystal resonator is a mechanical device which must be excited externally to oscillate.

Advantage is taken of its piezoelectric properties, by which the application of an external voltage across the crystal causes the crystal to expand or contract, depending on the polarity of the voltage, and the corresponding inverse effect whereby vibration of the crystal generates a voltage across the crystal. An oscillator may be built by adding an electronic amplifier, feedback and a power supply. Its output frequency is determined by the quartz crystal resonator whose frequency in turn is determined by the physical dimensions of the crystal with the properties of crystalline quartz.

Crystals and crystal oscillators suffer from two significant deleterious effects which must be taken into full account and which serve to limit the usefulness of a crystal oscillator. The first is the temperature dependence of the resonant frequency of the quartz crystal and the second is a slow change of the resonant frequency as time goes on.

The temperature dependence is caused by a slight change in the elastic properties of the crystal with temperature. By careful design of the quartz resonator it is possible to achieve a fractional frequency change of less than one part in 1 X 108 with one degree temperature change.

Nevertheless, it is necessary to enclose the crystal oscillator within an electronically regulated oven to obtain very high stabilities over long periods, to isolate the oscillator from normal environmental temperature fluctuations.

The slow change in resonance frequency with time is known as ageing or drift. It is generally considered to be caused by such factors as contamination of the quartz resonator surfaces, changes in the electrodes or metallic plating, or reformation of loose surface material from the grinding and etching processes. The rate of change of frequency due to ageing is expected to be inversely proportional to time. The change in frequency per day after 30 days is often quoted as the parameter known as ageing for a particular quartz crystal oscillator. It is possible to achieve ageing figures which are in the region of one part in 1X109 to 1 X 1010 per day. By employing variable capacitance diodes (varactors) in the oscillator frequency trimming circuit it is possible to fine trim the oscillator frequency by applying an external control voltage.

To data it has been common practice to employ voltage controlled crystal oscillators within phase locked loops having very long time constants in order to generate local frequencies referenced to standard frequencies obtained from the LF transmissions discussed above. Where a digital control loop has been employed it has been possible to achieve time constants of several hours duration in the response of the control loop to an error signal, and to maintain a control setting of the oscillator frequency indefinitely upon the loss of the reference frequency.

Such systems have however certain disadvantages, especially where relatively long time constants are employed, for such time constants may be inappropriate for some operations-in particular, when a clock is first switched on, or when an external frequency standard has been absent but then is restored, the phase error is likely to be relatively large, leading to the need to apply rapid corrections, but if a long time constant is in use this cannot be done. It is therefore an aim of the present invention to provide a method of controlling a frequency standard, and a controlled standard per se which make use of its own measurements to refine its performance.

Accordingly, one aspect of this invention provides a method of adjusting a local frequency standard including a resonator and means to trim the frequency of resonance thereof in order to remain substantially in synchronism with a reference frequency standard, in which method any phase deviation between the local frequency standard and the reference frequency standard is repeatedly determined and the phase deviations thereby obtained are accumulated, a correction necessary to reduce the phase deviation is periodically applied to the local frequency standard dependent upon both the accumulated phase deviation and the instantaneous phase deviation, and the amount of correction applied as a consequence of the accumulated phase deviation is adjusted dependent upon the rate of change of the absolute phase deviation.

By analogy to standard servosystems, adjusting the amount of correction applied as a consequence of accumulated phase deviation is equivalent to altering the 'time constant' of the local frequency standard control system, as will be explained in greater detail hereinafter. The frequency standard thus automatically determines a 'time constant' suitable for the rate of change of the absolute phase deviation, and this preferably is done by assessing the period over which the absolute phase deviation remains within specified limits. This permits very rapid and precise synchronisation, with excellent performance once synchronisation has been achieved.

The performance can be improved by adjusting the amount of correction applied as a consequence of instantaneous phase deviation depending upon the rate of change of the absolute phase deviation. This permits the control-loop damping to be optimised so yielding the fastest settling time.

In some conventional frequency standards it has been the practice to offer switchable time constants for the loop filtering which are manually selected according to the user's decision. The frequency standard of this invention improves considerably upon such conventional instruments by automatically increasing or reducing the time constant of phase determination, and so of the local frequency standard control-loop response.

The method is most preferably performed digitally using a microprocessor in the local frequency standard to perform the operations of determining the phase deviation and of adjusting automatically the amounts of correction applied in accordance with a pre-determined regime. In this way, the number of samples of phase deviation averaged to determine the absolute phase deviation can be increased as the time constant is increased, so reducing the uncertainty of the absolute phase deviation.

Performance of the local frequency standard can yet further be improved by making use of its own measurements to permit extrapolation of its recent behaviour in the event of transmitter or reference frequency standard failure. This may be done by logging the corrections applied to the local frequency standard which corrections are necessary to maintain the local frequency standard substantially in synchronism with the reference frequency standard, and then during any period in which the reference frequency standard is unavailable for comparison with the local frequency standard, the logged corrections are processed to yield an extrapolated correction which is to be applied to the local frequency standard thereby to maintain the local frequency standard substantially in synchronism with the absent reference frequency standard.

In addition, the processing and extrapolation of the logged corrections may be carried out even when the reference frequency standard is present, and the extrapolated corrections applied to the local frequency standard in addition to the corrections determined necessary as a result of the comparison between the local frequency standard and the reference frequency standard. By combining such corrections in this way, even better performance can be obtained, for example by permitting a reduction in the magnitude of any steady state phase error at a comparator therefor.

Local ambient temperature is expected to have a significant effect on the frequency of the local frequency standard, especially when in the form of a crystal oscillator. Though to some extent this may be compensated by using an ovened crystal, the performance can be improved by monitoring local ambient temperature, and then modifying the corrections applied to the local frequency standard dependent upon that temperature. This is particularly advantageous when the reference frequency standard is absent and the local frequency standard operates in an openlooped mode.

In a case where the reference frequency standard may be subject to cyclic deviations from an absolute frequency standard (for instance in the case of a reference frequency standard presented to the comparator by way of a radio link subject to diurnal phase shifts), the method may be performed by taking into account sidereal time and applying corrections to the local frequency standard dependent thereon. Such corrections may take the form of suppressing excessive corrections which otherwise would have been determined necessary, from the comparison of the reference frequency standard and the local frequency standard.

A second aspect of this invention provides a local frequency standard comprising a resonator, adjustment means to adjust the frequency of resonance thereof, means to determine at predetermined intervals the phase deviation between the local frequency standard and an applied reference frequency standard, means to accumulate the determined phase deviations, and means periodically to generate a correction signal to be applied to the adjustment means, which correction signal is produced by the generation means dependent upon both the accumulated phase deviation and the instantaneous phase deviation but with the amount of correction as a consequence of the accumulated phase deviation depending upon the rate of change of the absolute phase duration.

The local frequency standard may be enhanced by providing it with means to log the applied corrections, and processing means to generate on the basis of the logged applied corrections extrapolated correction signals for the local frequency standard during such times as the reference frequency standard is unavailable for the comparator means.

The adjustment means may be configured to permit corrections to the local frequency standard both as a result of the comparison of the local frequency standard with the reference frequency standard and as a result of the past history of the resonator performance-for instance to allow corrections to be applied to compensate for ageing of the resonator. In addition, the apparatus may include means arranged to record time of day to permit cyclic corrections to be made as a result of known cyclic phase variations in the accuracy of the reference frequency standard or known cyclic variations in the local frequency standard, for instance due to temperature changes affecting the resonator.

Apparatus as just described, or as operating on a method of this invention, will hereinafter be referred to as an "intelligent frequency standard" (IFS).

An IFS may typically utilise as a reference frequency standard a LF broadcast from which the time of day and date may be decoded, if this is available. Alternatively this information may be entered by the user.

The knowledge of time, date, location and LF broadcast source allows corrections to be made to the received frequency for the diurnal changes expected at dawn and dusk. The IFS maintains a history of its corrections to the local standard from which the average ageing rate of the standard may be 'learned'. Compensation for this source of error is then applied during periods of LF broadcast down time resulting from regular or unscheduled maintenance. An IFS may also indicate to the user, in the event of transmission failure, which type of break is occurring.

Thus it can be seen that an IFS will compensate for known imperfections in its own frequency standard and those imparted to the broadcast standard as a result of propagation difficulties or transmitter defficiency.

The method of locking the frequency of a voltage controlled oscillator (VCO) to another frequency source has been extensively treated in the literature since the first description by de Bellescize in 1932 relating to synchronous reception of radio signals. The two frequencies are compared by a phase detector which feeds a loop filter. The output of the loop filter feeds a VCO. A control voltage on the VCO changes the frequency in a direction that reduces the phase difference between the input signal and the VCO. When the loop is "locked" the control voltage is such that the frequency of the VCO is exactly equal to the frequency of the input signal. For each cycle of input to the phase detector there is one, and only one, cycle of oscillator output.

A phaselock loop is a feedback network which is amenable to the same analysis as is applicable to control systems and servomechanisms. According to one commonly used definition, the number of integrations performed upon the phase detector output within a loop describe the order (or type) of the loop. Since phase is the integral of frequency, a first order loop requires no further integration and the phase detector output may be fed directly to the VCO. A difference between the two frequencies will result in a steady state phase error from which the necessary control voltage to drive the VCO to the same frequency as the reference is derived.Adding a further integration within the loop filter will drive the steady state phase error to zero as the integrator steadily increases its output in the appropriate direction to drive the VCO on frequency until the steady state phase error disappears. This forms the much used second-order loop.

It has already been noted that the principal error source in a local crystal oscillator, apart from temperature dependence, is a slow but steady change in frequency due to ageing. As the frequency of a VCO changes due to ageing the second-order loop must still exhibit a steady state phase error which is providing the increasing correction voltage from the integrator just described to counter the ageing effect. This error is known as "acceleration error by comparison with servomechanism operation or "dynamic tracking error". A further integrator is introduced in the loop filter to reduce the steady state phase error to zero in response to ageing and enhance the loop memory in a case of the disappearance of the input signal.A third order loop, unlike first and second order loops, is not unconditionally stable and it is important to ensure that the loop gain remains in all circumstances higher than a certain minimum value, if such a system is used in an IFS of this invention.

By way of illustration only, one specific embodiment of an IFS of this invention will nown be described in detail, reference being made to the accompanying drawings, in which: Figure 1 is a block schematic of the embodiment of IFS of this invention; and Figure 2 is a diagram illustrating a phase lock loop.

Referring initially to Fig. 1, an LF broadcast is received via an active aerial unit and fed to receiver module 1. The example shown in designed to receive a 60 kHz standard frequency broadcast signal such as is available from Rugby MSF, England or WWVB at Boulder, Colorado.

The receiver module 1 comprises an RF amplifier and mixer. The mixer uses as its local oscillator a 50 kHz signal derived by division of the local frequency standard, a precision quartz oscillator 5, producing a 10 kHz intermediate frequency labelled 'IF'. The intermediate frequency is compared in a precision phase detector with a 10 kHz signal also generated from the local quartz oscillator to produce a signal labelled 'phase' corresponding to the phase difference between the intermediate frequency and the locally derived 10 kHz. This signal is filtered to remove frequencies above 1Hz and fed to one of the analogue-to-digital converter input channels in block 4. This allows microcomputer 3 to measure regularly the difference in phase between the local quartz crystal oscillator frequency and the LF broadcast standard. The intermediate frequency is also fed to an amplitude detector in block 2 which may be a full wave diode detector or a synchronous detector receiving a 10 kHz reference derived from quartz oscillator 5.

The output of the amplitude detector is the signal 'HNC' as a logical level representing carrier level above or below a threshold in order to recover the logical and synchronising amplitude modulation impressed upon the 60 kHz carrier. Where the LF broadcast transmitter employs amplitude modulation such as in the 60 kHz example described it is important to discount any phase comparisons made at low or zero carrier amplitude. The modulation pattern is readily predicted by microcomputer 3 when the signals have been decoded, thus allowing the signal labelled 'enable' to be generated. This signal is used to turn on the carrier phase and amplitude detection after the expected establishment of 100% carrier level, and to turn off the detection before the expected reduction in carrier level avoiding unnecessary disturbance of automatic gain control (AGC) and phase measurements.

Block 4 also contains a digital-to-analogue converter which allows the microcomputer to control the frequency of the local quartz oscillator 5 via the line marked 'control'. This is sometimes known as 'electronic frequency control' or EFC. In this case it is limited to an adjustment of plus or minus one part in 1X107 maximum allowing operation with a new oscillator for one year before manual adjustment of a coarse frequency trimmer is required as a result of ageing of the precision quartz crystal. At the end of the first year's operation and coarse readjustment a further 10 years operation without manual intervention should be possible if the quartz resonator follows the classic logarithmic ageing pattern.

The preferred form of phase detector for this application is the sampled voltage ramp. The ramp itself is generated by resetting an integrator with a short pulse from a 10 kHz signal derived from the local quartz oscillator. The integrator is fed with a fixed current input causing it to ramp at a suitable rate within the power supply constraints of the system. The ramp output is sampled by a short pulse generated at the zero crossing point of the IF output, in other words by the reference carrier frequency translated down to 10 kHz by previous mixing with 50 kHz also derived from the local quartz oscillator. The sampled voltage is held on a capacitor the output of which is fed to one of the analogue-to-digital converter channels in order that the microcomputer may read the phase when required.The frequency translation has allowed a narrow bandpass filter to precede the phase detector in the form of the intermediate frequency tuned amplifiers as is normal with a superheterodyne receiver. Although the phase detector is comparing signals at 10 kHz, easing the precision phase detector design, the 100 microseconds range of the detector corresponds with one cycle of the 60 kHz input carrier. In the case of the 60 kHz receiver this has a period of 16.7 microseconds. The system operates as if 60 kHz signals were being compared. If the pulse derived from the carrier by mixing is sampling the ramp at its centre point when the carrier is lost, the maximum tolerable phase shift due to local oscillator error is plus or minus 8.3 microseconds before a cycle may be skipped on reacquisition.In effect, if a particular desired cycle of the transmitted carrier can no longer be identified, when the carrier returns, the system will attempt to lock to the nearest available cycle.

The microcomputer 3 is a microprocessor containing alterable random access memory (RAM) as well as several 8 bit input and output ports and two 16 bit timers on the same chip. It is contained on a printed circuit card which carries additional RAM and fixed memory (EPROM) devices. The EPROM has fixed in it the special purpose set of instructions that are interpreted by the microprocessor and cause it to carry out the desired operation of the IFS. The 8 channel 8 bit analogue-to-digital converter and 12 bit digital-to-analogue converter in block 4 are connected to the microprocessor through its bus. The microprocessor is able to read the status of a number of switches which are mounted on the front panel of the.lFS and accessible to the user for setting up the instrument.It can examine the logical level of the receiver output via the line marked HNC (High no carrier). It also drives a number of indicators via two lines connected to a shift register, and a further three lines connect to an optional 20 character alphanumeric fluorescent indicator panel. A conventional RS 423 port on the microcomputer card is provided for connection of a terminal or printer to log operational information. The IFS may be powered by a DC-DC converter system for simplicity of operation from battery backed supply systems.

On switch-on the microprocessor checks two RAM locations to establish whether a code is present indicating that a 'cold' start is in progress, or whether the locations indicate that the system has already been initialised. If a cold start is called for, the microprocessor sets up the correct initial conditions including a fast time constant for the phase locked loop system, then indicates cold start completion in the two special bytes and commences the program. If the warm start is called for the microprocessor sets up only those parameters which are constant and automatically returns to the program with the phase history and other registers unchanged.

An unrecognised interruption to the microprocessor's program is assumed to have occurred and will be shown by the front panel indicator labelled "Power Interrupt" until cleared by the user.

To force a cold start the instrument must be switched off and then on again.

The receiver demodulated output HNC is regularly sampled by the microprocessor. If the received carrier is below a threshold level HNC is at a logical high level, whereas if the carrier is above the threshold level the receiver output is at a logical low level. A change in state from low to high (LTH) or high to low (HTL) causes a timer to be read and reset. In this way the duration of each reduction of level in the carrier due to the amplitude pulse width modulation is timed. Each logical 1 or 0 detected by this timing process is fed to an 8 bit shift register. At every such data entry the register is examined for the unique synchronising sequence 01111110; when this is found a search for the HTL transition of second 01 is initiated. The transition, if found, causes the microprocessor to set its count of decoded seconds to 01.Over the course of the following minute at each half second the coded ones and zeroes are assembled into appropriate registers to represent the transmitted time, day number, date and status information.

The presence of correctly coded information is used to indicate that the transmitter is being correctly received (TX ON). Any amplitude modulation outside the timing specification causes this indicator to be switched off and phase readings to be rejected (Rejected Carrier turns on) until 5 seconds of correct code have been received. If the faulty reception occurs outside a scheduled maintenance period the Unscheduled Break Indicator is turned on when the TX ON indicator is turned off. The scheduled maintenance period is 10h Om to 1 4h Om on the first Tuesday of each month, for Rugby MSF.

At 900 ms past the second's edge synchronised by the process described above the microprocessor samples the phase detector output by reading the phase channel of the analogue-todigital converter in 4. The phase reading is discarded if Reject Carrier has been detected.

Valid phase readings are held in a buffer called a phase table, containing a number of readings N and normally updated each second. The latest phase reading is added to the table and the earliest table entry is discarded. The readings are averaged on a running basis by adding the latest 8 bit phase reading, and then subtracting the oldest reading referring to the phase (us1) seconds previously. The result is held in a register called SUM. This method avoids the need to sum all the phase table entries each second. The average phase thus obtained is a number which accurately represents the average phase to a greater precision than 8 bits although it has been obtained from an 8 bit analogue-to-digital converter.

At each second the phase reading is normally added to a signed 24 bit number representing the integral of the phase error. The ADC readings of phase range between 0 and 255 with 128 representing zero phase error. Thus 128 is then subtracted from the signed 24 bit number to obtain a representation of the integral of the phase error. For example, if the phase reading was the 8 bit binary representation of 130, this would be added to the integral and be followed by the subtraction of 128, giving a net addition of 2 to the integral.

For the third order control loop, a similar process is applied to integrate the integral described above and save the result in a 32 bit register.

For a second order control loop with phase lead correction the microprocessor makes the following calculation to arrive at the value of the 12 bit number to feed to the digital-to-analogue converter supplying the oscillator fine frequency control.

DAC=2048 + (SUM-2048)/K3 +TL/K2 where SUM is the average phase arrived at on the running basis described above using N=16, and TL is the integral of the phase error also described above. K2 and K3 are constants which determine the loop time constant and damping factor. The digital-to-analogue converter requires an input code of 2048 to generate an output of zero volts which is the design centre point of the oscillator frequency control. A code of 0000 generates +10 volts and 4095 generates - 10 volts causing the maximum fine frequency control of minus 1 X 10 7 and plus 1 X 10 7 respectively. If DAC as computed from the above expression exceeds 4095 or is less than 0000 it is set to these extreme values.Normally this is only likely to happen during the fast locking when K2 and K3 are set to 16 and 1 respectively, producing a time constant of 920 seconds and damping factor of 1.0. If DAC reaches one of the above limits the loop is effectively no longer able to operate in a linear fashion; the value held in TL is 'frozen' to allow the loop to recover quickly from the overload as soon as the maximum correction via DAC takes effect.

A feature of the unit is its ability to switch time constants. This is achieved automatically by the microprocessor which alters the values of K2 and K3 as well as adjusting existing TL values so that the integral contribution to the oscillator control voltage does not execute a step change in value causing a major perturbation to the frequency.

The IFS described above employs digital computation to arrive at a value of DAC for the fine frequency control. The term 'time constant' is employed by analogy with the results of linear analysis of second order phase-locked loops or similar servomechanisms. Although the IFS digital loop is operating on discrete samples representing signal magnitude and applying steps of correction to the VCO frequency, the samples are frequent enough and the steps small enough for the linear analysis to be applicable.

A system representation of the phase locked loop is shown conventionally in Fig. 2, where: Oi(s) = input phase fto(s) = output phase 6f(s) = feedback phase fte(s) = phase errnr=Oi(s)-Of(s) G(s) = forward path transfer function H(s) = feedback path transfer function K = forward path gain The loop variable is phase and linear theory using Laplace notation gives: Oo K.G(s) Oi 1 +K.G(s).H(s) To analysis the IFS further let H(s) 1 and G(s)=Kd.F(s).Kv/s where:: Kd=phase detector gain constant (ADC steps/radian) F(s)=filter transfer function Kv=VCO gain constant, radians/(DAC step-sec) The VCO is characterised by the transfer function Kv/s since phase is the system variable and the VCO frequency (rate of change of phase) is proportional to input voltage.

To minimise the steady-state phase error between input (reference) and output (VCO) use is made of a filter which integrates the error; such an integration causes instability unless a "phase lead" component is added: use is thus made of a filter of the form F(s) 1/k3+ 1/k2.s.

This is equivalent to controlling the VCO frequency from a signal proportional to the phase error between the reference and VCO, added to a signal proportional to the integral of the phase error. Adjusting the constant "k2" allows the contribution of the integral component to be varied, whilst adjusting "k3" allows the contribution of the proportional component to be varied.

The loop error function becomes: Oe 1 oi 1 +K.G(s).H(s) s2+K.s/k3+K/k2 The denominator is known as the Characteristic Equation and by analogy with servo theory: S7+k.s/k3+k/k2 is equivalent to s2+2iwn.s+wn2 Therefore 24.wn=K/k3 and wn =VK/k2 Substituting for wn, i;= # =#K.k2/2.k3 -# 1 The time constant is 2#/wn Substituting for wn, T=2Kk2/K. 0 2 Plotting the response to a step in phase at the input for various values of 4 shows that the fastest elimination of loop error is obtained when =1 with an overshoot of about 15%.Thus in the calculation of DAC there will be an optimum value of K3 which divides the proportional part of the correction to control the damping for a given value of K2 which divides the integral part of the correction to control the time constant or natural frequency of the loop. To double the time constant, k2 is increased by a factor of 4 (equation 0 2). Usually, the same optimum damping is retained and therefore to keep constant we increase k3 by a factor of 2 (equation 01). K3 is maintained proportional to the square root of K2 whenever the time constant is changed.

For fast acquisition of phase lock a low value of T is employed by setting a low value of K2 and using the corresponding value of K3 for 4= 1. After successful phase lock and whilst oscillator performance improves T is increased to reduce short term disturbance to the VCO frequency. The moment at which T is increased is determined by counting the period of time for which the loop phase error has been within certain close limits. A counter PHLC is incremented by one count at each second's sample if the average phase is within the limits, or decremented by one count, but not to less than zero, if the phase is not within the close limits. PHLC is compared with the target value for the time constant and type of VCO in use. When the target value is reached K2 and K3 are increased to K2(new) and K3(new) respectively, and PHLC is reset to zero.

- It will be noted from the expression for the calculation of DAC that if SUM=2048 then the contribution from the proportional part of the correction is zero. When the change of K2 to K2 (new) is made, the value held in the integral TL is adjusted to keep the value of DAC constant upon its calculation with K2(new). The value held in TL is therefore multiplied by K2(new)/K2 (old) and stored in TL prior to the division by K2(new) for the calculation of DAC.

In this manner the IFS automatically increases the time constant of the control loop as the oscillator performance improves, with no discontinuity in the value of DAC controlling the VCO frequency. If, on the other hand, a higher than permissable phase error builds up, the time constant is reduced in a similar manner. In this case the contribution from the proportional control part of the correction must also be accounted for and the value in TL is further adjusted to ensure a constant value of DAC after the reduction in K2 and K3.

At higher values of K2 the number of samples held in the phase table are increased to increase the smoothing of the proportional part of the correction. For example, with 32 readings held in the phase table the value of SUM for zero phase error becomes 4096 and the calculation of DAC becomes DAC=2048+(SUM-4096)/K3+TL/K2.

When an increase or reduction in phase table size is made it is necessary to initialize the new table with values which will yield the same average phase. The average phase is therefore computed from SUM prior to the change and loaded into all locations of the phase table.

As previously described, a third order loop is desirable in order to remove the phase error due to ageing, when this is significant, and enhance the open loop control of the oscillator when the off air reference is considered unreliable by the Reject Carrier detection process. The calculation for setting the digital-to-analogue converter becomes: DAC=2048+(SUM-2048)/K3+TL1 /K2+TL2/K4 The maximum ageing with a new quartz crystal oscillator is of the order of 1 X 10 8 parts in frequency per day. After 30 days the ageing becomes 1 X 10 9 parts per day and after one year 1 X 10 '0 parts per day. The DAC output drives the oscillator frequency until there is zero phase error between frequency translated received carrier and the divided oscillator output.The DAC setting is ultimately derived from the two integral values, with TL2 accumulating the integral of TL1 at the rate necessary to track the rate of change of local oscillator frequency. In the event of loss of signal TL1 is no longer up-dated but TL2 continues to ramp the DAC output at the last known ageing rate. The least significant bit of the 12 bit number fed to the DAC represents a fine frequency control step of approximately 5X 10 " thus after 30 days operation the DAC is being stepped at the rate of about 20 steps per day or roughly one step per hour. If the tiny phase error necessary to produce this correction rate from the integrator TL is acceptable, the extrapolated control can be operated slightly differently and only enabled upon the loss of received carrier.

The technique used in this case is to save in RAM the 12 bit values calculated from the first formula given above. A running average is performed in a similar manner to that employed for the phase average determination. In this case the values of DAC are held in a buffer called the Control Store and normally updated at the rate of once per hour. The Control Store has twentyfive 12 bit entries allowing the latest control reading on acquisition to be added to a 3 byte number known as the Control Sum [CS], and the earliest control reading to be subtracted from the control sum when the hourly update of the control store is carried out. The Control Sum calculated in this way is a number which can vary in the range of O to 98,280 and may be represented by a 1 7 bit binary number. The Control Sum is itself stored in a further bank of RAM registers such that at any hour the change in the value of the Control sum may be calculated.

If a break in transmission occurs the difference between the latest value of control sum CS25 and the earliest value CS1, representing the control sum 24 hours previously, is calculated. The result is the average change in DAC value currently necessary in a 24 hour period to track the local oscillator's drift as a result of ageing and temperature cycling.

The period P between a step of one least significant bit of the number representing DAC is calculated from the expression P = 86400/(CS 1 -CS25).

At the loss of transmission a seconds counter, maintained for this purpose, is cleared and incremented by one count at each following second until the target sum P is reached, whereupon it is cleared and one count is added to or subtracted from DAC according to the sign of CS1-CS25.

In a further refinement of the instrument the analogue-to-digital converter has connected to it a temperature sensor, readings from which are averaged and stored. During commissioning the effect of temperature changes applied to the entire instrument, including the local oscillator, are recorded by switching to a fast control time constant during the test and logging in memory the fine frequency control settings.

The number of degrees change before one least significant bit correction is required to be added or subtracted from DAC is computed and retained in permanent memory as a constant for the instrument. During normal running this additional temperature correction is applied.

Claims (17)

1. A method of adjusting a local frequency standard including a resonator and means to trim the frequency of resonance thereof in order to remain substantially in synchronism with a reference frequency standard, in which method any phase deviation between the local frequency standard and the reference frequency standard is repeatedly determined and the phase deviations thereby obtained are accumulated, a correction necessary to reduce the phase deviation is periodically applied to the local frequency standard dependent upon both the accumulated phase deviation and the instantaneous phase deviation, and the amount of correction applied as a consequence of the accumulated phase deviation is adjusted dependent upon the rate of change of the absolute phase deviation.

2. A method according to claim 1, in which the amount of correction applied as a consequence of the instantaneous phase deviation also is adjusted dependent upon the rate of change of the absolute phase deviation.

3. A method according to claim 1 or claim 2, in which the rate of change of the absolute phase deviation is determined from an assessment of the period over which the absolute phase deviation has been between certain specified limits.

4. A method according to any one of the preceding claims, in which the microprocessor is used in the local frequency standard to perform the operations of determining the phase deviation and of adjusting automatically the amounts of correction applied in accordance with a predetermined regime.

5. A method according to any of the preceding claims, in which the corrections applied to the local frequency standard are modified dependent upon local ambient temperature.

6. A method according to any of the preceding claims, in which the corrections necessary to maintain the local frequency standard substantially in synchronism with the reference frequency standard are logged, and then during any period in which the reference frequency standard is unavailable for comparison with the local frequency standard, the logged corrections are processed to yield an extrapolated correction which is to be applied to the local frequency standard thereby to maintain the local frequency standard substantially in synchronism with the absent reference frequency standard.

7. A method according to claim 6, in which the processing and extrapolation of the logged corrections is carried out even when the reference frequency standard is present, and the extrapolated corrections are applied to the local frequency standard in addition to the corrections determined necessary as a result of the comparison between the local frequency standard and the reference frequency standard.

8. A method according to claim 6 or claim 7, in which account is taken of sidereal time and corrections are applied to the local frequency standard dependent thereon.

9. A method according to claim 8, in which said corrections take the form of suppressing excessive corrections which otherwise would have been determined necessary, from the comparison of the reference frequency standard and the local frequency standard.

10. A local frequency standard comprising a resonator, adjustment means to adjust the frequency of resonance thereof, means to determine at pre-determined intervals the phase deviation between the local frequency standard and an applied reference frequency standard, means to accumulate the determined phase deviations, and means periodically to generate a correction signal to be applied to the adjustment means, which correction signal is produced by the generation means dependent upon both the accumulated phase deviation and the instantaneous phase deviaton but with the amount of correction as a consequence of the accumulated phase deviation depending upon the rate of change of the absolute phase duration.

11. A local frequency standard according to claim 10, wherein means are provided to check the phase error at each determination to see whether it falls within some preset range and, if it does, then the proportion of the accumulated phase deviation taken into account when generat ing the correction signal is reduced.

12. A local frequency standard according to claim 10 or claim 11, wherein there are provided means to log the applied corrections and processing means to generate on the basis of the logged applied corrections extrapolated correction signals for the local frequency standard during such times as the reference frequency standard is unavailable for the phase determining means.

13. A local frequency standard according to any of claims 10 to 12, wherein the adjustment means permits corrections to the local frequency standard both as a result of the comparison of the local frequency standard with the reference frequency standard and as a result of the past history of the resonator performance.

14. A local frequency standard according to any of claims 10 to 13, wherein there is means to record local ambient temperature to permit corrections to be made as a consequence of variations in that temperature.

15. A local frequency standard according to any of claims 10 to 14, wherein there is means arranged to record time of day to permit cyclic corrections to be made as a result of known cyclic phase variations in the accuracy of the reference frequency standard or known cyclic variations in the local frequency standard.

16. A method of adjusting a local frequency standard substantially as hereinbefore described, with reference to the accompanying drawings.

17. A local frequency standard substantially as hereinbefore described, with reference to and as illustrated in the accompanying drawings.