GB2131581B - Dual processor arrangement - Google Patents
Dual processor arrangementInfo
- Publication number
- GB2131581B GB2131581B GB08329805A GB8329805A GB2131581B GB 2131581 B GB2131581 B GB 2131581B GB 08329805 A GB08329805 A GB 08329805A GB 8329805 A GB8329805 A GB 8329805A GB 2131581 B GB2131581 B GB 2131581B
- Authority
- GB
- United Kingdom
- Prior art keywords
- processor arrangement
- dual processor
- dual
- arrangement
- processor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4004—Coupling between buses
- G06F13/4027—Coupling between buses using bus bridges
- G06F13/405—Coupling between buses using bus bridges where the bridge performs a synchronising function
- G06F13/4054—Coupling between buses using bus bridges where the bridge performs a synchronising function where the function is bus cycle extension, e.g. to meet the timing requirements of the target bus
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Multi Processors (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB08329805A GB2131581B (en) | 1982-11-20 | 1983-11-08 | Dual processor arrangement |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB8233182 | 1982-11-20 | ||
GB08329805A GB2131581B (en) | 1982-11-20 | 1983-11-08 | Dual processor arrangement |
Publications (3)
Publication Number | Publication Date |
---|---|
GB8329805D0 GB8329805D0 (en) | 1983-12-14 |
GB2131581A GB2131581A (en) | 1984-06-20 |
GB2131581B true GB2131581B (en) | 1986-11-19 |
Family
ID=26284459
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB08329805A Expired GB2131581B (en) | 1982-11-20 | 1983-11-08 | Dual processor arrangement |
Country Status (1)
Country | Link |
---|---|
GB (1) | GB2131581B (en) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE3537115A1 (en) * | 1985-10-18 | 1987-05-27 | Standard Elektrik Lorenz Ag | METHOD FOR OPERATING A DEVICE WITH TWO INDEPENDENT COMMAND INPUTS AND DEVICE WORKING ACCORDING TO THIS METHOD |
US5377331A (en) * | 1992-03-26 | 1994-12-27 | International Business Machines Corporation | Converting a central arbiter to a slave arbiter for interconnected systems |
US5991900A (en) * | 1998-06-15 | 1999-11-23 | Sun Microsystems, Inc. | Bus controller |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3348210A (en) * | 1964-12-07 | 1967-10-17 | Bell Telephone Labor Inc | Digital computer employing plural processors |
US3374465A (en) * | 1965-03-19 | 1968-03-19 | Hughes Aircraft Co | Multiprocessor system having floating executive control |
US4320502A (en) * | 1978-02-22 | 1982-03-16 | International Business Machines Corp. | Distributed priority resolution system |
IT1126474B (en) * | 1979-12-03 | 1986-05-21 | Honeywell Inf Systems | APPARATUS FOR ACCESS TO COMMON MEMORY RESOURCES BY MULTIPLE PROCESSORS INTERCONNECTED VIA A COMMON BUS |
US4384323A (en) * | 1980-02-25 | 1983-05-17 | Bell Telephone Laboratories, Incorporated | Store group bus allocation system |
JPS56121126A (en) * | 1980-02-26 | 1981-09-22 | Toshiba Corp | Priority level assigning circuit |
-
1983
- 1983-11-08 GB GB08329805A patent/GB2131581B/en not_active Expired
Also Published As
Publication number | Publication date |
---|---|
GB2131581A (en) | 1984-06-20 |
GB8329805D0 (en) | 1983-12-14 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PCNP | Patent ceased through non-payment of renewal fee |