GB2129217A - Photolithography - Google Patents

Photolithography Download PDF

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Publication number
GB2129217A
GB2129217A GB8328605A GB8328605A GB2129217A GB 2129217 A GB2129217 A GB 2129217A GB 8328605 A GB8328605 A GB 8328605A GB 8328605 A GB8328605 A GB 8328605A GB 2129217 A GB2129217 A GB 2129217A
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Application
Patent type
Prior art keywords
polysilicon
layer
aluminium
reflections
reflectance
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
GB8328605A
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GB8328605D0 (en )
Inventor
Kye Hwan Oh
David Stanley Yaney
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Western Electric Co Inc
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Western Electric Co Inc
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Filing date
Publication date

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Classifications

    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0273Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
    • H01L21/0274Photolithographic processes
    • H01L21/0276Photolithographic processes using an anti-reflective coating
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/004Photosensitive materials
    • G03F7/09Photosensitive materials characterised by structural details, e.g. supports, auxiliary layers
    • G03F7/091Photosensitive materials characterised by structural details, e.g. supports, auxiliary layers characterised by antireflection means or light filtering or absorbing means, e.g. anti-halation, contrast enhancement
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B63SHIPS OR OTHER WATERBORNE VESSELS; RELATED EQUIPMENT
    • B63BSHIPS OR OTHER WATERBORNE VESSELS; EQUIPMENT FOR SHIPPING
    • B63B2211/00Applications
    • B63B2211/02Oceanography

Abstract

Photoresist patterning of fine lines and spaces by optical lithography at the metal level is impaired by the existence of standing waves in the photoresist, which are caused by reflections from the metal surface. These reflections can be reduced by interposing a sputtered polysilicon antireflection coating between the metal surface and the photoresist layer to provide optical matching. Optimum thicknesses are determined for the polysilicon layer to achieve minimum reflections. Demonstrations show that polysilicon or aluminium reduces reflectance, gives better line width control and has better gold wire bondability as compared to bare aluminium. <IMAGE>

Description

SPECIFICATION Method of making integrated circuit This invention relates to methods of making integrated circuits in which a layer, especially an aluminium layer, is selectively etched.

In the fabrication of VLSI circuits, the patterning of fine lines and spaces on metal surfaces by optical lithography is marred by the existence of standing waves in the photoresist. The standing waves are caused by strong reflections from the metal surface. Furthermore, if the metal surface is very smooth and highly conducting, the light intensity adjacent to the surface of the metal will be zero. Thus, a very thin layer of photoresist close to the surface does not develop even under prolonged exposures. The standing wave effects in optical lithography have been examined by J.D. Cuthbert, "Solid State Technology", Vol. 20, No. 8 (1977) 59; H.A.M. van den Berg and J.B van Staden, "J. Appl. Phys.," Vol.

50,No.3 (1979)1212; HAM. van den Berg and V. Zieren, "J. Opt. Soc. Am., "Vol. 70, No. 1 (1980) 110; Hugo A.M. van den Berg and Peter M. van der Berg, "IEEE Trans. on Electron Devices", Vol.

ED-28,No. 12(1981)1535.

In the invention as claimed a polysilicon layer is used as an antireflection coating. Such a layer is compatible with integrated circuit technology and can in a suitable case be left in place. We find that this is the case when the layer to be patterned is an aluminium metallization layer and that the bonding strength for gold wire bonding is better than for bare aluminium.

In the drawings: FIG. 1 and FIG. 2 are schematic representations of the interface involved in the calculations below.

FIG. 3 is a polar (Argand) diagram showing the relationships of various complex quantities appearing in the calculations below. FIGS. 4 and 5 are reflectance spectra showing the effect of coating aluminium with polysilicon. FIG. 6 is a plot of line width distribution of a set of samples processed with and without a polysilicon coating. FIG. 7 and 8 are plots of pull test and shear strength for samples in which gold wire bonds were made to aluminium coated with polysilicon.

When light travels from ofe medium to another, both media being infinite in extent and the incidence being normal to the surface, the reflection coefficient,# Fo at the interface is given by: E0 n0-n1 r0=- - (1) E+0 n0+n1 where E, = The amplitude of the electric field intensity of the reflected wave.

E+O=The amplitude of the electric field intensity of the incident wave.

O, , = The complex refractive indices of the two media.

and the geometry is as shown in FIG. 1.

The cross-section of the structure when a thin layer of polysilicon is used as an antireflection coating on the aluminium surface is shown in FIG. 2. The effective reflection coefficient of this structure is given by E, rO + r, exp (~2yid) (2) r= #### E+o 1 + rio exp exp(-2yd) wheres is given by Eq. (1), and , -n2 r,= (3) n1 + n2 y is the complex propagation constant in polysilicon and is given by 2,tri y =~(n,~ik,) (4) A A is the free space wavelength of light.

In deriving Eq.(2), it is assumed that media I and Ill are infinitely thick.

To minimize reflectance in the medium I, one should choose d, the thickness of the polysilicon layer, such that the magnitude of i is minimum. The method of calculation is illustrated by an example given below.

In the following calculations the objective is to determine the value of d so that the reflectance is minimum in medium I (air) at A = 31 30A, and also determine the reflectance for this optimum value of d.

Optical constants for the three media are: Air Ro= 1 1 Polysilicon (evaporated) M1=2.9-i3.05 Aluminium ri2=0.27-i3.49 using these values in Eqs.(1) and (3), we find, using the notation modulus < argument for complex quantities, Fo = 0.726 < 160 160 0.726 &alpha; 1600 (5) and and r1=O.367 < 73.64 (6) These two complex quantities are shown on a polar (Argand) diagram in FIG. 3. Referring to Eq.

(2),? is minimum when r0 and r, exp (-2yd) are opposite to each other on the polar diagram. Note that, <img class="EMIRef" id="027184000-00020001" />

where Oi is the angle of r,. If 0o is the angle of rO, then the condition of minima is given by:: 4rn1d ~O1 - Oi = 7r#Oo (8) The optimum value of d is then given by A dopt = (#-Oo+O1) (9) 4#n1, Substituting the vales of 0o, 01, A and n, dopt =140A (10) substituting the calculated values of d, r0 and r, in Eq. (2), we obtain 0.726 < 160 + 0.0613 < - 20 r= = 0.688 (11) 1 + .0444 < 1400 and reflectance R is given by R =Ir12 = 0.47 (12) The value of reflectance for bare aluminium is about 0.92. Thus, use of polysilicon has reduced the reflectance by a factor of 0.92 ; 1.95 at 3130 . 1.95at3130A.

0.47 It may be noted that the value of reflectance obtained is nearly equal to the reflectance from an infinitely thick slab of polysilicon. This is because for wavelengths less than 4000A, silicon is highly absorbing, so that the reflection from the silicon-aluminium interface is heavily attenuated and does not make significant contribution to the overall reflectance of the structure.

In practice, the calcuation of optimum thickness and reflectance is made difficult by two factors: (1) The optical constants of deposited films are not well known.

(2) The as deposited aluminium and silicon surfaces are rough-grained and cause appreciable random scattering of light in the wavelength region of interest (3000 to 5000A).

It is to circumvent these difficulties that the following experimental work was undertaken to determine the above quantities directly.

An aluminium layer of 1 m thickness is deposited on 100 mm silicon wafers by E-beam evaporation. The predeposition system pressure was 2 x 10-6 Torr.

Polysilicon was deposited by sputtering in argon at a pressure of 4 x 10-3 Torr in a Varian 3120 system employing two S-guns. The system was pumped down to 8 x 10-7 Torr before the deposition cycle. The deposition cycle was 81.SA/min.

The polysilicon thicknesses studied are 40A, 82A, 11 oA, 1 65A, 275A, 550A, 770A, and 1100A.

The reflectance measurements were carried out on Perkin-Elmer spectrophotometer, model 559A, which scans a wavelength range of 1 900A to 9000A. The observed reflectance spectra are shown in FIGS. 4 and 5. It may be seen that a distinct minimum is observed for each polysilicon thickness samples except for the one of 40A. For such a small thickness, it is doubfful that the medium can be treated as homogeneous and isotropic. Furthermore, the native oxide layer that is formed over the surface cannot be ignored.

From the results presented in the FIGS. 4 and 5, the following conclusions can be drawn.

1. For wavelenghts greater than 31 30A, reflectance can be reduced almost to zero using polysilicon as an antireflectance coating.

2. For wavelengths less than 31 30A and polysilicon thicknesses greater than or equal to 300A, the reflections from the silicon-aluminium interface can be ignored. The overall reflectance of the structure can then be treated as if the polysilicon layer is infinitely thick for which the reflectance has a nominal value of 0.3. This gives a reduction in reflectance by a factor of 2.7 as compared to bare aluminium surface. Accordingly from practical considerations a polysilicon layer thickness in the range of 300A to 1 oooA would normally be used.

The line width distributions are shown in FIG. 6. The mean and standard deviation of the three sets of data are presented in Table 1.

TABLE 1 LINE WIDTH DATA Standard Number of Mean Standard Deviation Patterns on Data (Microns) Deviation % of Mean Polysilicon 40 2.9 0.116 4.0 Aluminium (Mask 1) 25 2.1 0.199 9.4 The results in Table 1 clearly indicates that better line width control is obtained on polysilicon than on aluminium. This may be explained by the fact that the size of developed positive resist images of polysilicon samples is slightly larger than those on the mask, which is considered as a criterion for optimum lithography. The polysilicon wafers were exposed for longer duration. While the lines on the polysilicon surface are wider than on the bare aluminium surface no bridging has been observed. We attribute this to the reduced reflectance and scattering of light from the polysilicon surface as compared to the bare aluminium surface.

The bonding of integrated circuit chips is made with 1 mil (0.025 mm) diameter gold wires. The wires are thermosonically ball bonded to the chip pads. The nominal diameter of the balls is 4 mil (0.1 mm), and the chip pads are 5 mil x 5 mil (0.13 mm x 0.13 mm) square. During bonding, the substrates are heated to 1 500 C.

The bonding strength was measured by pull and shear tests. In all, three categories of chips, listed below, were subjected to these tests. There were a total of nineteen pads per chip.

The chip categories subjected to pull and shear tests are 1. Bare aluminium - two chips 2. Polysilicon -- 500A thick on aluminium - three chips 3. Polysilicon -- 1000A thick on aluminium - two chips The results of pull tests are presented in FIG. 7 and in Table 2. The mode of failure in each case was breakage of the wire and not the breakage of the gold-polysilicon or gold-aluminium bond. The breakage strenglth in each case is far above the specified strength of 3 grams for such devices.

TABLE 2 PULL TEST DATA Mean Standard Number Breaking Deviation Polysilicon Thickness of Strength Standard as on Aluminium Pads Tested (grams) Deviation of Mean OA 38 8.28 1.12 13.5 sooA 57 8.32 1.19 14.3 1000A 38 8.47 1.23 14.5 The shear test data is presented in FIG. 8 and Table 3.

TABLE 3 SHEAR TEST DATA Mean Standard Breaking Deviation Polysilicon Thickness Number of Strength Standard as % on Aluminium Pads Tested (grams) Deviation of Mean OÄ 38 48.5 3.5 7.2 sooA 38 60.2 3.8 6.3 1000 38 61.5 4.0 6.4 The data presented shows that the gold-polysilicon bond is stronger than the gold-aluminium bond. The specified strength for shear test for such packages is 30 grams. The gold to polysilicon bond strength, as seen from the data, is twice this value.

It may be concluded that from the bonding point of view, the gold-polysilicon bond is entirely satisfactory.

It has been shown that the use of polysilicon as an antireflection coating on aluminium is quite effective in reducing reflections and scattering of light in the 3000A to soooA range. Better line width control is obtained using polysilicon on aluminium on bare aluminium. Gold wire bonding to polysilicon is found to be entirely satisfactory.

Claims (5)

1. A method for making an integrated circuit including forming a first layer to be patterned forming a thin antireflection layer of polysilicon on the first layer, covering the polysilicon layer with a photoresist coating, selectively exposing the photoresist coating to light, developing the photoresist coating, and using the developed photoresist coating as a mask for selectively etching the layer of polysilicon and the first layer.
2. A method as claimed in claim 1 wherein the first layer is of aluminium.
3. A method as claimed in claim 1 or claim 2 wherein the layer of polysilicon is substantially coextensive with the first layer and is selectively etched with the first layer.
4. A method as claimed in any of the preceeding claims wherein the thin layer of polysilicon has a thickness in the range 300 to 1000 Angstrom units.
5. A method as claimed in any of the preceding claims wherein a plurality of wires are bonded to the selectively etched polysilicon layer.
GB8328605A 1982-11-01 1983-10-26 Integrated circuit Withdrawn GB8328605D0 (en)

Priority Applications (1)

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GB2129217A true true GB2129217A (en) 1984-05-10

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Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2170649A (en) * 1985-01-18 1986-08-06 Intel Corp Sputtered silicon as an anti-reflective coating for metal layer lithography
DE4138999A1 (en) * 1990-11-27 1992-06-04 Toshiba Kawasaki Kk Semiconductor component mfg. - depositing carbon layer on light reflecting layer and forming photosensitive resin layer on carbon layer
US5445710A (en) * 1991-01-22 1995-08-29 Kabushiki Kaisha Toshiba Method of manufacturing semiconductor device
US5707487A (en) * 1991-01-22 1998-01-13 Kabushiki Kaisha Toshiba Method of manufacturing semiconductor device
US5926739A (en) * 1995-12-04 1999-07-20 Micron Technology, Inc. Semiconductor processing method of promoting photoresist adhesion to an outer substrate layer predominately comprising silicon nitride
US5985771A (en) * 1998-04-07 1999-11-16 Micron Technology, Inc. Semiconductor wafer assemblies comprising silicon nitride, methods of forming silicon nitride, and methods of reducing stress on semiconductive wafers
EP0966026A2 (en) * 1998-06-18 1999-12-22 Ngk Insulators, Ltd. A method for reducing particles from an electrostatic chuck and an equipment for manufacturing a semiconductor
US6300671B1 (en) 1998-04-07 2001-10-09 Micron Technology, Inc. Semiconductor wafer assemblies comprising photoresist over silicon nitride materials
US6316372B1 (en) 1998-04-07 2001-11-13 Micron Technology, Inc. Methods of forming a layer of silicon nitride in a semiconductor fabrication process
US6323139B1 (en) * 1995-12-04 2001-11-27 Micron Technology, Inc. Semiconductor processing methods of forming photoresist over silicon nitride materials
US6635530B2 (en) 1998-04-07 2003-10-21 Micron Technology, Inc. Methods of forming gated semiconductor assemblies

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1439209A (en) * 1972-11-29 1976-06-16 Ibm Integrated circuit devices
GB2046463A (en) * 1979-03-23 1980-11-12 Siemens Ag Process for the production of structured positive photo-lacquer layers on a substrate

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1439209A (en) * 1972-11-29 1976-06-16 Ibm Integrated circuit devices
GB2046463A (en) * 1979-03-23 1980-11-12 Siemens Ag Process for the production of structured positive photo-lacquer layers on a substrate

Cited By (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2170649A (en) * 1985-01-18 1986-08-06 Intel Corp Sputtered silicon as an anti-reflective coating for metal layer lithography
DE4138999A1 (en) * 1990-11-27 1992-06-04 Toshiba Kawasaki Kk Semiconductor component mfg. - depositing carbon layer on light reflecting layer and forming photosensitive resin layer on carbon layer
US5437961A (en) * 1990-11-27 1995-08-01 Kabushiki Kaisha Toshiba Method of manufacturing semiconductor device
DE4138999C2 (en) * 1990-11-27 2000-06-21 Toshiba Kawasaki Kk An exposure method for the manufacture of a semiconductor device
US5445710A (en) * 1991-01-22 1995-08-29 Kabushiki Kaisha Toshiba Method of manufacturing semiconductor device
US5707487A (en) * 1991-01-22 1998-01-13 Kabushiki Kaisha Toshiba Method of manufacturing semiconductor device
US5926739A (en) * 1995-12-04 1999-07-20 Micron Technology, Inc. Semiconductor processing method of promoting photoresist adhesion to an outer substrate layer predominately comprising silicon nitride
US7057263B2 (en) 1995-12-04 2006-06-06 Micron Technology, Inc. Semiconductor wafer assemblies comprising photoresist over silicon nitride materials
US6693345B2 (en) 1995-12-04 2004-02-17 Micron Technology, Inc. Semiconductor wafer assemblies comprising photoresist over silicon nitride materials
US6451504B2 (en) 1995-12-04 2002-09-17 Micron Technology, Inc. Semiconductor processing method of promoting photoresist adhesion to an outer substrate layer predominately comprising silicon nitride
US6297171B1 (en) 1995-12-04 2001-10-02 Micron Technology Inc. Semiconductor processing method of promoting photoresist adhesion to an outer substrate layer predominately comprising silicon nitride
US6417559B1 (en) 1995-12-04 2002-07-09 Micron Technology, Inc. Semiconductor wafer assemblies comprising photoresist over silicon nitride materials
US6323139B1 (en) * 1995-12-04 2001-11-27 Micron Technology, Inc. Semiconductor processing methods of forming photoresist over silicon nitride materials
US6316372B1 (en) 1998-04-07 2001-11-13 Micron Technology, Inc. Methods of forming a layer of silicon nitride in a semiconductor fabrication process
US6300253B1 (en) 1998-04-07 2001-10-09 Micron Technology, Inc. Semiconductor processing methods of forming photoresist over silicon nitride materials, and semiconductor wafer assemblies comprising photoresist over silicon nitride materials
US6326321B1 (en) 1998-04-07 2001-12-04 Micron Technology, Inc. Methods of forming a layer of silicon nitride in semiconductor fabrication processes
US6300671B1 (en) 1998-04-07 2001-10-09 Micron Technology, Inc. Semiconductor wafer assemblies comprising photoresist over silicon nitride materials
US6429151B1 (en) 1998-04-07 2002-08-06 Micron Technology, Inc. Semiconductor wafer assemblies comprising silicon nitride, methods of forming silicon nitride, and methods of reducing stress on semiconductive wafers
US6093956A (en) * 1998-04-07 2000-07-25 Micron Technology, Inc. Semiconductor wafer assemblies comprising silicon nitride, methods of forming silicon nitride, and methods of reducing stress on semiconductive wafers
US6461985B1 (en) 1998-04-07 2002-10-08 Micron Technology, Inc. Semiconductor wafer assemblies comprising silicon nitride, methods of forming silicon nitride, and methods of reducing stress on semiconductive wafers
US6635530B2 (en) 1998-04-07 2003-10-21 Micron Technology, Inc. Methods of forming gated semiconductor assemblies
US6670288B1 (en) 1998-04-07 2003-12-30 Micron Technology, Inc. Methods of forming a layer of silicon nitride in a semiconductor fabrication process
US6677661B1 (en) 1998-04-07 2004-01-13 Micron Technology, Inc. Semiconductive wafer assemblies
US7141850B2 (en) 1998-04-07 2006-11-28 Micron Technology, Inc. Gated semiconductor assemblies and methods of forming gated semiconductor assemblies
US6756634B2 (en) 1998-04-07 2004-06-29 Micron Technology, Inc. Gated semiconductor assemblies
US5985771A (en) * 1998-04-07 1999-11-16 Micron Technology, Inc. Semiconductor wafer assemblies comprising silicon nitride, methods of forming silicon nitride, and methods of reducing stress on semiconductive wafers
EP0966026A2 (en) * 1998-06-18 1999-12-22 Ngk Insulators, Ltd. A method for reducing particles from an electrostatic chuck and an equipment for manufacturing a semiconductor
EP0966026B1 (en) * 1998-06-18 2009-04-01 Ngk Insulators, Ltd. A method of reducing dust particles on a wafer when processing at elevated temperatures on an electrostatic chuck

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Publication number Publication date Type
KR840006728A (en) 1984-12-01 application
GB8328605D0 (en) 1983-11-30 grant

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