GB2127248A - Reactive load drive and surge protection - Google Patents

Description

1 GB 2 127 248 A 1

SPECIFICATION

Reactive load drive and surge protection Th is invention relates to electrical drive circuits for reactive loads at power su pply voltage a nd to the protection of the drive ci rcuit ag a inst da mage due to surgecurrents.

Reactive loads include the coils of actuators and the windings of motors. Smaller loads, rated ata fewtens of watts, can be energised with low voltage (up to 50v) through semiconductor control circuits without much difficulty. Howeverwhen the voltage rises into the high or mains (network) powersupply range, typically 220-250 volts or more, attens or hundreds of Hertz,the problems of solid state control for reactive loads are much more severe. The margin of overload on the solid state devices is much less and the speed atwhich overheating can occur much greaterthan forthe low voltage case. It is therefore necessaryto provide greater protection against mis-operation, both accidental and deliberate. Specifically an actuator may be part of a vibratory conveyor. When the drive circuit includes semiconductor devices an electrical surge of very short duration can cause damage and ordinary protection, such as fuses orcircuit breakers, is not always effective.

It is an object of the invention to provide an electrical drive circuitfor reactive loads including protection against electrical surges, mis-operation and spurious 95 operation.

According to the invention there is provided an electrical drive circuit arrangementto control the energisation of a reactive load with a high alternating voltage including a control stage to generate an alternating control signal and apply itto an output of the control stage, an electrically isolating control signal transfer means having an input connected to the output of the control stageto transferthe control signal to an output of the transfer means while isolating the outputfrorn the control stage, an output stage including power control semiconductor devices and having a control input connected to the output of thetransfer means, an energisation inputfor a high voltage electrical supply and an outputforthe connection of a reactive load to which in operation the output stage applies said high voltage alternating energisation in dependence on the control signal, the high voltage being prevented from reaching the control stage via the input of the output stage by the isolating transfer means, the control stage further including means to provide circuit condition signals and a noise-resistant guard means responsive to said signals to permit generation of the control signal only when said condition signals have selected values, the 120 transfer means further including means to restrictthe signal to the input to the output stage to the control signal permitted bythe guard means, and the output stage including means to generate a protection signal on the occurrence of a current surge in the high voltage energisation of a connected reactive load, the protection signal being constrained to a potential low enough for direct application to the control stage withoutthe need for isolating transferto protect against high voltage in the control stage and the control stage including means responsive to surge protection signal to act on the control signal and remove any energisation of the load by the output stage to protectthe stage.

The transfer means may be a pulse transformer arranged to transfer a control signal of pulses to drive energisation current control semiconductor elements of the output stage into conduction for a controlled interval at a controlled repetition rate and the control stage means responsiveto the protection signal may include a protection semiconductor deviceto interrupt the supply of a pulsethrough the transformer.

The pulse transformer may be arranged to provide the electrical isolation againstthe high voltage.

The pulse transformer may have a transformer primary input and a transformer secondary output and be arranged to apply a pulse supplied to the input atthe output connected in a semi-conductor device may act by interrupting the primary input.

The guard means may include the protection semiconductor device and a multi-input gate meansto which gate the protection signal is applied as one input.

The protection signal may be a voltage developed across a low-value resistor in series with a connected reactive load by an excessive flow of current.

Typicallythe high voltage is in excess of 300v and the load current is around ten amperes. Thefrequency of load energisation may be 10 Hzto 200 Hz. The protection signal may produce a response rate of 60 A/millisecond to at least 240 A/millisecond to provide very rapid removal of energisation, even during a half cycle of current.

Embodiments of the invention will now be de- scribed with reference to the accompanying drawing which is a circuit diagram of an arrangementto electrically energise a reactive load ata selected frequency in a range of frequencies and embodies the invention.

Referring to the drawing the power supply and output stages will be considered first. The output stage consists of two power transistors, type BUX48 for example, with associated power diodes D4to D7. Terminals OP1, OP2 are provided forthe connection of a load, especially a reactive one as exemplified at LR, in series with the power transistors across a d.c. supply of some 330v rating. The power diodes are connected with polarities appropriateto provide a connection, of reversed polarity, between the load, LR, and the d.c. supply when the transistors are switched off after having energised the load. a conventional bridge rectifier capacitor smoothed power supply energised from the 240v a.c. mains is shown. This power supply need not supply a particularly well-smoothed direct voltage but the regulation should not be too poor and a large capacitor is provided, nominally 560 F.

The power tra nsisto rs, BUX48, are switched on and off together by a pulse arrangement including a pulse transformerT2 and a drive transistortype VN1 OKIVI. When the drivetransistor is turned ON by a suitable drive pulsethe pulse transformer supplied pulse voltages to base circuit of each power transistor to turn them ON forthe duration of the drive pulse and currentflows in a connected load such as LR. When 2 the drive pulse ends the power transistors turn off and the load is connected, in reverse, bythe diodes D4, D7.

Diodes D5 and D6 are provided to suppress any 11 generator" emf which may arise when the load LR is a motorivinding.

The control and excess current protection circuits will now be described. Integrated circuit U2 has four separate Schmitt NAND gates U2A-LI2D. The action of a Schmitt NAND gate requires the inputvoltage value to changefrom outsidethe threshold level to outside another threshold level through a small voltage difference between thethresholds, sayO.5vto 3V in integrated circuitsJorthe output condition to change.

The NAND logiccondition must also be met. Inthe present circuit the inputs of each gate arejoined togethersothe logic condition does not apply. The voltage difference between thethreshold provides a degree of protection against electrical---noise-caus ing spurious operation. Integrated circuit U3 is a J-K flipflop.

Considering gate U2C this is arranged to produce an oscillator by the charge and discharge of an input capacitor th rough a resistive feedback path from outputto input. The resistance of the feedback path is adjustable byvariable resistor RV3. Forthe present uses of the circuitfrequencies in the range 1 0Hzto 2001-1z are likelyto be needed although only part of this range may be needed for any specific use.

The oscillator is arranged to run aftwicethe required frequency. The required frequency is 95 obtained by dividing the oscillatorfrequency with a J-Kflip flop, U3. This also ensures an equal mark/ space ratio in the outputs available at Q and UL TheRY output is used as explained belowfor a safey precaution. The Q output of integrated circuit U3 is differnetiated by a capacitor-resistor networkto pro vide a pulse inputto gate U2D. This pulse, appearing atthe output of gate U2D is of sufficient duration and appropriate polarity (i.e. a logic LOW, tending to -6.2 vdc) to discharge capacitor C6via diode D1 0. Once discharged, and the pulse ended, capacitor C6 can be recharged from the now HIGH output of gate U2D via resistor RV2, which is variable to enable the timetaken for capacitor C6to charge to be chosen and varied.

Capacitor C6 can only charge in thisway if the outputs of integrated circuits Ul, U3 and gate U2B are all logic LOW and thus isolated by diodes D9, Dl 1 and D8 respectively.

While capacitor C6 is charging, subjectto the above constraints, gate U2A provides a logic HIGH outputto the gate of the field effect transistor type VN1 OKM.

This transistor istherefore turned ON atthe end of the discharge pulsefrom gate U2D and remains ON until the output of gate U2A changes to logic LOW. The turning ON of transistor VN 1 OKM produces a pulse via 120 transformer T2 to enable the power transistors to energise the reactive load LR, as described above. The duration of the drive pulse is thus set bythe time taken for capacitor C6to charge, set by variable resistor RV2, and the repetition rate of these pulses is half the frequency of the oscillator of gate 112C, set by variable resistor RV3. Resistors RV2, RV3 are "user" controls.

As so far described the circuitwill energise a connected load with pulses of set length and repeti- tion rate in the range of tensto hundreds of Hertz at a GB 2 127 248 A 2 power level upto a few thousand watts (say3KW).

Howeversuch an arrangementis notenoughto give reliable operation and protection against overloads during service. In particularwhen current isswitched into a reactive load in which current is decaying from a previous energisation the currentflow can be very high in some conditions.

Thecircuit embodying the invention provides two stages of protection againstthis and other excess current condition. Firstlythe powersupply arrangementsforthe pulse generator described above include protection against energisation of the output circuit in the absence of a supply to the pulse generator control circuits. In addition to the 330 vdc supply already mentioned there is a low voltage supply forthe integrated circuits and pulse transformer drive circuit. A conventional bridge rectifier supplied from the 240 vac mains via transformer T1, provides some 17v of full-wave rectified voltage across resistor R2 and capacitor Cl in series. Through diode D2 this unregulated 17v supply is applied to the primary of pulse transformerT2 and to drive transistor VN 1 OKM and also to a series chain of two 6.2 volt zener diodes and a dropper resistorto produce a centre tapped 6.2 vdc regulated supplyfor the integrated circuits Ul, U2 and U3.

The availability of the low voltage supply is monitored by gate U2B.The inputtothis gate isfrom the junction of resistor R2 and capacitorCl mentioned above.The potential atthis point representsthe averagevalue of thefull-wave rectified bridge output and is arranged, by choice of values of R2 and Cl,to be enoughto enablegate L1213to produce a logic LOW outputwhen the 17v supplyis available. When the supplyfails, or is switched off, capacitor Cl discharges rapidlythrough diode D1 and the 22K shunt resistorto disable gate U213 and produce a logic HIGH output. This output is effective, via diode D8 which blocks the logic LOW, to charge capacitor C6 and apply an input to gate 112Ato produce a logic LOW from the output of gate U2A. This terminates the pulse driving the transformerT2 and disables the output so no current can be supplied to the reactive load. In this waythe correct operation of the protection circuit is monitored at switch-on and the output current is rapidly cut off when the protection supply is switched-off orfails.

Afurther safety precaution is provided bythe connection from output Uof integrated circuit U3. The outputs Q and -d are of equal markispace ration and in antiphase. If the circuit associated with gate U2D attempts to enable gate U2Ato beyond the half-cycle reversal of the required frequencythe occurrence of the reversal of the doutput prevents this dangerous situation by disabling gate U2A with a logic HIGH th rough the diode D1 1.

The excess-current protection circuit is now described. In the output circuit a small-value resistance is provided to establish a potential differnece which is a measure of the current in the output circuit. In the illustrated embodimentthis resistance is about 0.1 ohm and is actually two 0.22 ohm resistors, in parallel, in the emitter circuit of the transistor connected to the Ov dc line. A small potential with respectto Ov dc is thus available as a current value signal. This signal is applied to one input(+) of a difference amplifier, 3 GB 2 127 248 A 3 integrated circuit Ul. The other input (-) receives a reference value derived from a resistorchain across the +6.2v supply. A variable resistor RV1 permitsthe pre-setting of the reference value. In operation if the potential difference, representing the actual current flow, exceedsthe reference value the outputof the differnetial amplifier Ull becomes logic HIGH and capacitor C6 is charged through diode D9 and any pulse driveto transformerT2 is cut-off disabling the output circuit as the current reaches a dangerous level.

To summarise,the protection arrangements ensure thatany drive pulse isterminated when the supplyto the protection armagement fails, via gate U213, or when excessive current flows in the output circuit, via 80 differential amplifier Ull, orwhen a drive pulse istoo long.

The detectorshown can operate with a high rate of change of current inthe output circuitvalues of 240Almsec atswitch on and 60Almsecatthe end of a pulse being achievable. Sensitivityto such high rates enablesthe currentflowto beswitched-off quickly enough to prevent damage to the output semiconductors dueto excess currentflow into a reactive load under a wide range of operating conditions and malfunctions, despite the time delay in the loop including Ull, U2A, and the pulse drive and output circuits. Also the sensitivity is affected bythe state of transformerT2, when for example it is saturated, and the hysteresis of the transformer.

To protectthe pulse drive part of the circuitthe primary of transformerT2 is shunted by a diode D3 in series with a 22v zener diode. This ensures that any excessive transients, due e.g. to leakage reactance, are controlled and do not damage the circuit elements. The resistors across the emitter-base junctions of the output circuit transistors assist in maintaining a hig h breakdown voltage for these devices.

The circuit diag ram also shows an arrangement by which the oscillation providing the drive pulses can be synchronised with an external eventsuch asa signal level transition. Input S] leads to capacitor Cl 0 followed by a series resistor R10 which togetherform a differentiator while resistor R1 0 with resistor R 11 form a potential divider, the tapping point of which is connected to the base of transistor Q1. A pulse applied to input SI thus causes a voltage to occur on the emitter of transistor G11 which is just above the maximum voltage needed to operate the Sch mitt trigger gate of integrated circuit U2C and start an oscillator cycle. Suitable component values and types will be apparentfor a particular application.

Use of input S1 permits "closed-loop" operation of the drive circuit. Information aboutthe movement or other parameter of the load LR can be provided, e.g. by a pick-up coil, and applied to input Si. For example if load LR is a drive coil for a vibratory conveyorthe energisation of the coil can be controlled in a closed-loop.

The techniques described can be put into practice in 125 other circuitforms, to achieve protection against current in-rush with reactive loads, and the above is only given byway of a example of an embodiment of the invention.

Claims (11)

1. An electrical drive circuit arrngementto control the energisation of a reactive load with a high alternating voltage including a control stage to generate a control signal stage, an electrically isolat- ing control signal transfer means stageto transferthe control signal to an outputstage, including power control semiconductor devices and responsivetothe control signal, having an energisation inputfora high voltage electrical supply and an outputforthe connection of a reactive load which load in operation is energised independence on the control signal, the high voltage being isolated in the output stage bythe isolating transfer means, the control stage further including means to provide circuit condition signals and a noise- resistant guard means responsive to said signals to permit generation of the control signal only when said condition signals have selected values, the transfer means further including means to restriathe signal to the inputto the output stage to the control signal permitted bythe guard means, and the output stage including means to generate a protection signal on the occurrence of a current surge in the high voltage energisation of a connected reactive load, the protection signal being constrained to a potential low enough for direct application to the control stage withoutthe need for isolating transferto protect against high voltage in the control stage and the control stage including means responsive to surge protection signal to act on the control signal and remove any energisation of the load bythe output stage to protectthe stage.

2. An arrangement according to Claim 1 in which the control stage includes an oscillator to produce pulses of controllable duration and repetition rate and the guard means is responsive to condition signals representing onlythe correctform of the pulsesto permitthe generation of a control signal.

3. An arrangement according to Claim 1 in which the oscillator includes means to produce a condition signal representing the duration of mark and space states, excess duration of one state ensuring that the generation of the control signal is not permitted.

4. An arrangement according to Claim 1 in which the control signal is a train of pulses of adjustable repetition rate and duration to represent required energisation of a connected reactive load.

5. An arrangement according to Claim 1 in which the electrically isolating transfer means is a pulse transformer including a primary winding and a secondary winding for each semiconductor device, in the form of a transistor, in the output stagethe secondary winding being connected in a base circuit of the device to bring about controlled operation of the device by biassing the device into conduction with said pulse.

6. An arrangement according to Claim 5 in which the control stage means responsive to the protection sig nal includes means to interru pt the supply of a pulse of the control signal thereby to remove energisation of the load even during a pulse of the control signal.

7. An arrangement according to Claim 5 in which the pulse transformer provides electrical isolation against the high voltage energisation reaching the controlstage.

4 7. An arrangement according to Claim 5 in which the pulse transformer provides electrical isolation against the high voltage energisation reaching the control stage.

8. An arrangement according to Claim 1 in which the noise-resistant guard means includes semiconductorswitching devices with spaced operating thresholds to resist spurious operation by electrical noise.

9. An arrangement according to Claim 8 in which the devices of the guard means are responsive to condition signals representing conditions including correct supply voltagesforthe circuit and correct form of the control signal to permit generation of the control signal.

10. An arrangement according to Claim 1 in which the surge protection signal is generated in a low-value resistor in a current path through the output of the outputstage.

11. An electrical drive circuit arrangement substantially as herein described with reference to the accompanying drawings.

Printed for Her Majesty's Stationery Office byTheTweeddale Press Ltd., Berwick-upon-Tweed, 1984. Published atthe Patent Office, 25 Southampton Buildings, London WC2A lAY, from which copies may be obtained.

GB 2 127 248 A 4 f J