GB1563426A

GB1563426A - Television deflection circuit

Info

Publication number: GB1563426A
Application number: GB779377A
Authority: GB
Original assignee: Philips Electronic and Associated Industries Ltd
Current assignee: Philips Electronics UK Ltd
Priority date: 1976-02-27
Filing date: 1977-02-24
Publication date: 1980-03-26
Also published as: DE2706273B2; FR2342602A1; NL7602016A; BR7701122A; JPS5635065B2; DE2706273C3; DE2706273A1; JPS52105723A

Description

1(54) TELEVISION DEFLECTION CIRCUIT (71) We, PHILIPS ELECTRONIC AND ASSOCIATED INDUSTRIES LIMITED, of Abacus House, 33 Gutter Lane, London, EC2V 8AH, a British Company, do hereby declare the invention, for which we pray that a patent may be granted to us, and the method by which it is to be performed, to be particularly described in and by the following statement: The invention relates to a circuit in a television picture display device comprising switching means for generating a sawtooth deflection current through a line deflection coil and for converting an input direct voltage into a substantially constant output direct voltage, which switching means includes at least one switch adapted to be switched at line frequency and to conduct during a part of the line period, the duration of conduction being adjustable by means of a pulse duration control stage, said circuit furthermore comprising a comparison stage for comparing in frequency and/or in phase received line synchronization pulses and pulses originating from a line output stage for adiustment of a line oscillator via a lowpass filter, the generated signal of said line oscillator being applied in operation to the pulse duration control stage, In such a circuit in which the conduction time of the switch can be varied, the problem is encountered that the turn-off time of this switch, which will in most cases be a semiconductor element, is influenced by said duration. On variations in the input voltage the output supply voltage can be kept substantially constant because the ratio between the conduction time of the switch and the line period can be adjusted or controlled. If a ripple voltage is superimposed on the input voltage which ripple voltage remains, for example, after rectifying and smoothing the voltage of the electric mains, then said ratio will vary in the rhythm of the ripple voltage.

Because the switch is either the switch of the line deflection circuit or part of a control circuit for the line deflection circuit it follows from the foregoing that also the position of the lines displayed on the screen of the picture display tube will vary in the same rhythm.

The effect outlined above can be corrected to a large extent with prior art means, This is the case if the above-mentioned phase control is rapid enough to offset rapid fluctuations in the phase of the line pulses produced in the receiver. Our Patent Speoification Serial No. 1,370,074, for example, proposes two phase controls wherein one influences the frequency and/or the phase of the line oscillator depending on the line synchronization pulses received whereas the other one eliminates phase variations of the line pulses generated in the receiver at a quicker response than the first-mentioned control. Such phase variations are, for example, caused by variations in the load on the line deflection circuit. However, it has appeared that the phase errors caused by the ripple voltage cannot all be eliminated in this manner. This results in a slight displacement of the lines of the picture screen.

Mostly the frequency of the ripple voltage is equal to the field frequency, namely 50 or 60 Hz or twice the field frequency so that this shift is stationary on the screen. In vertical displayed lines a stationary noseshaped bulge is caused which is only slightly disturbing. In most cases, however, the phase of the field frequency synchronization signal is not locked with that of the mains supply which results in that the distortion slowly moves in a vertical direction across the screen. The effect is still more disturbing if the two frequencies are not equal to one another. In Japan, for example, the field frequency is 60 Hz whereas the mains supply frequency is 50 Hz in some regions, The error outlined above is observed as a 10 Hz oscillation which is very disturbing.

It is an object of the invention to provide means which enable, also in the circumstances described the use of a combined line deflection and switched mode power supply circuit with the known advantages thereof and to this end the circuit according to the invention is characterized in that in order to eliminate shifts of phase of the deflection current as a result of a ripple voltage superimposed on the input voltage, the phase of the signal generated by the oscillator is adapted to be influenced by a ripple voltage source.

The invention will be further explained by way of non-limitative example with reference to the accompanying Figure, which shows a simplified circuit diagram of a circuit in which the invention is utilized.

In the Figure reference 1 represents a phase discriminator of a television receiver to which received line synchronization pulses 2 are fed, which, for example, may be derived from a synchronisation separator (not shown). Line flyback pulses 3 which are produced in the line output stage which is described hereinafter, are also applied to discriminator 1. The frequency and/or phase of both input signals are compared by discriminator 1 and the output voltage obtained is smoothed by a lowpass filter 4. Because such a filter always comprises, as a rule, at least one capacitor the Figure shows a capacitor only. The signal smoothed in this manner is fed to a line oscillator 5 for continuously readjusting the frequency and the phase of the signal produced by the oscillator, which signal is applied to a pulse-duration control stage 6. The output signal of stage 6 controls the base of a driver transsistor 7 which supplies via a driver transformer 8 a control signal to a line output transistor 9.

Transistor 9 serves as a switch in a known combined line deflection and switched-mode power supply circuit, for example the circuit described in our co-pending application 32117/74 (Serial No. 1,475,176). In the Figure reference 10 is the line deflection coil and reference 11 the combined line and power supply transformer. Line flyback pulses occur at windings thereof during the flyback time of the deflection current which flows through coil 10, which pulses supply, after having been reotified, supply voltages for sections of the receiver as well as the extra high tension for the output anode of the picture display tube (not shown). The flyback pulses present on one of these windings, winding 12, are attenuated by means of two resistors 13 and 14 to a suitable amplitude and the pulses obtained in this manner are the pulses 3 which are fed to discriminator 1.

The mains voltage present between two terminals 15 and 16 is rectified and smoothed. The direct voltage Vn obtained is the input voltage of the power supply circuit. A capacitor 17 of a large capacitance is in series with a winding 18 of transformer 11. The direct voltage VO across it is equal to the average value of the trace voltage, Le.

the voltage across a trace capacitor 19 which is connected in series with coil 10, which voltage is applied during the scanning time of the deflection current to coil 10 by means of parallel diode 20 or transistor 9.

Voltage V0 is a measure of the amplitude of the deflection current and of the values of the various output supply voltages which are produced by the circuit. Voltage V0 is fed back to control stage 6 in which it is compared with a reference voltage. This results in a control of the conduction time oftransistor 7 and consequently of transistor 9, such that the voltage V0 is kept substan tially constant in spite of variations of volttage VB and of the various loads on the circuit. As known there is a given relation between voltages V0 and Vn and the ratio 8 of the conduction time of transistor 9 which relation is satisfied by the circuit.

A ripple voltage of the mains frequency or double this frequency if the mains rectifier is of the full wave type, is superimposed on voltage V3 which ripple voltage still remains after smoothing. It may be regarded as a rapid variation of voltage V3. This implies that ratio 8 is subjected to a variation with the same frequency. A further compensation of the influence of the ripple voltage on V0 is obtained by feeding in known manner a part of the ripple voltage to the comparison circuit which is disposed in pulse-duration control stage 6. For feeding this ripple voltage to the comparison circuit a resistor 21 is included between stage 6 and the lead which carries the voltage VB.

Ratio 8 can be influenced in known manner for other purposes than the described stabilization of voltage V0. The circuit of the Figure also comprises a safety circuit (not shown) by means of which ratio 8 is reduced very rapidly if the generated supply voltages and/or the load current thereof.

assume predetermined values and by means of which it is ensured that ratio .8 slowly increases at switch-on. of the television receiver.

A Zener diode 22 is included in the emitter lead of transistor- 7 whereas voltage V3 is the supply voltage of the transistor, In this manner it is ensured that a stabilized voltage is immediately available across diode 22 at switch-on of the receiver which voltage can be used for feeding oscillator 5 and stage 6.

In circuits in which transistor 9 provides the line deflection only its conduction time does not vary, since the transistor can only conduct from the instant at which the deflection current reverses its direction, which instant cannot be influenced by the control of the transistor. The control signal which renders transistor 9 conductive must be available shortly before this instant which is approximately the center instant of the scanning period and if it occurs earlier it has no effect. Because the transistor must be switched off at an instant which is fixed in the period, namely at the end of the scanning period it is obvious that the ratio 8 does not vary and, consequently, is in general not influenced by the ripple voltage of voltage VB.

In the circuit of the Figure, on the contrary, ratio 8 varies with the same frequency as the ripple voltage namely 50 or 100 Hz with a mains frequency of 50 Hz. Because transistor 9 must be suitable for very large powers the time required at switch-off to remove the excess of charge carriers present in the transistor is comparatively long. This time depends on the conduction time of the transistor and consequently varies in the rhythm of the ripple voltage. If, for example, voltage VB increases then ratio 8 decreases, which causes- the switch-off time to also decrease. In this case the end of the scanning period occurs earlier than in the case where voltage V3 decreases and the end of the fly- back period, that is the beginning of the next trace period also occurs earlier. Half a cycle of the ripple voltage later voltage V3 decreases and the end of the scanning period as well as the end of the flyback period occur later again.

The error can be eliminated to a large extent by the action of phase discriminator 1, filter 4 and oscillator 5. After frequency pull-in of oscillator 5 the voltage across the capacitor of filter 4 is a direct voltage on which are alternating voltage having the frequency of the ripple voltage is superimposed. Then a reduction of the turn-off time of transistor 9 as the result of an increase in voltage V3 means a decrease in the phase difference between the input signals 2 and 3 of phase discriminator 1 and, consequently, in the output voltage thereof whilst an increase of the turn-off time of the transistor as a result of a decrease in voltage YB means an increase in this phase difference and, consequently, in the output voltage of the discriminator. The effect of the variation of ratio 8 may be considered as a phase variation having the frequency of the ripple voltage. The alternating voltage opposes this phase variation because the phase of the signal generated by oscillator 5 is adjusted by it. A condition therefor is that the capacitance of the capacitor of filter 4 is not too large, which condition is satisfied in practice.

However, it has appeared that the phase error cannot be completely eliminated which gives rise to the aforementioned disturbing consequences. It has been recognised that this is caused by the fact that oscillator 5 is insufficiently readjusted by the alternating voltage. This alternating voltage must be increased to a suitable value. In the circuit of the Figure this is realized by means of a capacitor 23 which is applied between the lead which carries the voltage V3 and filter 4. Capacitor 23 and the capacitor of filter 4. constitute a voltage divider so that a ripple voltage is superimposed on the alternating voltage already present. With a suitable value thereof the phase error is substantially eliminated. The -phase difference between signals 2 and 3 is now substantially zero so that the output voltage of discriminator 1 would also be substantially zero. Consequently the ripple voltage across the capacitor of filter 4 is determined substantially exclusively. by the said voltage divider. In a practical example in which the capacitor of filter 4 has a capacitance of approximately 22 nF and in which the ripple voltage of voltage VB has a value of approximately 10V, the required value of the ripple voltage across said capacitor being 10 mV, this is approximately 1000 times as small, the capacitance of capacitor 23 mustbe approximately 22 pF, which is also approximately 1000 times as small. In practice it appears that a slightly higher capacitance is required.

Connected in series with capacitor 23 is a resistor 24 of, for example, 4.7 kfl which ensures that any high frequency ripple volttage which is superimposed on voltage -V3, for example owing to the switching action of transistor 9, cannot reach filter 4 and conse- quently cannot affect the synchronization.

Because the ripple voltage of voltage VB is sawtooth-shaped the control voltage of oscillator 5 would also be sawtooth-shaped without the above measure. By using the frequency-independent voltage divider 23, 4 it is ensured that the compensating voltage which occurs instead of the control voltage does not only have the correct frequency but also the correct shape and phase. However, it will be obvious that another ripple voltage source may also be suitable, provided this ripple voltage has approximately the correct shape and phase. In practice this was proved by, for example, using the ripple voltage of the remote control power supply for the tuner which has the advantage that capacitor 23 is subjected to a lower voltage.

In the preceding the control voltage of the line oscillator is increased. However, the invention need not be limited thereto.

Circuits comprising a phase-shifting network are known, which network is disposed in the path of either signal 2 or signal 3. The phase shift can then be influenced by the ripple voltage. If the impedance of the network is predominantly capacitive then the compensation may also be introduced by means of a capacitor.

The combined line deflection and switched-mode power supply circuit which was taken as an example hereinbefore is a known circuit having one single switch, namely transistor 9 and one single transformer, namely transformer 11. Other combined circuits are known which comprise more than one transformer and/or more than one switch and in which the above measure can be applied. Such a circuit is, for example, the circuit described in United States Patent Specification 3,689,797. Herein the driver transistor, i.e. transistor 7 in the present patent application also functions as the switch of the switched-mode power supply, whereas the output transistor, z.e.

transistor 9 in the present patent application only functions as a switch for the deflection circuit. Supply voltages are generated by means of windings of driver transformer 8.

Because the conduction time of the driver transistor in this known circuit and hence the current flowing through the base emitter diode of the output transistor are also subjected to variations owing to the ripple voltage of the input voltage, a phase error may also be produced there which can be corrected for, thanks to the above measure.

The same applies when other semiconductor elements than transistors are used as a switch, such as, for example, thyristors, wherein the turn-off time occupies a not inconsiderable and, in particular, variable period of time.

WHAT WE CLAIM IS:- 1. A circuit in a television picture display device comprising switching means for generating a sawtooth deflection current through a line deflection coil and for converting an input direct voltage into a substantially constant output direct supply voltage, which switching means includes at least one switch adapted to be switched at line frequency and to conduct during a part of the line period, the duration of conduction being adjustable by means of a pulse duration control stage, said circuit furthermore comprising a comparison stage for comparing in frequency and/or in phase received line synchronization pulses and pulses originating from a line output stage for the adjustment of a line oscillator via a lowpass filter, the generated signal of said line oscillator being applied in operation to the pulse duration control stage, characterized in that in order to eliminate shifts of phase of the deflection current as a result of a ripple voltage superimposed on the input voltage, the phase of the signal generated by the oscillator adapted to be influenced by a source of ripple voltage.

2. A circuit as claimed in Claim 1, characterized in that said source is the source of the ripple voltage superimposed on the input voltage.

3. A circuit as claimed in Claim 1, characterised in that a capacitor is included between the ripple voltage source and the low-pass filter.

4. A circuit as claimed in Claim 3, characterized in that the capacitor has a capacitance whose value is at least equal to the capacitance of a capacitor which is part of the low-pass filter divided by the ratio between the value of the ripple voltage and the value of the ripple voltage across last said capacitor.

5. A circuit as claimed in Claim 3, characterized in that a resistor is connected in series with the capacitor between the ripple voltage source and the low-pass filter.

6 A circuit substantially as herein described with reference to the accompanying drawing.

**WARNING** end of DESC field may overlap start of CLMS **.

Claims

**WARNING** start of CLMS field may overlap end of DESC **. known circuit having one single switch, namely transistor 9 and one single transformer, namely transformer 11. Other combined circuits are known which comprise more than one transformer and/or more than one switch and in which the above measure can be applied. Such a circuit is, for example, the circuit described in United States Patent Specification 3,689,797. Herein the driver transistor, i.e. transistor 7 in the present patent application also functions as the switch of the switched-mode power supply, whereas the output transistor, z.e. transistor 9 in the present patent application only functions as a switch for the deflection circuit. Supply voltages are generated by means of windings of driver transformer 8. Because the conduction time of the driver transistor in this known circuit and hence the current flowing through the base emitter diode of the output transistor are also subjected to variations owing to the ripple voltage of the input voltage, a phase error may also be produced there which can be corrected for, thanks to the above measure. The same applies when other semiconductor elements than transistors are used as a switch, such as, for example, thyristors, wherein the turn-off time occupies a not inconsiderable and, in particular, variable period of time. WHAT WE CLAIM IS:-

1. A circuit in a television picture display device comprising switching means for generating a sawtooth deflection current through a line deflection coil and for converting an input direct voltage into a substantially constant output direct supply voltage, which switching means includes at least one switch adapted to be switched at line frequency and to conduct during a part of the line period, the duration of conduction being adjustable by means of a pulse duration control stage, said circuit furthermore comprising a comparison stage for comparing in frequency and/or in phase received line synchronization pulses and pulses originating from a line output stage for the adjustment of a line oscillator via a lowpass filter, the generated signal of said line oscillator being applied in operation to the pulse duration control stage, characterized in that in order to eliminate shifts of phase of the deflection current as a result of a ripple voltage superimposed on the input voltage, the phase of the signal generated by the oscillator adapted to be influenced by a source of ripple voltage.