GB1400348A - Self-checking analogue-to-digital converter - Google Patents

Self-checking analogue-to-digital converter

Info

Publication number
GB1400348A
GB1400348A GB3965273A GB3965273A GB1400348A GB 1400348 A GB1400348 A GB 1400348A GB 3965273 A GB3965273 A GB 3965273A GB 3965273 A GB3965273 A GB 3965273A GB 1400348 A GB1400348 A GB 1400348A
Authority
GB
United Kingdom
Prior art keywords
converter
measurement
error
signals
measurements
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB3965273A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Marthinsson B G
Max B E B
Original Assignee
Marthinsson B G
Max B E B
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Marthinsson B G, Max B E B filed Critical Marthinsson B G
Publication of GB1400348A publication Critical patent/GB1400348A/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12Analogue/digital converters
    • H03M1/50Analogue/digital converters with intermediate conversion to time interval
    • H03M1/56Input signal compared with linear ramp

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Analogue/Digital Conversion (AREA)

Abstract

1400348 A/D converters B E B MAX and B G MARTHINSSON 21 Aug 1973 [30 Aug 1972] 39652/73 Heading H3H An A/D converter is provided with automatic indication of erroneous results of conversion and comprises a measuring signal input which is preceded by a switching circuit to which is also applied a reference input whereby either of these inputs can be supplied singly or in combination to the converter, and a control circuit arranged to control the switching and converter circuits so that different outputs of the switching circuit are converted into successive sub-measurements, and has a checking circuit to combine all sub-measurements together and with the reference signal to produce a signal indicative of the error in the A/D conversion. As shown, a single-ramp integrating type A/D converter AD is fed with an input V i from differential amplifier F where the gains A, B of each side are such that A+B= 1. The inputs Eo, Uo, O, being reference, measurement and ground potentials respectively, are applied to amplifier F as signals Ua,Ub via a transistor switching circuit OMK controlled by signals So from central control CU, and 4 measurements are made consecutively, namely: (1) with Ua, Ub, Vi all equal to Uo which is the measurement of Uo; (2) a first check measurement with Ua=Uo, Ub=O, Vi=AUo; (3) a second check measurement with Ua=Eo,Ub=Uo, Vi=AEo+BUo; (4) and a last check measurement with Ua=O, Ub=Eo, Vi=BEo. These are made successively and are stored in registers BM1- BM4 by commands g 1 -g 4 , the output of register BM1 being the converter output and being taken via a decoder AVK to an indicator IND of the measured value. The four measured values are combined at DS1 so that (2)-(4) are added and the result taken from Eo+Uo, Uo being as measured by (I). The result Us is shown to be an error signal indicative of the error in Uo and if this is greater than a threshold, an error indication is provided, e.g. by causing the indicator to flash, or by audible alarm. Signals g 5 and g 6 at appropriate parts of the measurement cycle cause zero- and gain-errors in the converter to be checked and remedied.
GB3965273A 1972-08-30 1973-08-21 Self-checking analogue-to-digital converter Expired GB1400348A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
SE11227/72A SE365920B (en) 1972-08-30 1972-08-30

Publications (1)

Publication Number Publication Date
GB1400348A true GB1400348A (en) 1975-07-16

Family

ID=20293572

Family Applications (1)

Application Number Title Priority Date Filing Date
GB3965273A Expired GB1400348A (en) 1972-08-30 1973-08-21 Self-checking analogue-to-digital converter

Country Status (5)

Country Link
JP (1) JPS4965768A (en)
DE (1) DE2343828A1 (en)
FR (1) FR2198318B3 (en)
GB (1) GB1400348A (en)
SE (1) SE365920B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110531296A (en) * 2019-08-09 2019-12-03 格威半导体(厦门)有限公司 The gain calibration methods thereof of battery management system

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2648635C2 (en) * 1976-10-27 1978-09-28 Graetz Gmbh & Co Ohg, 5990 Altena Measuring arrangement with an analog-digital converter
US4291297A (en) 1977-06-22 1981-09-22 Hitachi, Ltd. Single ramp comparison analog to digital converter

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110531296A (en) * 2019-08-09 2019-12-03 格威半导体(厦门)有限公司 The gain calibration methods thereof of battery management system

Also Published As

Publication number Publication date
SE365920B (en) 1974-04-01
DE2343828A1 (en) 1974-03-14
FR2198318A1 (en) 1974-03-29
FR2198318B3 (en) 1976-07-30
JPS4965768A (en) 1974-06-26

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Legal Events

Date Code Title Description
PS Patent sealed
PLNP Patent lapsed through nonpayment of renewal fees