GB1365783A - Addition subtraction device utilizing memory means - Google Patents

Addition subtraction device utilizing memory means

Info

Publication number
GB1365783A
GB1365783A GB4435372A GB4435372A GB1365783A GB 1365783 A GB1365783 A GB 1365783A GB 4435372 A GB4435372 A GB 4435372A GB 4435372 A GB4435372 A GB 4435372A GB 1365783 A GB1365783 A GB 1365783A
Authority
GB
United Kingdom
Prior art keywords
complement
unit
stop code
address
register
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB4435372A
Other languages
English (en)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Casio Computer Co Ltd
Original Assignee
Casio Computer Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Casio Computer Co Ltd filed Critical Casio Computer Co Ltd
Publication of GB1365783A publication Critical patent/GB1365783A/en
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/491Computations with decimal numbers radix 12 or 20.
    • G06F7/492Computations with decimal numbers radix 12 or 20. using a binary weighted representation within each denomination
    • G06F7/493Computations with decimal numbers radix 12 or 20. using a binary weighted representation within each denomination the representation being the natural binary coded representation, i.e. 8421-code
    • G06F7/494Adding; Subtracting
    • G06F7/495Adding; Subtracting in digit-serial fashion, i.e. having a single digit-handling circuit treating all denominations after each other

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computing Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Analysis (AREA)
  • Executing Machine-Instructions (AREA)
  • Shift Register Type Memory (AREA)
  • Controls And Circuits For Display Device (AREA)
  • Information Retrieval, Db Structures And Fs Structures Therefor (AREA)
GB4435372A 1971-09-29 1972-09-26 Addition subtraction device utilizing memory means Expired GB1365783A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP46076158A JPS5235264B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1971-09-29 1971-09-29

Publications (1)

Publication Number Publication Date
GB1365783A true GB1365783A (en) 1974-09-04

Family

ID=13597227

Family Applications (1)

Application Number Title Priority Date Filing Date
GB4435372A Expired GB1365783A (en) 1971-09-29 1972-09-26 Addition subtraction device utilizing memory means

Country Status (6)

Country Link
US (1) US3822378A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
JP (1) JPS5235264B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
CH (1) CH574133A5 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
DE (1) DE2247534C3 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
FR (1) FR2158839A5 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
GB (1) GB1365783A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4288850A (en) * 1979-01-02 1981-09-08 Honeywell Information Systems Inc. Apparatus for identification and removal of a sign signal character superimposed
US4774686A (en) * 1986-03-21 1988-09-27 Rca Licensing Corporation Serial digital signal processing circuitry
JPS6339508A (ja) * 1986-08-02 1988-02-20 一色 重夫 両芽切籾苗
JPS63167705A (ja) * 1986-12-29 1988-07-11 一色 重夫 生干両芽切籾苗
US4924385A (en) * 1987-10-26 1990-05-08 Casio Computer Co., Ltd. Method of detecting types of parts constituting a larger group of parts
US4975835A (en) * 1987-10-30 1990-12-04 Casio Computer Co., Ltd. Variable length data processing apparatus for consecutively processing variable-length data responsive to one instruction
CA1328027C (en) * 1988-07-14 1994-03-22 Toshio Kashio Data processing apparatus
US5202984A (en) * 1988-07-14 1993-04-13 Casio Computer Co., Ltd. Apparatus and method for updating transaction file
US5369776A (en) * 1988-07-14 1994-11-29 Casio Computer Co., Ltd. Apparatus for producing slips of variable length and having pre-stored word names, and wherein labels are added to word data thereon
EP0350653B1 (en) * 1988-07-14 1995-12-06 Casio Computer Company Limited Slip data processing apparatus
US5283895A (en) * 1988-07-14 1994-02-01 Casio Computer Co., Ltd. Apparatus and method for processing data corresponding to word labels
US5214764A (en) * 1988-07-15 1993-05-25 Casio Computer Co., Ltd. Data processing apparatus for operating on variable-length data delimited by delimiter codes
KR0152979B1 (ko) * 1988-07-15 1998-11-16 가시오 가즈오 가변길이 데이터 처리장치
JP2796628B2 (ja) * 1988-11-29 1998-09-10 カシオ計算機株式会社 印字装置
JP2969153B2 (ja) * 1990-06-29 1999-11-02 カシオ計算機株式会社 レコード検索方法
JP3074737B2 (ja) * 1990-12-29 2000-08-07 カシオ計算機株式会社 ファイル更新処理装置
JP3177999B2 (ja) * 1991-04-25 2001-06-18 カシオ計算機株式会社 システム構成図作成装置
JP3134505B2 (ja) * 1992-05-29 2001-02-13 カシオ計算機株式会社 伝票処理装置
US5778350A (en) * 1995-11-30 1998-07-07 Electronic Data Systems Corporation Data collection, processing, and reporting system
RU2388041C2 (ru) * 2008-05-04 2010-04-27 Борис Михайлович Власов Способ и устройство сложения двоичных кодов

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3219982A (en) * 1961-11-14 1965-11-23 Ibm High order mark system
US3411142A (en) * 1965-12-27 1968-11-12 Honeywell Inc Buffer storage system
US3346727A (en) * 1966-02-28 1967-10-10 Honeywell Inc Justification of operands in an arithmetic unit
JPS5036542B1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * 1969-12-15 1975-11-26

Also Published As

Publication number Publication date
DE2247534A1 (de) 1973-04-12
JPS5235264B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1977-09-08
CH574133A5 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1976-03-31
FR2158839A5 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1973-06-15
DE2247534C3 (de) 1979-09-13
DE2247534B2 (de) 1979-01-11
US3822378A (en) 1974-07-02
JPS4842644A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1973-06-21

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Legal Events

Date Code Title Description
PS Patent sealed [section 19, patents act 1949]
PCNP Patent ceased through non-payment of renewal fee