GB1228550A - - Google Patents
Info
- Publication number
- GB1228550A GB1228550A GB1228550DA GB1228550A GB 1228550 A GB1228550 A GB 1228550A GB 1228550D A GB1228550D A GB 1228550DA GB 1228550 A GB1228550 A GB 1228550A
- Authority
- GB
- United Kingdom
- Prior art keywords
- interrupt
- unit
- signal
- level
- line
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
- G06F13/24—Handling requests for interconnection or transfer for access to input/output bus using interrupt
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Bus Control (AREA)
Abstract
1,228,550. Computer interrupt. STANDARD TELEPHONES & CABLES Ltd. 30 April, 1969, No. 21954/69. Heading G4A. A digital electric computer has at least one processor unit, at least one memory unit and at least one peripheral unit, for example a teleprinter, all connected by a multiwire one or two way interrupt bus. 4 by which one unit can interrupt one or more other units. A unit which generates an interrupt has an output store 8 with a separate output for each interrupt signal connected via amplifiers 6 to one or more other units. If the unit responds to interrupt signals it has an input store 7 with a separate input for each signal so that a signal on line 9 causes a second level interrupt in unit 2, the interrupt level thus depending on the line connections. The unit can also interrupt itself, i.e. a signal in line 10 causes a fourth level interrupt in unit 2.
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GB2195469 | 1969-04-30 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| GB1228550A true GB1228550A (en) | 1971-04-15 |
Family
ID=10171550
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GB1228550D Expired GB1228550A (en) | 1969-04-30 | 1969-04-30 |
Country Status (2)
| Country | Link |
|---|---|
| BE (1) | BE749770A (en) |
| GB (1) | GB1228550A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE2234407A1 (en) * | 1971-09-25 | 1973-03-29 | Ibm | CONTROL UNIT FOR DIGITAL DATA PROCESSING SYSTEMS |
-
1969
- 1969-04-30 GB GB1228550D patent/GB1228550A/en not_active Expired
-
1970
- 1970-04-30 BE BE749770D patent/BE749770A/en unknown
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE2234407A1 (en) * | 1971-09-25 | 1973-03-29 | Ibm | CONTROL UNIT FOR DIGITAL DATA PROCESSING SYSTEMS |
Also Published As
| Publication number | Publication date |
|---|---|
| BE749770A (en) | 1970-10-30 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PS | Patent sealed | ||
| 435 | Patent endorsed 'licences of right' on the date specified (sect. 35/1949) | ||
| PCNP | Patent ceased through non-payment of renewal fee |