GB1108800A - Improvements in or relating to electronic data processing machines - Google Patents

Improvements in or relating to electronic data processing machines

Info

Publication number
GB1108800A
GB1108800A GB13606/65A GB1360665A GB1108800A GB 1108800 A GB1108800 A GB 1108800A GB 13606/65 A GB13606/65 A GB 13606/65A GB 1360665 A GB1360665 A GB 1360665A GB 1108800 A GB1108800 A GB 1108800A
Authority
GB
United Kingdom
Prior art keywords
address
instruction
interruption
decimal
programme
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB13606/65A
Inventor
Gene Myron Amdahl
Jacob Raymond Johnson
John Willis Rood
Richard Joseph Cranevale
Bruce Martin Updike
Anthony Eugene Villante
Gerrit Anne Blaauw
Helmut Weber
Peter Calingaert
Richard Paul Case
Elaine Marie Boehm
William Porter Hane
Charles Bertram Perkins Jr
Arthur Frederick Collins
Jack Ellis Greene
Albert Allan Magdall
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority to US357372A priority Critical patent/US3400371A/en
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of GB1108800A publication Critical patent/GB1108800A/en
Application status is Expired legal-status Critical

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/57Arithmetic logic units [ALU], i.e. arrangements or devices for performing two or more of the operations covered by groups G06F7/483 - G06F7/556 or for performing logical operations
    • G06F7/575Basic arithmetic logic units, i.e. devices selectable to perform either addition, subtraction or one of several logical operations, using, at least partially, the same circuitry
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16Error detection or correction of the data by redundancy in hardware
    • G06F11/1629Error detection by comparing the output of redundant processing systems
    • G06F11/1641Error detection by comparing the output of redundant processing systems where the comparison is not performed by the redundant processing components
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14Protection against unauthorised use of memory or access to memory
    • G06F12/1458Protection against unauthorised use of memory or access to memory by checking the subject access rights
    • G06F12/1466Key-lock mechanism
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10Program control for peripheral devices
    • G06F13/12Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/122Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware performs an I/O function other than control of data transfer
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/20Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/22Handling requests for interconnection or transfer for access to input/output bus using successive scanning, e.g. polling
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/20Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/24Handling requests for interconnection or transfer for access to input/output bus using interrupt
    • G06F13/26Handling requests for interconnection or transfer for access to input/output bus using interrupt with priority control
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/76Architectures of general purpose stored program computers
    • G06F15/78Architectures of general purpose stored program computers comprising a single central processing unit
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from or digital output to record carriers, e.g. RAID, emulated record carriers, networked record carriers
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/12Digital output to print unit, e.g. line printer, chain printer
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F40/00Handling natural language data
    • G06F40/10Text processing
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/50Adding; Subtracting
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/22Microcontrol or microprogram arrangements
    • G06F9/226Microinstruction function, e.g. input/output microinstruction; diagnostic microinstruction; microinstruction format
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/22Microcontrol or microprogram arrangements
    • G06F9/26Address formation of the next micro-instruction ; Microprogram storage or retrieval arrangements
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/22Microcontrol or microprogram arrangements
    • G06F9/26Address formation of the next micro-instruction ; Microprogram storage or retrieval arrangements
    • G06F9/262Arrangements for next microinstruction selection
    • G06F9/264Microinstruction selection based on results of processing
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003Arrangements for executing specific machine instructions
    • G06F9/30007Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/3001Arithmetic instructions
    • G06F9/30014Arithmetic instructions with variable precision
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003Arrangements for executing specific machine instructions
    • G06F9/30007Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30036Instructions to perform operations on packed data, e.g. vector operations
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003Arrangements for executing specific machine instructions
    • G06F9/3005Arrangements for executing specific machine instructions to perform operations for flow control
    • G06F9/30058Conditional branch instructions
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30094Condition code generation, e.g. Carry, Zero flag
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145Instruction analysis, e.g. decoding, instruction word fields
    • G06F9/3016Decoding the operand specifier, e.g. specifier format
    • G06F9/30167Decoding the operand specifier, e.g. specifier format of immediate specifier, e.g. constants
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/38Indexing scheme relating to groups G06F7/38 - G06F7/575
    • G06F2207/3804Details
    • G06F2207/3808Details concerning the type of numbers or the way they are handled
    • G06F2207/3856Operand swapping

Abstract

1,108,800. Electric digital calculators and data-storage. INTERNATIONAL BUSINESS MACHINES CORPORATION. 31 March, 1965 [6 April, 1964], No. 13606/65. Headings G4A and G4C. In a data processor, variable-format macroinstructions read from a main memory into selected registers control accessing of a microprogramme read-only store. Data representations-The machine can handle: (a) Fixed-point numbers which are signed binary numbers of one of two lengths. (b) Floating-point numbers (signed) consisting of a " fraction " field of single or double precision length containing binary-coded hexadecimal digits, the fraction field being considered multiplied by 16 raised to the power of a number given in a 7-bit " characteristic " field. (c) Decimal numbers containing a variable number of binary-coded decimal digits, the code 1101 being used to indicate " minus " and the other unused four-bit codes to indicate " plus." Two BCD digits occupy an 8-bit byte in the so-called packed format, or the byte contains one digit plus zone bits in the unpacked (or zoned) format. (d) Logical information in various length fields. Macro-instruction format.-(Figs. 21-25, not shown). Each macro-instruction contains besides an operation code, either (a) the addresses of two operands (RR), or (b) the address of one operand, and two fields which when added give the address of a register containing a number to be added to another field in the instruction to give a second operand address (RX), or (c) two operand addresses and a field to be added to the contents of a register specified by another field in the instruction to give a third operand address (RS), or (d) fields specifying the lengths of two operands, the addresses of two registers and two numbers which when added to the contents of the registers respectively give the addresses of the left-most bytes of the two operands (SS), or (e) one operand (directly) and the address of a register the contents of which are to be added to those of another field in the instruction to get the address of a single-byte second operand (SI). The formats used for different types of operations are as follows: floating-point (RR, RX), fixed-point (RR, RX, RS), decimal (SS), logical (RR, RX, RS, RI, SS). In all macro-instructions, the first two bits of the operation code portion specify the instruction format and length. Programme status words (Fig. 27a, not shown).-One of these words partially controls machine operation at any one time. When operation is interrupted (e.g. for I/O servicing), the current programme status word (PSW) is stored and another is introduced. The PSW has fields to specify: (a) which possible sources of interruption are permitted to cause interruption, (b) storage protection key, (c) whether detection of a machine malfunction is to result in interruption, and execution of diagnostic procedures, (d) whether the CPU is running or waiting, (e) whether the CPU is executing a problem programme or a monitor programme, (f) cause of interruption, (g) length of last instruction executed, (h) condition code, (i) which of four events are to result in interruption, the events being fixed-point overflow, decimal overflow, exponent overflow, and " significance " (i.e. the occurrence of an allzero fraction in the result of a floating-point addition or subtraction), (j) address of next macro-instruction. Possible sources of interruption.-(a) Request for I/O operation. (b) Programme interruption due to programme error. (c) Monitor call. (d) External, e.g. when a timer value is decremented beyond zero, when an operator presses a button or when an external unit (e.g. another CPU) signals on any one of six lines provided. (e) Detection of machine malfunction. A predetermined priority order is provided for simultaneous interrupt attempts. If the storage protection feature is not provided in the computer, detection of a non-zero protection key in the PSW causes an immediate interruption. Manual controls.-These include: (a) A rate switch determining whether the machine will operate continuously on being started, or perfoim one macro-instruction and then stop until restarted. (b) Address keys to address a storage location within a storage area selected by a storage selection switch. (c) Data keys for specifying data to be stored in an addressed location, (d) A button to cause display of information in an addressed location. (e) Address compare switches to set an address on recognition of which the CPU will stop. Read-only storage.-(Figs. 4am, 45a-45c, 46a-46d, not shown).-Two decoders select a driver transistor by signals applied to the base and emitter terminals respectively to read out two words in a capacitive read-only store to sense-amplifiers, the outputs of half the amplifiers being stored in latches under control of a further address bit. By this scheme the number of drivers is halved by doubling the number of amplifiers. Alternatively, each driver may read out four words, the number of amplifiers being twice as large again, and so on. Arithmetic and logic unit and checking. (Figs. 35a-35i, not shown).-The ALU can perform addition or subtraction (binary or decimal) or AND, OR, EXCLUSIVE-OR functions, depending on control signals. Operations are done on the normal and inverted forms of the operands and the results compared to give an error indication if inconsistent. Multiplication.-Binary multiplication is done utilizing tables in which the multiplier is stored in both single and doubled form. Decimal multiplication is done by an algorithm involving successive subtractions followed by multiplicand end digit testing operations and shift of multiplier. Division.-Binary division is by repeated addition or subtraction operations of the divisor to/from the dividend, each followed by shift of the dividend, whether the addition or subtraction operation is used at any time depending on the sign of the result of the last operation. Decimal division is done by repeated subtraction. Other features.-The Specification describes a complete micro-programme-controlled computer in considerable detail, including for instance a complete dictionary of micro-instruction words, and micro-programmes for representative macroinstructions. Also described are details of control of input/output (I/O) operations, editing, branching, memory protection and other features, which are, however, the subject of separate patents.
GB13606/65A 1964-04-06 1965-03-31 Improvements in or relating to electronic data processing machines Expired GB1108800A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US357372A US3400371A (en) 1964-04-06 1964-04-06 Data processing system

Publications (1)

Publication Number Publication Date
GB1108800A true GB1108800A (en) 1968-04-03

Family

ID=23405304

Family Applications (7)

Application Number Title Priority Date Filing Date
GB1054725D GB1054725A (en) 1964-04-06
GB5906/65A Expired GB1061361A (en) 1964-04-06 1965-02-11 Improvements in or relating to electronic data processing systems
GB8602/65A Expired GB1045425A (en) 1964-04-06 1965-03-01 Improvements relating to arithmetic and logic units
GB10974/65A Expired GB1055704A (en) 1964-04-06 1965-03-16 Improvements relating to electronic data processing systems
GB10969/65A Expired GB1108801A (en) 1964-04-06 1965-03-16 Improvements in or relating to electronic data processing systems
GB10973/65A Expired GB1108802A (en) 1964-04-06 1965-03-16 Improvements relating to program controlled electronic data processing systems
GB13606/65A Expired GB1108800A (en) 1964-04-06 1965-03-31 Improvements in or relating to electronic data processing machines

Family Applications Before (6)

Application Number Title Priority Date Filing Date
GB1054725D GB1054725A (en) 1964-04-06
GB5906/65A Expired GB1061361A (en) 1964-04-06 1965-02-11 Improvements in or relating to electronic data processing systems
GB8602/65A Expired GB1045425A (en) 1964-04-06 1965-03-01 Improvements relating to arithmetic and logic units
GB10974/65A Expired GB1055704A (en) 1964-04-06 1965-03-16 Improvements relating to electronic data processing systems
GB10969/65A Expired GB1108801A (en) 1964-04-06 1965-03-16 Improvements in or relating to electronic data processing systems
GB10973/65A Expired GB1108802A (en) 1964-04-06 1965-03-16 Improvements relating to program controlled electronic data processing systems

Country Status (12)

Country Link
US (1) US3400371A (en)
AT (4) AT264162B (en)
BE (5) BE662152A (en)
CH (6) CH432065A (en)
DE (6) DE1246289B (en)
ES (3) ES311385A1 (en)
FI (1) FI46568C (en)
GB (7) GB1061361A (en)
IL (1) IL23159A (en)
NL (5) NL6504269A (en)
NO (1) NO117054B (en)
SE (3) SE316936B (en)

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GB1061361A (en) 1967-03-08
GB1045425A (en) 1966-10-12
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NO117054B (en) 1969-06-23
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DE1499200A1 (en) 1970-03-05
BE662149A (en) 1965-08-02
NL6504271A (en) 1965-10-07
CH424324A (en) 1966-11-15
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GB1055704A (en) 1967-01-18
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SE310277B (en) 1969-04-21
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DE1237363B (en) 1967-03-23
NL143351B (en) 1974-09-16
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IL23159A (en) 1969-01-29
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BE662151A (en) 1965-08-02
US3400371A (en) 1968-09-03
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AT253260B (en) 1967-03-28
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AT255801B (en) 1967-07-25

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