FR2666931B1 - - Google Patents
Info
- Publication number
- FR2666931B1 FR2666931B1 FR9111385A FR9111385A FR2666931B1 FR 2666931 B1 FR2666931 B1 FR 2666931B1 FR 9111385 A FR9111385 A FR 9111385A FR 9111385 A FR9111385 A FR 9111385A FR 2666931 B1 FR2666931 B1 FR 2666931B1
- Authority
- FR
- France
- Prior art keywords
- inner lead
- carrier tape
- semiconductor chip
- electrodes
- bonding
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000004065 semiconductor Substances 0.000 abstract 3
- 238000004519 manufacturing process Methods 0.000 abstract 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/86—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using tape automated bonding [TAB]
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
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- H—ELECTRICITY
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/565—Moulds
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- H—ELECTRICITY
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49572—Lead-frames or other flat leads consisting of thin flexible metallic tape with or without a film carrier
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16245—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
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- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/79—Apparatus for Tape Automated Bonding [TAB]
- H01L2224/7965—Means for transporting the components to be connected
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- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/50—Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
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- H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
- H01L24/79—Apparatus for Tape Automated Bonding [TAB]
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- H01L2924/01005—Boron [B]
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- H01L2924/0101—Neon [Ne]
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- H01L2924/01015—Phosphorus [P]
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- H01L2924/01052—Tellurium [Te]
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- H01L2924/01058—Cerium [Ce]
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- H01L2924/01061—Promethium [Pm]
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- H01L2924/01075—Rhenium [Re]
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- H01L2924/01082—Lead [Pb]
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- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49121—Beam lead frame or beam lead device
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
- Wire Bonding (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP24474990 | 1990-09-14 | ||
JP3130432A JPH04330744A (ja) | 1990-09-14 | 1991-05-02 | 半導体装置の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2666931A1 FR2666931A1 (fr) | 1992-03-20 |
FR2666931B1 true FR2666931B1 (fr) | 1995-01-06 |
Family
ID=26465567
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR9111385A Granted FR2666931A1 (fr) | 1990-09-14 | 1991-09-16 | Procede de fabrication pour dispositif a semiconducteurs, a connexion de puces sur une bande de support. |
Country Status (4)
Country | Link |
---|---|
US (1) | US5166099A (fr) |
JP (1) | JPH04330744A (fr) |
DE (1) | DE4130544C2 (fr) |
FR (1) | FR2666931A1 (fr) |
Families Citing this family (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5338705A (en) * | 1992-09-10 | 1994-08-16 | Texas Instruments Incorporated | Pressure differential downset |
US5474958A (en) * | 1993-05-04 | 1995-12-12 | Motorola, Inc. | Method for making semiconductor device having no die supporting surface |
US5686352A (en) * | 1993-07-26 | 1997-11-11 | Motorola Inc. | Method for making a tab semiconductor device with self-aligning cavity and intrinsic standoff |
US5688716A (en) | 1994-07-07 | 1997-11-18 | Tessera, Inc. | Fan-out semiconductor chip assembly |
US5798286A (en) * | 1995-09-22 | 1998-08-25 | Tessera, Inc. | Connecting multiple microelectronic elements with lead deformation |
US5830782A (en) * | 1994-07-07 | 1998-11-03 | Tessera, Inc. | Microelectronic element bonding with deformation of leads in rows |
US6117694A (en) * | 1994-07-07 | 2000-09-12 | Tessera, Inc. | Flexible lead structures and methods of making same |
US6429112B1 (en) | 1994-07-07 | 2002-08-06 | Tessera, Inc. | Multi-layer substrates and fabrication processes |
US6828668B2 (en) * | 1994-07-07 | 2004-12-07 | Tessera, Inc. | Flexible lead structures and methods of making same |
US5518964A (en) * | 1994-07-07 | 1996-05-21 | Tessera, Inc. | Microelectronic mounting with multiple lead deformation and bonding |
US6024274A (en) * | 1996-04-03 | 2000-02-15 | Industrial Technology Research Institute | Method for tape automated bonding to composite bumps |
US6274405B1 (en) * | 1996-10-17 | 2001-08-14 | Seiko Epson Corporation | Semiconductor device, method of making the same, circuit board, and film carrier tape |
US6335225B1 (en) * | 1998-02-20 | 2002-01-01 | Micron Technology, Inc. | High density direct connect LOC assembly |
JP3420748B2 (ja) | 2000-12-14 | 2003-06-30 | 松下電器産業株式会社 | 半導体装置及びその製造方法 |
US8384228B1 (en) * | 2009-04-29 | 2013-02-26 | Triquint Semiconductor, Inc. | Package including wires contacting lead frame edge |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
NL189379C (nl) * | 1977-05-05 | 1993-03-16 | Richardus Henricus Johannes Fi | Werkwijze voor inkapselen van micro-elektronische elementen. |
JPS63200540A (ja) * | 1987-02-17 | 1988-08-18 | Toshiba Corp | ボンデイングツ−ルの傾き測定装置 |
US5057461A (en) * | 1987-03-19 | 1991-10-15 | Texas Instruments Incorporated | Method of mounting integrated circuit interconnect leads releasably on film |
JPH0783036B2 (ja) * | 1987-12-11 | 1995-09-06 | 三菱電機株式会社 | キヤリアテープ |
JPH02121342A (ja) * | 1988-10-28 | 1990-05-09 | Ibiden Co Ltd | フィルムキャリア |
JPH02155245A (ja) * | 1988-12-07 | 1990-06-14 | Matsushita Electric Ind Co Ltd | 電子部品の製造方法 |
FR2645680B1 (fr) * | 1989-04-07 | 1994-04-29 | Thomson Microelectronics Sa Sg | Encapsulation de modules electroniques et procede de fabrication |
-
1991
- 1991-05-02 JP JP3130432A patent/JPH04330744A/ja active Pending
- 1991-09-13 DE DE4130544A patent/DE4130544C2/de not_active Expired - Fee Related
- 1991-09-13 US US07/759,912 patent/US5166099A/en not_active Expired - Fee Related
- 1991-09-16 FR FR9111385A patent/FR2666931A1/fr active Granted
Also Published As
Publication number | Publication date |
---|---|
US5166099A (en) | 1992-11-24 |
FR2666931A1 (fr) | 1992-03-20 |
DE4130544C2 (de) | 1996-07-04 |
JPH04330744A (ja) | 1992-11-18 |
DE4130544A1 (de) | 1992-03-19 |
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Legal Events
Date | Code | Title | Description |
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D6 | Patent endorsed licences of rights | ||
ST | Notification of lapse |