FR2473184A1 - Radar demodulation circuit eliminating secondary lobes - has FETs for earthing multiplier when receiving zero signal to reduce noise - Google Patents
Radar demodulation circuit eliminating secondary lobes - has FETs for earthing multiplier when receiving zero signal to reduce noise Download PDFInfo
- Publication number
- FR2473184A1 FR2473184A1 FR8000286A FR8000286A FR2473184A1 FR 2473184 A1 FR2473184 A1 FR 2473184A1 FR 8000286 A FR8000286 A FR 8000286A FR 8000286 A FR8000286 A FR 8000286A FR 2473184 A1 FR2473184 A1 FR 2473184A1
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- France
- Prior art keywords
- signal
- multiplier
- replica
- demodulation device
- zero
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
- G01S13/00—Systems using the reflection or reradiation of radio waves, e.g. radar systems; Analogous systems using reflection or reradiation of waves whose nature or wavelength is irrelevant or unspecified
- G01S13/02—Systems using reflection of radio waves, e.g. primary radar systems; Analogous systems
- G01S13/06—Systems determining position data of a target
- G01S13/08—Systems for measuring distance only
- G01S13/10—Systems for measuring distance only using transmission of interrupted, pulse modulated waves
- G01S13/26—Systems for measuring distance only using transmission of interrupted, pulse modulated waves wherein the transmitted pulses use a frequency- or phase-modulated carrier wave
- G01S13/28—Systems for measuring distance only using transmission of interrupted, pulse modulated waves wherein the transmitted pulses use a frequency- or phase-modulated carrier wave with time compression of received pulses
- G01S13/284—Systems for measuring distance only using transmission of interrupted, pulse modulated waves wherein the transmitted pulses use a frequency- or phase-modulated carrier wave with time compression of received pulses using coded pulses
- G01S13/288—Systems for measuring distance only using transmission of interrupted, pulse modulated waves wherein the transmitted pulses use a frequency- or phase-modulated carrier wave with time compression of received pulses using coded pulses phase modulated
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
- G01S13/00—Systems using the reflection or reradiation of radio waves, e.g. radar systems; Analogous systems using reflection or reradiation of waves whose nature or wavelength is irrelevant or unspecified
- G01S13/02—Systems using reflection of radio waves, e.g. primary radar systems; Analogous systems
- G01S13/06—Systems determining position data of a target
- G01S13/08—Systems for measuring distance only
- G01S13/32—Systems for measuring distance only using transmission of continuous waves, whether amplitude-, frequency-, or phase-modulated, or unmodulated
- G01S13/325—Systems for measuring distance only using transmission of continuous waves, whether amplitude-, frequency-, or phase-modulated, or unmodulated using transmission of coded signals, e.g. P.S.K. signals
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- Engineering & Computer Science (AREA)
- Radar, Positioning & Navigation (AREA)
- Remote Sensing (AREA)
- Computer Networks & Wireless Communication (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Radar Systems Or Details Thereof (AREA)
Abstract
Description
La presente invention se rapporte a un dispositif de démodulation adapté à l'élimination des lobes secondaires d'auto-corrélation pour un signal radar continu périodique codé en phase. The present invention relates to a demodulation device adapted to the elimination of autocorrelation secondary lobes for a phase-coded periodic continuous radar signal.
Dans la demande de brevet français nO 76 38006 déposée le 16 décembre 1976 par la demanderesse sous le titre "Dispositif d'élimination des lobes secondaires d'auto-corrélation d'un signal continu périodique codé en phase", on décrit un dispositif qui s'applique en particulier aux radars à émission continue et à compression d'impulsion et qui permet d'éliminer les lobes secondaires.Ce dispositif met en oeuvre le procédé consistant à - choisir un code de phase dont la fonction d'auto-corrélation possède
des lobes secondaires présentant une symétrie telle que la somme de
ladite fonction avec cette même fonction décale d'un temps T donne un
niveau nul entre les pics principaux ; - obtenir le signal d'auto-corrélation dudit code de phase ; - obtenir ledit signal d'auto-corrélation décalé d'un temps T T - faire la somme des deux signaux d'auto-corrélation décalés.In the French patent application No. 76 38006 filed on December 16, 1976 by the Applicant under the title "Self-correlated secondary lobe elimination device of a periodic DC signal coded in phase", a device is described which particularly applies to continuous-emission and pulse-compression radars and enables the elimination of secondary lobes. This device implements the method consisting in: - choosing a phase code whose autocorrelation function possesses
secondary lobes with a symmetry such that the sum of
said function with this same function shifts a time T gives a
zero level between the main peaks; obtaining the auto-correlation signal of said phase code; - Obtain said autocorrelation signal offset by a time TT - sum the two offset auto-correlation signals.
Le code de phase ci-dessus engendrant un signal périodique s'(t) est obtenu en multipliant alternativement par + 1 et - 1 les "sous-impulsions" successives de durée T d'un signal pXrio- dique s(t) engendré par un code "cycliquement presque parfait" à moments. The above phase code generating a periodic signal s' (t) is obtained by alternately multiplying by + 1 and -1 the successive "sub-pulses" of duration T of a pXriodic signal s (t) generated by a "cyclically almost perfect" code at times.
Le signal radar reçu en écho r'(t) est envoyé sur un dispositif de démodulation classique adapté à une période du signal s'(t). Ce dispositif adapté peut comporter un multiplieur, recevant le signal réfléchi r'(t) et une réplique conjuguée s"(t) = s'(t) + s'(t - T) du signal émis, suivi d'une porte et d'un intégrateur. The radar signal received echo r '(t) is sent to a conventional demodulation device adapted to a period of the signal s' (t). This adapted device may comprise a multiplier, receiving the reflected signal r '(t) and a conjugate replica s "(t) = s' (t) + s' (t-T) of the transmitted signal, followed by a gate and an integrator.
Cependant, du fait que la réplique s"(t) est à trois étants et peut donc prendre la valeur zéro, il se produit dans ce dernier cas une désadaptation des impédances à l'entrez et à la sortie du multiplieur. However, because the replica s "(t) is three and can thus take the value zero, there occurs in the latter case a mismatch impedances to the input and output of the multiplier.
Ceci provoque une augmentation notable du niveau de bruit.This causes a noticeable increase in the noise level.
L'invention a pour objet de remédier à cet inconvénient en prevoyant le maintien d'une impédance constante de l'entre et de la sortie du multiplieur même lorsque la réplique s"(t) est à la valeur zéro. The object of the invention is to overcome this disadvantage by providing for the maintenance of a constant impedance of the input and the output of the multiplier even when the replica s "(t) is at zero.
Selon l'invention, il est prvu, dans un dispositif de démodulation du type décrit, des moyens pour relier l'entrée et la sortie du multiplieur à la masse à travers une impédance fixe lorsque la réplique s"(t) prend la valeur zéro. According to the invention, it is provided, in a demodulation device of the type described, means for connecting the input and the output of the multiplier to ground through a fixed impedance when the replica s "(t) takes the value zero .
Grâce à cette caractéristique, le multiplieur présente toujours, en entrée et en sortie, la même impédance caractéristique, ce qui permet de reduire encore considerablement l'amplitude des lobes secondaires et de n' savoir comme bruit que le bruit propre du recepteur. Thanks to this characteristic, the multiplier always has, at the input and at the output, the same characteristic impedance, which makes it possible to reduce considerably the amplitude of the secondary lobes and to know as noise only the own noise of the receiver.
L'invention sera mieux comprise et d'autres caracteristiques et avantages apparaitront à l'aide de la description ci-apres et des dessins joints où - la figure 1 represente le schéma d'un dispositif de demodulation
connu ; - la figure 2 montre des diagrammes de signaux explicatifs ; - la figure 3 est le schéma d'une partie du dispositif de démodulation
selon l'invention ; - la figure 4 est un schema d'une autre partie du dispositif de démodu-
lation selon l'invention ; et - la figure 5 représente des diagrammes de signaux en certains points
du schéma de la figure 4.The invention will be better understood and other features and advantages will become apparent from the following description and the accompanying drawings in which: - Figure 1 shows the diagram of a demodulation device
known; - Figure 2 shows diagrams of explanatory signals; FIG. 3 is a diagram of part of the demodulation device
according to the invention; FIG. 4 is a diagram of another part of the demodulation device
lation according to the invention; and - Figure 5 shows signal diagrams at certain points
of the diagram of Figure 4.
La figure 1 représente le schéma d'un type de dispositif de démodulation déjà decrit dans la demande de brevet français-n 76 38006. FIG. 1 represents the diagram of a type of demodulation device already described in the French patent application No. 76 38006.
Ce dispositif connu comporte un multiplieur M, recevant le signal radar réfléchi, reçu en écho, r'(t) et la réplique conjuguée s"(t) = s'(t) + s'(t - T) fournie par un circuit 1 générateur de replique recevant les signaux d'horloge H, une porte P et un integrateur I. La porte P est passante pendant un temps nT lorsque n est pair et pendant un temps 2 nT lorsque n est impair, T étant la duree d'une "sous-impulsion" du signal s'(t) de codage en phase et n le nombre de moments du code ainsi qu'on va l'expliquer ci-dessous. Dans la suite de la description, on supposera n impair et égal à 7. This known device comprises a multiplier M, receiving the reflected radar signal, received in echo, r '(t) and the conjugate replica s "(t) = s' (t) + s' (t-T) provided by a circuit 1 replica generator receiving the clock signals H, a gate P and an integrator I. The gate P is busy for a time nT when n is even and for a time 2 nT when n is odd, T being the duration of a "sub-pulse" of the signal s' (t) coding in phase and n the number of moments of the code as will be explained below .. In the following description, we assume n odd and equal at 7.
Comme cela est indiqué dans la demande de brevet précitée, on part d'un signal périodique s(t) (figure 2) engendre par un code "cycliquement presque parfait" à sept moments, les niveaux de chaque moment de durée T ayant une valeur + 1 ou - 1. A partir de ce signal, le circuit 1 génère le signal s'(t) obtenu en multipliant alternativement par + 1 et - 1 les "sous-impulsions" successives du signal s(t) et le signal s'(t - T) retardé de T et en fait la somme pour donner la réplique s"(t) comme on le voit sur la figure 2. Cette réplique s"(t) est un signal à trois états de période 2 nT. On commande donc la porte P (figure 1) par une impulsion h2 de durée 2 nT afin d'adapter le dispositif de démodulation à une période du signal s'(t). L'intégrateur I délivre le signal d'auto-corrélation recherche avec des lobes secondaires en principe éliminés. As indicated in the aforementioned patent application, one starts from a periodic signal s (t) (FIG. 2) generated by a "cyclically nearly perfect" code at seven moments, the levels of each moment of duration T having a value + 1 or - 1. From this signal, the circuit 1 generates the signal s' (t) obtained by multiplying alternately by + 1 and -1 the successive "sub-pulses" of the signal s (t) and the signal s '(t - T) delayed by T and in fact summed it to give the replica s "(t) as we see in figure 2. This replica s" (t) is a three-state signal of period 2 nT. The gate P (FIG. 1) is thus controlled by a pulse h2 of duration 2 nT in order to adapt the demodulation device to a period of the signal s' (t). Integrator I delivers the search autocorrelation signal with secondary lobes that are in principle eliminated.
La figure 3 représente un mode de réalisation du multiplieur N selon l'invention. Ce multiplieur est constitué par un mélangeur à diodes équilibré classique comportant les transformateurs TR1 et TR2 et les diodes D1 à D4. Cependant, la réplique s"(t) étant à trois niveaux, lorsque cette réplique prend la valeur zéro, le mélangeur devient non passant. Ceci créerait une désadaptation des impédances aux accès du mélangeur, d'où une augmentation notable du niveau de bruit. FIG. 3 represents an embodiment of the multiplier N according to the invention. This multiplier is constituted by a conventional balanced diode mixer comprising transformers TR1 and TR2 and diodes D1 to D4. However, since the replica s "(t) is at three levels, when this replica takes the value zero, the mixer becomes non-conducting, which would create a mismatch of the impedances at the mixer's access points, resulting in a noticeable increase in the noise level.
Selon l'invention, on prévoit à l'entrez et à la sortie du mélangeur, deux transistors à effet de champ FETI et FET2 qui sont commandés par un signal HA dont on précisera ultérieurement le mode de formation et qui rend les transistors à effet de champ conducteurs lorsque la réplique s"(t) prend la valeur zéro.According to the invention, there are provided at the input and at the output of the mixer two FETI and FET2 field effect transistors which are controlled by an HA signal, the mode of formation of which will be determined later and which renders the transistors conductive field when the replica s "(t) takes the value zero.
Dans l'exemple décrit, le signal MA a une valeur nulle lorsque la réplique s"(t) a pour valeur zéro et est égal à 1 dans les autres cas. Dans tout ce qui va suivre, lorsque l'on parlera de signaux logiques de niveaux 1 ou o, on comprendra qu'il s'agit respectivement des niveaux haut ou bas habituellement fournis par les circuits logiques classiques. In the example described, the signal MA has a value zero when the replica s "(t) has the value zero and is equal to 1 in the other cases In all that follows, when we speak of logical signals levels 1 or o, it will be understood that these are respectively the high or low levels usually provided by conventional logic circuits.
Ainsi, les transistors FET1 et FET2 sont rendus conducteurs par le niveau 0 du signal NA et l'entrée et la sortie du mélangeur sont alors fermées sur une impédance caractéristique fixe égale à la resistance de conduction des transistors à effet de champ (par exemple 50Q). Thus, the transistors FET1 and FET2 are made conductive by the level 0 of the signal NA and the input and the output of the mixer are then closed on a fixed characteristic impedance equal to the conduction resistance of the field effect transistors (for example 50Q ).
La figure 4 représente un mode de réalisation du circuit générateur de réplique dans le dispositif de démodulation selon l'invention. Ce circuit générateur comprend un générateur de code 10 recevant des signaux d'horloge E et fournissant un signal MP (figure 5) qui est la reproduction du signal s(t) (code "cycliquement presque parfait") mais avec des niveaux logiques 1 et p. Ce signal MP et le signal MPr qui est le signal MP retarde de T par le circuit 11, sont appliqués à un circuit OU exclusif 12 qui fournit le signal MA. Ces divers signaux sont représentés sur la figure 5 et on peut voir que le signal MA est au niveau 0 en même temps que la réplique s"(t). FIG. 4 represents an embodiment of the replica generator circuit in the demodulation device according to the invention. This generator circuit comprises a code generator 10 receiving clock signals E and supplying an MP signal (FIG. 5) which is the reproduction of the signal s (t) ("cyclically nearly perfect" code) but with logic levels 1 and p. This signal MP and the signal MPr which is the signal MP delayed by T by the circuit 11, are applied to an exclusive OR circuit 12 which supplies the signal MA. These various signals are represented in FIG. 5 and it can be seen that the signal MA is at level 0 at the same time as the replica s "(t).
Par ailleurs, le signal HP est envoyé à un circuit logique 13 qui transmet alternativement le signal MP directement ou inverse au rythme des "sous-impulsions". Ceci revient à réaliser la fonction NON-OU exclusif avec un signal d'horloge de période 2T et correspond à la multiplication par + 1 et - 1 du signal s(t). Ainsi, le signal MP' obtenu est de la même forme que le signal s'(t). Les signaux MA et MP' sont envoyés à un circuit logique d'adaptation 14 qui fournit la réplique s"(t) adaptée au niveau de commande des diodes du mélangeur, c'est-à-dire ayant des niveaux + E, - E et O au lieu des niveaux logiques TTL. Furthermore, the signal HP is sent to a logic circuit 13 which alternately transmits the MP signal directly or inverse to the rhythm of the "sub-pulses". This amounts to performing the exclusive NOR function with a clock signal of period 2T and corresponds to the multiplication by + 1 and -1 of the signal s (t). Thus, the signal MP 'obtained is of the same form as the signal s' (t). The signals MA and MP 'are sent to an adaptation logic circuit 14 which provides the replica s "(t) adapted to the control level of the diodes of the mixer, that is to say having levels + E, - E and O instead of the TTL logical levels.
Un tel circuit d'adaptation comporte par exemple trois commutateurs à transistor à effet de champ reliant respectivement la sortie s"(t) aux niveaux + E, - E et O sous la commande d'un circuit logique qu'on n'a pas représenté en détail mais qui correspond à la table de vérité suivante :
Such an adaptation circuit comprises, for example, three field effect transistor switches respectively connecting the output s "(t) to the levels + E, - E and O under the control of a logic circuit that is not shown in detail but which corresponds to the following truth table:
<tb> MA <SEP> MP' <SEP> . <SEP> s"(t)
<tb> <SEP> o; <SEP> O;0 <SEP>
<tb> <SEP> O <SEP> : <SEP> 1 <SEP> : <SEP> O <SEP>
<tb> <SEP> 1 <SEP> 0 <SEP> -E <SEP>
<tb> 1 <SEP> 1 <SEP> + <SEP> E
<tb>
Ce circuit d'adaptation peut être considéré comme fournissant le signal s"(t) par multiplication des signaux MA et MP' en supposant que le niveau O du signal MP' est transformé au cours de l'adaptation en un niveau - 1 (figure 5).<tb> MA <SEP> MP '<SEP>. <SEP> s "(t)
<tb><SEP>o;<SEP>O; 0 <SEP>
<tb><SEP> O <SEP>: <SEP> 1 <SEP>: <SE> O <SEP>
<tb><SEP> 1 <SEP> 0 <SEP> -E <SEP>
<tb> 1 <SEP> 1 <SEP> + <SEP> E
<Tb>
This adaptation circuit can be considered as providing the signal s "(t) by multiplication of the signals MA and MP ', assuming that the level O of the signal MP' is transformed during the adaptation into a level -1 (FIG. 5).
Bien entendu, l'exemple de réalisation décrit ne limite en rien la portée de l'invention. Of course, the embodiment described does not limit the scope of the invention.
Claims (5)
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR8000286A FR2473184A1 (en) | 1980-01-08 | 1980-01-08 | Radar demodulation circuit eliminating secondary lobes - has FETs for earthing multiplier when receiving zero signal to reduce noise |
DE19803047907 DE3047907A1 (en) | 1980-01-08 | 1980-12-19 | RADAR DEVICE FROM WHICH PHASE-CODED PERIODIC CONTINUOUS SIGNALS ARE EMISSED |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR8000286A FR2473184A1 (en) | 1980-01-08 | 1980-01-08 | Radar demodulation circuit eliminating secondary lobes - has FETs for earthing multiplier when receiving zero signal to reduce noise |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2473184A1 true FR2473184A1 (en) | 1981-07-10 |
FR2473184B1 FR2473184B1 (en) | 1984-11-30 |
Family
ID=9237311
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR8000286A Granted FR2473184A1 (en) | 1980-01-08 | 1980-01-08 | Radar demodulation circuit eliminating secondary lobes - has FETs for earthing multiplier when receiving zero signal to reduce noise |
Country Status (2)
Country | Link |
---|---|
DE (1) | DE3047907A1 (en) |
FR (1) | FR2473184A1 (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2776392A1 (en) * | 1998-03-23 | 1999-09-24 | Alsthom Cge Alcatel | PULSE COMPRESSION RADAR |
US20130050009A1 (en) * | 2003-10-28 | 2013-02-28 | Preco Electronics, Inc. | Radar echolocater with audio output |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2374651A1 (en) * | 1976-12-16 | 1978-07-13 | Labo Cent Telecommunicat | SECONDARY LOBE ELIMINATION DEVICE FOR SELF-CORRECTING A PERIODIC CONTINUOUS SIGNAL CODE IN PHASE |
-
1980
- 1980-01-08 FR FR8000286A patent/FR2473184A1/en active Granted
- 1980-12-19 DE DE19803047907 patent/DE3047907A1/en not_active Withdrawn
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2374651A1 (en) * | 1976-12-16 | 1978-07-13 | Labo Cent Telecommunicat | SECONDARY LOBE ELIMINATION DEVICE FOR SELF-CORRECTING A PERIODIC CONTINUOUS SIGNAL CODE IN PHASE |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2776392A1 (en) * | 1998-03-23 | 1999-09-24 | Alsthom Cge Alcatel | PULSE COMPRESSION RADAR |
US6067043A (en) * | 1998-03-23 | 2000-05-23 | Alcatel | Pulse compression radar |
US20130050009A1 (en) * | 2003-10-28 | 2013-02-28 | Preco Electronics, Inc. | Radar echolocater with audio output |
Also Published As
Publication number | Publication date |
---|---|
FR2473184B1 (en) | 1984-11-30 |
DE3047907A1 (en) | 1981-09-17 |
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