FR2466100A1 - Procede d'implantation selective de puits de type p de semi-conducteur oxyde-metal a symetrie complementaire - Google Patents

Procede d'implantation selective de puits de type p de semi-conducteur oxyde-metal a symetrie complementaire Download PDF

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Publication number
FR2466100A1
FR2466100A1 FR8020105A FR8020105A FR2466100A1 FR 2466100 A1 FR2466100 A1 FR 2466100A1 FR 8020105 A FR8020105 A FR 8020105A FR 8020105 A FR8020105 A FR 8020105A FR 2466100 A1 FR2466100 A1 FR 2466100A1
Authority
FR
France
Prior art keywords
oxide
zones
composite layer
layer
areas
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
FR8020105A
Other languages
English (en)
French (fr)
Inventor
Donald Wollesen
William Meuli
Philip Shiota
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
American Microsystems Holding Corp
Original Assignee
American Microsystems Holding Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by American Microsystems Holding Corp filed Critical American Microsystems Holding Corp
Publication of FR2466100A1 publication Critical patent/FR2466100A1/fr
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/22—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping using masks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0167—Manufacturing their channels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P76/00—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography
    • H10P76/40—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
    • H10W10/012—Manufacture or treatment of isolation regions comprising dielectric materials using local oxidation of silicon [LOCOS]
    • H10W10/0125—Manufacture or treatment of isolation regions comprising dielectric materials using local oxidation of silicon [LOCOS] comprising introducing electrical impurities in local oxidation regions, e.g. to alter LOCOS oxide growth characteristics
    • H10W10/0126—Manufacture or treatment of isolation regions comprising dielectric materials using local oxidation of silicon [LOCOS] comprising introducing electrical impurities in local oxidation regions, e.g. to alter LOCOS oxide growth characteristics introducing electrical active impurities in local oxidation regions to create channel stoppers
    • H10W10/0127—Manufacture or treatment of isolation regions comprising dielectric materials using local oxidation of silicon [LOCOS] comprising introducing electrical impurities in local oxidation regions, e.g. to alter LOCOS oxide growth characteristics introducing electrical active impurities in local oxidation regions to create channel stoppers using both n-type and p-type impurities, e.g. for isolation of complementary doped regions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/13—Isolation regions comprising dielectric materials formed using local oxidation of silicon [LOCOS], e.g. sealed interface localised oxidation [SILO] or side-wall mask isolation [SWAMI]
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/965—Shaped junction formation

Landscapes

  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Formation Of Insulating Films (AREA)
  • Element Separation (AREA)
  • Semiconductor Integrated Circuits (AREA)
FR8020105A 1979-09-20 1980-09-18 Procede d'implantation selective de puits de type p de semi-conducteur oxyde-metal a symetrie complementaire Pending FR2466100A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/077,383 US4306916A (en) 1979-09-20 1979-09-20 CMOS P-Well selective implant method

Publications (1)

Publication Number Publication Date
FR2466100A1 true FR2466100A1 (fr) 1981-03-27

Family

ID=22137745

Family Applications (1)

Application Number Title Priority Date Filing Date
FR8020105A Pending FR2466100A1 (fr) 1979-09-20 1980-09-18 Procede d'implantation selective de puits de type p de semi-conducteur oxyde-metal a symetrie complementaire

Country Status (8)

Country Link
US (1) US4306916A (https=)
JP (1) JPS56501145A (https=)
CA (1) CA1157574A (https=)
FR (1) FR2466100A1 (https=)
GB (1) GB2072944B (https=)
NL (1) NL8020354A (https=)
SE (1) SE8103147L (https=)
WO (1) WO1981000931A1 (https=)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2472267A1 (fr) * 1979-12-20 1981-06-26 Mitel Corp Dispositif semiconducteur mos a double resistivite et methode de fabrication
EP0017377A3 (en) * 1979-03-20 1982-08-25 Fujitsu Limited Method of producing insulated bipolar transistors and bipolar transistors insulated by that method

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US5252505A (en) * 1979-05-25 1993-10-12 Hitachi, Ltd. Method for manufacturing a semiconductor device
JPS55156370A (en) * 1979-05-25 1980-12-05 Hitachi Ltd Manufacture of semiconductor device
JPS5791553A (en) * 1980-11-29 1982-06-07 Toshiba Corp Semiconductor device
US4369072A (en) * 1981-01-22 1983-01-18 International Business Machines Corp. Method for forming IGFET devices having improved drain voltage characteristics
US4382827A (en) * 1981-04-27 1983-05-10 Ncr Corporation Silicon nitride S/D ion implant mask in CMOS device fabrication
DE3131031A1 (de) * 1981-08-05 1983-02-24 Siemens AG, 1000 Berlin und 8000 München Verfahren zum erzeugen der felddotierung beim herstellen von integrierten komplementaeren mos-feldeffekttransistoren
DE3133468A1 (de) * 1981-08-25 1983-03-17 Siemens AG, 1000 Berlin und 8000 München Verfahren zum herstellen von hochintegrierten komplementaeren mos-feldeffekttransistorschaltungen in siliziumgate-technologie
US4411058A (en) * 1981-08-31 1983-10-25 Hughes Aircraft Company Process for fabricating CMOS devices with self-aligned channel stops
US4420344A (en) * 1981-10-15 1983-12-13 Texas Instruments Incorporated CMOS Source/drain implant process without compensation of polysilicon doping
US4406710A (en) * 1981-10-15 1983-09-27 Davies Roderick D Mask-saving technique for forming CMOS source/drain regions
US4528581A (en) * 1981-10-21 1985-07-09 Hughes Aircraft Company High density CMOS devices with conductively interconnected wells
US4426766A (en) * 1981-10-21 1984-01-24 Hughes Aircraft Company Method of fabricating high density high breakdown voltage CMOS devices
US4422885A (en) * 1981-12-18 1983-12-27 Ncr Corporation Polysilicon-doped-first CMOS process
US4450021A (en) * 1982-02-22 1984-05-22 American Microsystems, Incorporated Mask diffusion process for forming Zener diode or complementary field effect transistors
US4454648A (en) * 1982-03-08 1984-06-19 Mcdonnell Douglas Corporation Method of making integrated MNOS and CMOS devices in a bulk silicon wafer
US4535531A (en) * 1982-03-22 1985-08-20 International Business Machines Corporation Method and resulting structure for selective multiple base width transistor structures
US4435895A (en) 1982-04-05 1984-03-13 Bell Telephone Laboratories, Incorporated Process for forming complementary integrated circuit devices
US4480375A (en) * 1982-12-09 1984-11-06 International Business Machines Corporation Simple process for making complementary transistors
US4470191A (en) * 1982-12-09 1984-09-11 International Business Machines Corporation Process for making complementary transistors by sequential implantations using oxidation barrier masking layer
US4710477A (en) * 1983-09-12 1987-12-01 Hughes Aircraft Company Method for forming latch-up immune, multiple retrograde well high density CMOS FET
JPS60123055A (ja) * 1983-12-07 1985-07-01 Fujitsu Ltd 半導体装置及びその製造方法
US4567640A (en) * 1984-05-22 1986-02-04 Data General Corporation Method of fabricating high density CMOS devices
US4558508A (en) * 1984-10-15 1985-12-17 International Business Machines Corporation Process of making dual well CMOS semiconductor structure with aligned field-dopings using single masking step
US4713329A (en) * 1985-07-22 1987-12-15 Data General Corporation Well mask for CMOS process
US4717683A (en) * 1986-09-23 1988-01-05 Motorola Inc. CMOS process
JPS6384067A (ja) * 1986-09-27 1988-04-14 Toshiba Corp 半導体装置の製造方法
EP0304541A1 (de) * 1987-08-18 1989-03-01 Deutsche ITT Industries GmbH Verfahren zum Herstellen implantierter Wannen und Inseln von integrierten CMOS-Schaltungen
US5292671A (en) * 1987-10-08 1994-03-08 Matsushita Electric Industrial, Co., Ltd. Method of manufacture for semiconductor device by forming deep and shallow regions
JPH07118484B2 (ja) * 1987-10-09 1995-12-18 沖電気工業株式会社 ショットキーゲート電界効果トランジスタの製造方法
JPH01161752A (ja) * 1987-12-18 1989-06-26 Toshiba Corp 半導体装置製造方法
IT1223571B (it) * 1987-12-21 1990-09-19 Sgs Thomson Microelectronics Procedimento per la fabbricazione di dispositivi integrati cmos con lunghezze di porta ridotte
US4925806A (en) * 1988-03-17 1990-05-15 Northern Telecom Limited Method for making a doped well in a semiconductor substrate
DE3900769A1 (de) * 1989-01-12 1990-08-09 Fraunhofer Ges Forschung Integrierte schaltung mit zumindest einem n-kanal-fet und zumindest einem p-kanal-fet
US5296392A (en) * 1990-03-06 1994-03-22 Digital Equipment Corporation Method of forming trench isolated regions with sidewall doping
US5395773A (en) * 1994-03-31 1995-03-07 Vlsi Technology, Inc. MOSFET with gate-penetrating halo implant
US5434099A (en) * 1994-07-05 1995-07-18 United Microelectronics Corporation Method of manufacturing field isolation for complimentary type devices
US5830789A (en) * 1996-11-19 1998-11-03 Integrated Device Technology, Inc. CMOS process forming wells after gate formation
KR100672698B1 (ko) * 2004-12-24 2007-01-24 동부일렉트로닉스 주식회사 씨모스 이미지 센서 및 그의 제조방법
CN102362354B (zh) * 2009-03-25 2014-04-09 罗姆股份有限公司 半导体装置
EP3358626B1 (en) 2017-02-02 2022-07-20 Nxp B.V. Method of making a semiconductor switch device
EP3404722B1 (en) 2017-05-17 2021-03-24 Nxp B.V. Method of making a semiconductor switch device

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FR2281646A1 (fr) * 1974-08-08 1976-03-05 Siemens Ag Procede pour fabriquer un dispositif composite monolithique a semiconducteurs
US4013484A (en) * 1976-02-25 1977-03-22 Intel Corporation High density CMOS process

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US3615938A (en) * 1969-01-28 1971-10-26 Westinghouse Electric Corp Method for diffusion of acceptor impurities into semiconductors
US3853633A (en) * 1972-12-04 1974-12-10 Motorola Inc Method of making a semi planar insulated gate field-effect transistor device with implanted field
US3983620A (en) * 1975-05-08 1976-10-05 National Semiconductor Corporation Self-aligned CMOS process for bulk silicon and insulating substrate device
US4045250A (en) * 1975-08-04 1977-08-30 Rca Corporation Method of making a semiconductor device
JPS5248979A (en) * 1975-10-17 1977-04-19 Mitsubishi Electric Corp Process for production of complementary type mos integrated circuit de vice
JPS5270779A (en) * 1975-12-09 1977-06-13 Fujitsu Ltd Manufacture of complementary-type integrated circuit
NL7604986A (nl) * 1976-05-11 1977-11-15 Philips Nv Werkwijze voor het vervaardigen van een halfgeleider- inrichting, en inrichting vervaardigd door toe- passing van de werkwijze.
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US4104784A (en) * 1976-06-21 1978-08-08 National Semiconductor Corporation Manufacturing a low voltage n-channel MOSFET device
US4217149A (en) * 1976-09-08 1980-08-12 Sanyo Electric Co., Ltd. Method of manufacturing complementary insulated gate field effect semiconductor device by multiple implantations and diffusion
US4081896A (en) * 1977-04-11 1978-04-04 Rca Corporation Method of making a substrate contact for an integrated circuit

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FR2281646A1 (fr) * 1974-08-08 1976-03-05 Siemens Ag Procede pour fabriquer un dispositif composite monolithique a semiconducteurs
US4013484A (en) * 1976-02-25 1977-03-22 Intel Corporation High density CMOS process

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0017377A3 (en) * 1979-03-20 1982-08-25 Fujitsu Limited Method of producing insulated bipolar transistors and bipolar transistors insulated by that method
FR2472267A1 (fr) * 1979-12-20 1981-06-26 Mitel Corp Dispositif semiconducteur mos a double resistivite et methode de fabrication

Also Published As

Publication number Publication date
GB2072944A (en) 1981-10-07
GB2072944B (en) 1984-03-28
CA1157574A (en) 1983-11-22
JPS56501145A (https=) 1981-08-13
SE8103147L (sv) 1981-05-19
US4306916A (en) 1981-12-22
WO1981000931A1 (en) 1981-04-02
NL8020354A (nl) 1981-07-01

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