FR2460039A1 - Semiconductor component mfr. on amorphous substrate - by depositing basic multilayer structure before photoetching etc. - Google Patents

Abstract

The components are mfd by a first phase comprising (a) placing the substrate in a deposition chamber and (b) forming, without contacting the outside atmos., a uniform deposit of 4 successive primary layers comprising a first protective insulating layer, a second semiconductor layer, a third insulator layer, thinner than the first, and a fourth metal layer; and a second phase comprising (c) removing coated substrate and (d) subjecting the last three layers to desired photoetching and acillary deposition operations. The components are pref. thin film transistors (TFTs). The method is esp. useful for forming the restitution head of a teleprinter, including TFTs. The substrate may be as large as desired, within limit of homogeneity of deposits. It may be heated during deposition, improving semiconductor crystallinity, and any deposition technique may be used. Pattern definition and circuit complexity are increased and TFT photoetching gives a self-aligned grid, eliminating parasitic capacitances.

Description

The present invention relates to a process for producing semiconductor components and a component obtained by this process. It finds an application in particular in the production of thin film transistors (abbreviated as T.C.M.) and of circuits using T.C.M.

A TCM is an insulated gate field effect transistor. I1 is similar to the MOS transistor (Metal
Oxide-Semiconductor) with the difference that it is produced on an amorphous substrate and not on a monocrystalline silicon wafer. As a result, circuits at TCM

can have very large dimensions and are no longer limited by the size of the crystalline substrate.

 In practice, a T.C.M. is obtained by vacuum deposition of its various constituents on a glass substrate. Each layer (semiconductor, insulator, metal) is placed through a metal mask (type stencil or "Stencil-mask") in intimate contact with the substrate. To have a good definition of the patterns, the deposits are made by vacuum evaporation. The materials to be evaporated are placed in crucibles heated by the Joule effect or by electronic bombardment. In-situ masking excludes deposits in a gaseous atmosphere (sputtering, chemical deposition by gas, etc.) due to sheath phenomena which blur the edges of the patterns. In the best cases, a vacuum mask exchanger allows to carry out the whole TCM (or from the circuit to T.C.M.) in a single pumping cycle, which avoids pollution of the semiconductor layer and of the insulator-semiconductor interface.

 About this technique and its applications, one can consult the article by A.G. FISCHER entitled "Flat TV panels with polycrystalline layers" published in the review 11Microelectronics "vol 7, n04, 1976, pages 5 to 15.

 This technique of manufacturing of T.C.M., if it has as main advantage a speed of execution of the cir cuits, presents the disadvantage of being able to be suitable only for circuits of modest dimensions and definition. Indeed, a high definition metal mask with large external dimensions has a large number of very small openings has poor mechanical properties, expands, deforms. As several masks are necessary and as the patterns must overlap with great precision, a limitation quickly appears. It is estimated that this method makes it possible to produce circuits of overall dimension of the order of ten centimeters and having no more than four transistors per square millimeter. These modest performances limit the applications of the T.C.M.

 Furthermore, this technique requires that the constituent layers of the transistor be placed on a substrate at room temperature, in order to avoid expansion of the masks. However, the semiconductor deposit which is generally polycrystalline, would require the use of a higher substrate temperature (a few hundred degrees) in order to improve the crystallization.

Other manufacturing methods have been developed, using partial photogravure of the layers. They have the disadvantage of polluting the semiconductor layer in its active part. A description of these processes can be found in the article by JC ERSKINE and A. CSERHATI entitled "Cadmium selenide thin-film transistors" published in the journal "Journal of Vacuum Science Technology" vol. 15 (6),
Nov / Dec 1978, pages 1823 to 1835.

The present invention relates to a method for manufacturing semiconductor components and in particular to
TCM, which avoids all these drawbacks. The method of the invention uses the principle of photoengraving while retaining one of the advantages of the method described above, namely the production of all the constituent layers of the
TCM during a single production cycle, which prevents pollution of the layers and interfaces by external agents. But, compared to known methods, the invention provides the following advantages 1 - The substrate can be heated during the deposition of the semi
conductor, which leads to an improvement in the
crystallization.

2 - The size of the substrate can be as large as
wants, within the limit of the homogeneity of the deposits.

3 - Deposit techniques are no longer limited to evapo
vacuum ration and spray can be used
cathodic, chemical deposition by gas, etc ...

4 - The definition of the grounds is increased by the use of
high-precision photographic masks, already in use
for the production of integrated circuits.

5 - The complexity of the circuits carried out is greater and
reaches that of integrated circuits.

6 - The photogravure process described below achieves
grid self-alignment on the TCM channel,
which removes the parasitic gate-source capacities and
grid-drain.

To this end, the method of the invention comprises two phases - A) in a first phase
the substrate is introduced into a deposit enclosure,
- It is carried out on the whole of this substrate, and without
re-contact with the external atmosphere, a
uniform deposition of four successive primary layers
ves: a first layer of pro insulating material
tection, a second layer of semiconductor material
a third layer of insulating material,
thinner than the first layer, and
finally a fourth layer of a metal, - B) and, in a second phase
- the coated substrate is removed from the deposit vessel
green of these four layers,
- the last three layers are subjected to opera
photoengraving and depots, opera
appropriate to the structure of the component to
get.

In any case, the characteristics and advantages of the present invention will appear better after the description which follows, of embodiments given by way of explanation and in no way limiting. This description refers to attached drawings in which
FIG. 1 represents a schematic section of the substrate obtained after the first phase,
- Figure 2 shows a schematic section of the structure obtained at various stages of the second phase.

 The following description refers purely to the realization of TCM, but it goes without saying that the invention is more general and applies to any component or group of components involving layers of insulator, semiconductor and of metal deposited on an amorphous substrate.

Figure 1 shows in schematic section (neither the proportions nor the dimensions are respected) a substrate 1 on which are deposited: a thick layer 2 of insulating material, a layer 3 of semiconductor, a thin layer 4 of insulation and finally a metal layer 5.

The operating conditions relating to this first phase may be as follows
The substrate 1 on which the TCM circuit is to be produced is first introduced into a deposit enclosure. Four successive deposits are made, without contacting the outside atmosphere 1 - Deposition of the thick insulating layer 2.

To protect the circuit from impurities which may be contained in the substrate, first deposit, after degassing, a thick insulating layer 2. This layer will act as a barrier for the alkaline ions which could diffuse into the semiconductor and damage it. One can use for example, a layer of alumina deposited by evaporation of sapphire with the electron gun.

2 - Deposit of the semiconductor film 3.

For this operation, the substrate is brought to a temperature as high as possible (in general a little below 5000C if the substrate is made of glass). In the example described here, the semiconductor is Cadmium Selenide -CdSedeposited by vacuum evaporation. The temperature of the substrate is maintained at 40 ° C. during the deposition.

3 - Deposit of the insulating thin layer 4.

The gate insulator is then placed. On its dielectric qualities depends the power of modulation of the grid.

Its thickness will determine the breakdown voltage of the transistor. In the example described here, a thin layer of alumina prepared as in 1) is used.

4 - Deposit of the gate metal 5.

You can use molybdenum evaporated with an electron gun.

At this stage, the deposits can undergo an appropriate heat treatment: annealing under vacuum or in a special atmosphere.

 After removal from the deposition chamber, the substrate, on which the four primary layers have just been deposited, is then subjected to the photogravure and ancillary deposition operations specific to the second phase.

 Photoengraving consists in using a photosensitive resin, sensitized to ultraviolet light, through a photographic mask reproducing the desired design. After development and hardening of the resin, the exposed parts are removed by chemical etching.

After etching, the protective resin layer can be easily removed by dissolving in a suitable solvent.

This technique is commonly used in the manufacture of integrated circuits and transistors, but here, the stages of the manufacturing process are different and original. They are illustrated in FIG. 2, which shows eight sections a, b, c, d, e, f, g, h, corresponding to the following eight phases a) Photoengraving of the metal layer 5 and of the layer
insulating 4 using a first mask. This first
photogravure creates windows 6 and 7 on the semicon
conductor and defines the grids 8 of the TCM
the example described here, molybdenum and non-pro alumina
resin-coated are selectively attacked by im
mersion in acidic solutions.

b) Depositing a diffusing metal 10 and diffusing it
by annealing. This diffusion makes them conductive by
parts 11 and 12 of the semiconductor 3 released in a); the
diffusing metal can be aluminum or chromium,
and broadcast to 4000C.

c) Removal of excess metal by chemical attack, the
which must be selective, since it must leave in
touch the gate metal 5.

d) Using a second mask, photoetching of the layer
semiconductor to create windows 14 and 15 which
isolate the components on the substrate. In the example
taken, cadmium selenide can be removed by
bromine-methanol solution.

e) Depositing a thick insulator 16, different from insulators 1 and
4. I1 can be SiO2 for example.

f) Using a third mask and a chemical attack
selective, opening of windows 18, 19 and 20 in
thick insulation, to be able to make contacts
on grid 8, source 11 and drain 12 of each
transistor.

g) Deposition of a layer 21 of contact metal. This metal
can be aluminum for example.

h) Using a fourth mask, photoengraving of
contacts. We then obtain contact 23 of the grid,
24 from the source and 25 from the drain.

 The manufacturing process which has just been described, by the advantages which it provides, extends the scope of the T.C.M. The possibility of making circuits of large dimensions (the limit is imposed by the homogeneity of the deposits and the capacity of the mask aligner, but we can already consider making circuits of several square decimetres) allows design flat screen control circuits, directly on the screen support, which solves connection problems.

The high resolution of photoengraving allows the creation of complex circuits (shift register, memories, multiplexing circuits, etc.) and makes it possible to produce circuits associated with display matrices or facsimile heads (reading / restitution ).

Claims (6)

1. Method for producing semiconductor components on an amorphous substrate, characterized in that - A) in a first phase: the substrate is introduced into a deposit enclosure,  - It is carried out on the whole of this substrate, and without  return, in contact with the external atmosphere, a  uniform deposition of four successive primary layers ves: a first layer of pro insulating material  tection, a second layer of semiconductor material a third layer of insulating material, thinner than the first layer, and finally a fourth layer of a metal, - B) and, in a second phase:  - the substrate is removed from the deposit enclosure  covered with these four layers,  - the last three layers are subjected to ope  photoengraving and depot rations, opera  appropriate to the structure of the component to be obtained nir. 2. Method according to claim 1, for producing thin film transistors each comprising a drain, a source and a gate, characterized in that, in the second phase - by a first photogravure operation through  a first mask, we open through the fourth layer of metal and the third layer of insulation two openings for each transistor, the metal part  that remaining between these two openings constituting the transistor gate, - a layer of diffusing metal is deposited on the  seems from the substrate, then, by chemical attack select tive, we eliminate this second metal, which leaves sub  sister in the semiconductor two conductive zones  constituting, one the drain and the other the source of the transistor.  3. Method according to claim 2, characterized in that, using a second mask, a photogravure of the semiconductor is then carried out in order to separate the transistors from each other.  4. Method according to claim 3, characterized in that one then carries out, on the whole, a deposition of a thick insulator different from the insulator used for the first and / or the third layer, then, with using a third mask, a window is made in this thick insulator opposite the grid, the drain and the source. 5. Method according to claim 4, characterized in that one then deposits a layer of contact metal on the assembly and then, using a fourth mask, photogravure of this layer is carried out to obtain a gate contact, a drain contact and a source contact.  6. Semiconductor component obtained by the method according to any one of claims 1 to 5.