FR2355092A1 - Procede de preparation de surfaces de semi-conducteurs, ayant une bonne stoechiometrie et une faible contamination - Google Patents

Procede de preparation de surfaces de semi-conducteurs, ayant une bonne stoechiometrie et une faible contamination

Info

Publication number
FR2355092A1
FR2355092A1 FR7717233A FR7717233A FR2355092A1 FR 2355092 A1 FR2355092 A1 FR 2355092A1 FR 7717233 A FR7717233 A FR 7717233A FR 7717233 A FR7717233 A FR 7717233A FR 2355092 A1 FR2355092 A1 FR 2355092A1
Authority
FR
France
Prior art keywords
stoechiometry
good
low contamination
semiconductor surfaces
preparing semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
FR7717233A
Other languages
English (en)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
AT&T Corp
Original Assignee
Western Electric Co Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Western Electric Co Inc filed Critical Western Electric Co Inc
Publication of FR2355092A1 publication Critical patent/FR2355092A1/fr
Withdrawn legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/0223Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
    • H01L21/02233Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer
    • H01L21/02241III-V semiconductor
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D11/00Electrolytic coating by surface reaction, i.e. forming conversion layers
    • C25D11/02Anodisation
    • C25D11/32Anodisation of semiconducting materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/02258Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by anodic treatment, e.g. anodic oxidation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/30604Chemical etching
    • H01L21/30612Etching of AIIIBV compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3063Electrolytic etching
    • H01L21/30635Electrolytic etching of AIIIBV compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314Inorganic layers
    • H01L21/316Inorganic layers composed of oxides or glassy oxides or oxide based glass
    • H01L21/3165Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation
    • H01L21/31654Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation of semiconductor materials, e.g. the body itself
    • H01L21/3167Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation of semiconductor materials, e.g. the body itself of anodic oxidation
    • H01L21/31679Inorganic layers composed of oxides or glassy oxides or oxide based glass formed by oxidation of semiconductor materials, e.g. the body itself of anodic oxidation of AIII BV compounds
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/971Stoichiometric control of host substrate composition

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Metallurgy (AREA)
  • Electrochemistry (AREA)
  • Organic Chemistry (AREA)
  • Materials Engineering (AREA)
  • General Chemical & Material Sciences (AREA)
  • Weting (AREA)
  • Formation Of Insulating Films (AREA)
  • Cleaning Or Drying Semiconductors (AREA)

Abstract

L'invention concerne la préparation des surfaces des composés semi-conducteurs III-V. Elle se rapporte à un procédé comprenant au moins deux opérations ayant chacune une anodisation dans un électrolyte aqueux de pH convenable et une attaque par une solution basique. La seconde anodisation est réalisée avec un potentiel de à 10 V, afin qu'il se forme un film d'oxyde dont l'épaisseur est inférieure à 200 Angstrom , l'attaque étant réalisée dans une solution basique à un pH de 8 à 13,5 pendant un temps qui suffit au retrait du film d'oxyde formé. Application à la préparation de semi-conducteurs ayant une stoechiométrie superficielle et une contamination minimale par le carbone.
FR7717233A 1976-06-16 1977-06-06 Procede de preparation de surfaces de semi-conducteurs, ayant une bonne stoechiometrie et une faible contamination Withdrawn FR2355092A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/696,563 US4026741A (en) 1976-06-16 1976-06-16 Technique for preparation of stoichiometric III-V compound semiconductor surfaces

Publications (1)

Publication Number Publication Date
FR2355092A1 true FR2355092A1 (fr) 1978-01-13

Family

ID=24797589

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7717233A Withdrawn FR2355092A1 (fr) 1976-06-16 1977-06-06 Procede de preparation de surfaces de semi-conducteurs, ayant une bonne stoechiometrie et une faible contamination

Country Status (8)

Country Link
US (1) US4026741A (fr)
JP (1) JPS52154362A (fr)
BE (1) BE855585A (fr)
DE (1) DE2726483A1 (fr)
FR (1) FR2355092A1 (fr)
GB (1) GB1558248A (fr)
NL (1) NL7706592A (fr)
SE (1) SE7706618L (fr)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1556778A (en) * 1977-03-11 1979-11-28 Post Office Preparation of semiconductor surfaces
US4261791A (en) * 1979-09-25 1981-04-14 Rca Corporation Two step method of cleaning silicon wafers
DE3805752A1 (de) * 1988-02-24 1989-08-31 Fraunhofer Ges Forschung Anisotropes aetzverfahren mit elektrochemischem aetzstop
US4920078A (en) * 1989-06-02 1990-04-24 Bell Communications Research, Inc. Arsenic sulfide surface passivation of III-V semiconductors
JPH088256B2 (ja) * 1990-06-06 1996-01-29 松下電器産業株式会社 化合物半導体のパッシベーション膜の製造方法
FR2675824B1 (fr) * 1991-04-26 1994-02-04 Alice Izrael Procede de traitement de la surface gravee d'un corps semi conducteur ou semi-isolant, circuits integres obtenus selon un tel procede et appareil d'oxydation anodique pour mettre en óoeuvre un tel procede.
US5127984A (en) * 1991-05-02 1992-07-07 Avantek, Inc. Rapid wafer thinning process
US5451299A (en) * 1992-12-23 1995-09-19 The United States Of America As Represented By The Secretary Of The Air Force Method for reducing hydrogen absorption during chemical milling
JP3456790B2 (ja) * 1995-04-18 2003-10-14 三菱電機株式会社 半導体装置の製造方法及び選択エッチング用シリコン基板カセット
US6004881A (en) * 1997-04-24 1999-12-21 The United States Of America As Represented By The Secretary Of The Air Force Digital wet etching of semiconductor materials
JP4445716B2 (ja) * 2003-05-30 2010-04-07 日立ソフトウエアエンジニアリング株式会社 ナノ粒子製造方法

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
BE792614A (fr) * 1971-12-13 1973-03-30 Western Electric Co Procede de realisation d'une couche d'oxyde sur un semi-conducteur
US3898141A (en) * 1974-02-08 1975-08-05 Bell Telephone Labor Inc Electrolytic oxidation and etching of III-V compound semiconductors

Also Published As

Publication number Publication date
SE7706618L (sv) 1977-12-17
DE2726483A1 (de) 1977-12-29
GB1558248A (en) 1979-12-19
NL7706592A (nl) 1977-12-20
JPS52154362A (en) 1977-12-22
US4026741A (en) 1977-05-31
BE855585A (fr) 1977-10-03

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