FR2346856A1 - Procede de piegeage d'impuretes utilisant du silicium polycristallin sur la face arriere d'un bloc semi-conducteur - Google Patents
Procede de piegeage d'impuretes utilisant du silicium polycristallin sur la face arriere d'un bloc semi-conducteurInfo
- Publication number
- FR2346856A1 FR2346856A1 FR7705180A FR7705180A FR2346856A1 FR 2346856 A1 FR2346856 A1 FR 2346856A1 FR 7705180 A FR7705180 A FR 7705180A FR 7705180 A FR7705180 A FR 7705180A FR 2346856 A1 FR2346856 A1 FR 2346856A1
- Authority
- FR
- France
- Prior art keywords
- semi
- polycrystalline silicon
- rear face
- conductive block
- trapping process
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000012535 impurity Substances 0.000 title 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
- H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
- H01L21/02233—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer
- H01L21/02236—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor
- H01L21/02238—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor silicon in uncombined form, i.e. pure silicon
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/0217—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02205—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
- H01L21/02208—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si
- H01L21/02211—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound being a silane, e.g. disilane, methylsilane or chlorosilane
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
- H01L21/02255—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by thermal treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/314—Inorganic layers
- H01L21/3143—Inorganic layers composed of alternated layers or of mixtures of nitrides and oxides or of oxinitrides, e.g. formation of oxinitride by oxidation of nitride layers
- H01L21/3144—Inorganic layers composed of alternated layers or of mixtures of nitrides and oxides or of oxinitrides, e.g. formation of oxinitride by oxidation of nitride layers on silicon
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/314—Inorganic layers
- H01L21/316—Inorganic layers composed of oxides or glassy oxides or oxide based glass
- H01L21/31604—Deposition from a gas or vapour
- H01L21/31616—Deposition of Al2O3
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/314—Inorganic layers
- H01L21/318—Inorganic layers composed of nitrides
- H01L21/3185—Inorganic layers composed of nitrides of siliconnitrides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/32055—Deposition of semiconductive layers, e.g. poly - or amorphous silicon layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/322—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
- H01L21/3221—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/037—Diffusion-deposition
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/06—Gettering
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/085—Isolated-integrated
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/122—Polycrystalline
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S257/00—Active solid-state devices, e.g. transistors, solid-state diodes
- Y10S257/928—Active solid-state devices, e.g. transistors, solid-state diodes with shorted PN or schottky junction other than emitter junction
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Semiconductor Integrated Circuits (AREA)
- Formation Of Insulating Films (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US05/672,906 US4053335A (en) | 1976-04-02 | 1976-04-02 | Method of gettering using backside polycrystalline silicon |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2346856A1 true FR2346856A1 (fr) | 1977-10-28 |
FR2346856B1 FR2346856B1 (fr) | 1980-01-11 |
Family
ID=24700519
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR7705180A Granted FR2346856A1 (fr) | 1976-04-02 | 1977-02-18 | Procede de piegeage d'impuretes utilisant du silicium polycristallin sur la face arriere d'un bloc semi-conducteur |
Country Status (6)
Country | Link |
---|---|
US (1) | US4053335A (fr) |
JP (1) | JPS52120777A (fr) |
CA (1) | CA1079863A (fr) |
DE (1) | DE2714413A1 (fr) |
FR (1) | FR2346856A1 (fr) |
IT (1) | IT1115712B (fr) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2430667A1 (fr) * | 1978-07-07 | 1980-02-01 | Siemens Ag | Procede pour degazer ou fixer les gaz par getter, des composants a semi-conducteurs et des circuits integres a semi-conducteurs |
EP0120830A2 (fr) * | 1983-02-14 | 1984-10-03 | MEMC Electronic Materials, Inc. | Matériaux pour substrats semi-conducteurs ayant une capacité de piégeage |
EP0170560A2 (fr) * | 1984-07-02 | 1986-02-05 | EASTMAN KODAK COMPANY (a New Jersey corporation) | Procédé de piégeage sur la face arrière d'un substrat en silicium |
WO1987006762A1 (fr) * | 1986-05-02 | 1987-11-05 | American Telephone & Telegraph Company | Production de dispositifs semiconducteurs |
EP0500130A2 (fr) * | 1991-02-21 | 1992-08-26 | Kabushiki Kaisha Toshiba | Méthode de fabrication d'une plaquette semi-conductrice épitaxiée ayant des propriétés de piégeage |
Families Citing this family (97)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE2738195A1 (de) * | 1977-08-24 | 1979-03-01 | Siemens Ag | Verfahren zur reduzierung von kristallfehlern bei der herstellung von halbleiterbauelementen und integrierten schaltkreisen in einkristallinen halbleiterscheiben |
FR2435818A1 (fr) * | 1978-09-08 | 1980-04-04 | Ibm France | Procede pour accroitre l'effet de piegeage interne des corps semi-conducteurs |
US4191788A (en) * | 1978-11-13 | 1980-03-04 | Trw Inc. | Method to reduce breakage of V-grooved <100> silicon substrate |
US4246590A (en) * | 1979-01-22 | 1981-01-20 | Westinghouse Electric Corp. | Restoration of high infrared sensitivity in extrinsic silicon detectors |
US4416051A (en) * | 1979-01-22 | 1983-11-22 | Westinghouse Electric Corp. | Restoration of high infrared sensitivity in extrinsic silicon detectors |
US4249962A (en) * | 1979-09-11 | 1981-02-10 | Western Electric Company, Inc. | Method of removing contaminating impurities from device areas in a semiconductor wafer |
US4257827A (en) * | 1979-11-13 | 1981-03-24 | International Business Machines Corporation | High efficiency gettering in silicon through localized superheated melt formation |
US4354307A (en) * | 1979-12-03 | 1982-10-19 | Burroughs Corporation | Method for mass producing miniature field effect transistors in high density LSI/VLSI chips |
US4349394A (en) * | 1979-12-06 | 1982-09-14 | Siemens Corporation | Method of making a zener diode utilizing gas-phase epitaxial deposition |
JPS57136331A (en) * | 1981-02-17 | 1982-08-23 | Matsushita Electric Ind Co Ltd | Manufacture of semiconductor device |
JPS57136333A (en) * | 1981-02-17 | 1982-08-23 | Matsushita Electric Ind Co Ltd | Manufacture of semiconductor device |
JPS57153438A (en) * | 1981-03-18 | 1982-09-22 | Nec Corp | Manufacture of semiconductor substrate |
JPS58138035A (ja) * | 1982-02-12 | 1983-08-16 | Nec Corp | 半導体装置及びその製造方法 |
AT380974B (de) * | 1982-04-06 | 1986-08-11 | Shell Austria | Verfahren zum gettern von halbleiterbauelementen |
US5391893A (en) | 1985-05-07 | 1995-02-21 | Semicoductor Energy Laboratory Co., Ltd. | Nonsingle crystal semiconductor and a semiconductor device using such semiconductor |
US4716451A (en) * | 1982-12-10 | 1987-12-29 | Rca Corporation | Semiconductor device with internal gettering region |
US4608095A (en) * | 1983-02-14 | 1986-08-26 | Monsanto Company | Gettering |
US4608096A (en) * | 1983-04-04 | 1986-08-26 | Monsanto Company | Gettering |
JPS59186331A (ja) * | 1983-04-04 | 1984-10-23 | モンサント・コンパニ− | 半導体基質及び製法 |
JPS60119733A (ja) * | 1983-12-01 | 1985-06-27 | Fuji Electric Corp Res & Dev Ltd | シリコン板の重金属ゲッタリング方法 |
US4666532A (en) * | 1984-05-04 | 1987-05-19 | Monsanto Company | Denuding silicon substrates with oxygen and halogen |
US4622082A (en) * | 1984-06-25 | 1986-11-11 | Monsanto Company | Conditioned semiconductor substrates |
JPS6124240A (ja) * | 1984-07-13 | 1986-02-01 | Toshiba Corp | 半導体基板 |
US4589928A (en) * | 1984-08-21 | 1986-05-20 | At&T Bell Laboratories | Method of making semiconductor integrated circuits having backside gettered with phosphorus |
US7038238B1 (en) | 1985-05-07 | 2006-05-02 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device having a non-single crystalline semiconductor layer |
JPS6249628A (ja) * | 1986-03-24 | 1987-03-04 | Sony Corp | 半導体装置 |
US4796073A (en) * | 1986-11-14 | 1989-01-03 | Burr-Brown Corporation | Front-surface N+ gettering techniques for reducing noise in integrated circuits |
DE3738344A1 (de) * | 1986-11-14 | 1988-05-26 | Mitsubishi Electric Corp | Anlage zum einfuehren von gitterstoerstellen und verfahren dazu |
JPH0646622B2 (ja) * | 1987-06-30 | 1994-06-15 | 三菱電機株式会社 | 半導体基板用シリコンウェハの製造方法 |
US4843037A (en) * | 1987-08-21 | 1989-06-27 | Bell Communications Research, Inc. | Passivation of indium gallium arsenide surfaces |
JPH0648686B2 (ja) * | 1988-03-30 | 1994-06-22 | 新日本製鐵株式会社 | ゲッタリング能力の優れたシリコンウェーハおよびその製造方法 |
US5189508A (en) * | 1988-03-30 | 1993-02-23 | Nippon Steel Corporation | Silicon wafer excelling in gettering ability and method for production thereof |
DE3910185C2 (de) * | 1988-03-30 | 1998-09-24 | Nippon Steel Corp | Siliziumplättchen mit hervorragendem Gettervermögen und Verfahren zu dessen Herstellung |
JPH07120657B2 (ja) * | 1988-04-05 | 1995-12-20 | 三菱電機株式会社 | 半導体基板 |
DE3833161B4 (de) * | 1988-09-29 | 2005-10-13 | Infineon Technologies Ag | Verfahren zum Gettern von Halbleiter-Bauelementen und nach dem Verfahren erhaltene Halbleiter-Bauelemente |
US5227314A (en) * | 1989-03-22 | 1993-07-13 | At&T Bell Laboratories | Method of making metal conductors having a mobile inn getterer therein |
JPH03235333A (ja) * | 1990-02-13 | 1991-10-21 | Mitsubishi Electric Corp | ゲッタ効果の高められた半導体基板並びに該基板を用いた半導体装置およびその製造方法 |
JPH05110024A (ja) * | 1991-10-18 | 1993-04-30 | Sharp Corp | 半導体装置及びその製造方法 |
US5244819A (en) * | 1991-10-22 | 1993-09-14 | Honeywell Inc. | Method to getter contamination in semiconductor devices |
JP2723725B2 (ja) * | 1991-10-29 | 1998-03-09 | 信越半導体株式会社 | 半導体基板の製造方法 |
JPH05206146A (ja) * | 1992-01-24 | 1993-08-13 | Toshiba Corp | 半導体装置の製造方法 |
JPH05218049A (ja) * | 1992-01-31 | 1993-08-27 | Nec Corp | 半導体素子形成用基板 |
DE4304849C2 (de) * | 1992-02-21 | 2000-01-27 | Mitsubishi Electric Corp | Halbleitervorrichtung und Verfahren zur Herstellung einer Halbleitervorrichtung |
JPH06104268A (ja) * | 1992-09-21 | 1994-04-15 | Mitsubishi Electric Corp | ゲッタリング効果を持たせた半導体基板およびその製造方法 |
US5272119A (en) * | 1992-09-23 | 1993-12-21 | Memc Electronic Materials, Spa | Process for contamination removal and minority carrier lifetime improvement in silicon |
JP3024409B2 (ja) * | 1992-12-25 | 2000-03-21 | 日本電気株式会社 | 半導体装置の製造方法 |
JP3384506B2 (ja) * | 1993-03-30 | 2003-03-10 | ソニー株式会社 | 半導体基板の製造方法 |
JP3232168B2 (ja) * | 1993-07-02 | 2001-11-26 | 三菱電機株式会社 | 半導体基板およびその製造方法ならびにその半導体基板を用いた半導体装置 |
JPH0786289A (ja) * | 1993-07-22 | 1995-03-31 | Toshiba Corp | 半導体シリコンウェハおよびその製造方法 |
US5757063A (en) * | 1994-03-25 | 1998-05-26 | Kabushiki Kaisha Toshiba | Semiconductor device having an extrinsic gettering film |
JP3524141B2 (ja) * | 1994-03-25 | 2004-05-10 | 株式会社東芝 | 半導体装置及びその製造方法 |
JPH08264400A (ja) * | 1995-03-28 | 1996-10-11 | Mitsubishi Electric Corp | シリコン単結晶ウェハおよびその表面の熱酸化方法 |
JP3498431B2 (ja) * | 1995-07-04 | 2004-02-16 | 株式会社デンソー | 半導体装置の製造方法 |
US6004868A (en) * | 1996-01-17 | 1999-12-21 | Micron Technology, Inc. | Method for CMOS well drive in a non-inert ambient |
JP2743904B2 (ja) * | 1996-02-16 | 1998-04-28 | 日本電気株式会社 | 半導体基板およびこれを用いた半導体装置の製造方法 |
JP3391184B2 (ja) * | 1996-03-28 | 2003-03-31 | 信越半導体株式会社 | シリコンウエーハおよびその製造方法 |
US5764353A (en) * | 1996-11-29 | 1998-06-09 | Seh America, Inc. | Back side damage monitoring system |
TW350112B (en) * | 1996-12-27 | 1999-01-11 | Komatsu Denshi Kinzoku Kk | Silicon wafer evaluation method |
US6424011B1 (en) | 1997-04-14 | 2002-07-23 | International Business Machines Corporation | Mixed memory integration with NVRAM, dram and sram cell structures on same substrate |
US20070122997A1 (en) | 1998-02-19 | 2007-05-31 | Silicon Genesis Corporation | Controlled process and resulting device |
US6245161B1 (en) | 1997-05-12 | 2001-06-12 | Silicon Genesis Corporation | Economical silicon-on-silicon hybrid wafer assembly |
US6033974A (en) | 1997-05-12 | 2000-03-07 | Silicon Genesis Corporation | Method for controlled cleaving process |
JPH10321635A (ja) * | 1997-05-16 | 1998-12-04 | Nec Corp | 半導体装置及びその製造方法 |
US6146980A (en) * | 1997-06-04 | 2000-11-14 | United Microelectronics Corp. | Method for manufacturing silicon substrate having gettering capability |
US6548382B1 (en) | 1997-07-18 | 2003-04-15 | Silicon Genesis Corporation | Gettering technique for wafers made using a controlled cleaving process |
JP3211747B2 (ja) * | 1997-09-30 | 2001-09-25 | 日本電気株式会社 | 半導体装置の製造方法 |
US6228779B1 (en) * | 1998-11-06 | 2001-05-08 | Novellus Systems, Inc. | Ultra thin oxynitride and nitride/oxide stacked gate dielectrics fabricated by high pressure technology |
DE19915078A1 (de) * | 1999-04-01 | 2000-10-12 | Siemens Ag | Verfahren zur Prozessierung einer monokristallinen Halbleiterscheibe und teilweise prozessierte Halbleiterscheibe |
US6263941B1 (en) | 1999-08-10 | 2001-07-24 | Silicon Genesis Corporation | Nozzle for cleaving substrates |
EP1212787B1 (fr) | 1999-08-10 | 2014-10-08 | Silicon Genesis Corporation | Procede de clivage permettant de fabriquer des substrats multicouche a l'aide de faibles doses d'implantation |
US6500732B1 (en) | 1999-08-10 | 2002-12-31 | Silicon Genesis Corporation | Cleaving process to fabricate multilayered substrates using low implantation doses |
US6530074B1 (en) * | 1999-11-23 | 2003-03-04 | Agere Systems Inc. | Apparatus for verification of IC mask sets |
US6544862B1 (en) | 2000-01-14 | 2003-04-08 | Silicon Genesis Corporation | Particle distribution method and resulting structure for a layer transfer process |
US6376335B1 (en) | 2000-02-17 | 2002-04-23 | Memc Electronic Materials, Inc. | Semiconductor wafer manufacturing process |
US6620632B2 (en) * | 2000-04-06 | 2003-09-16 | Seh America, Inc. | Method for evaluating impurity concentrations in semiconductor substrates |
US6670283B2 (en) | 2001-11-20 | 2003-12-30 | International Business Machines Corporation | Backside protection films |
US6576501B1 (en) * | 2002-05-31 | 2003-06-10 | Seh America, Inc. | Double side polished wafers having external gettering sites, and method of producing same |
EP1482539A1 (fr) * | 2003-05-26 | 2004-12-01 | S.O.I. Tec Silicon on Insulator Technologies S.A. | Méthode de protection de la face arrière d'une plaquette et plaquette avec face arrière protégée |
US6749684B1 (en) | 2003-06-10 | 2004-06-15 | International Business Machines Corporation | Method for improving CVD film quality utilizing polysilicon getterer |
US20040259321A1 (en) * | 2003-06-19 | 2004-12-23 | Mehran Aminzadeh | Reducing processing induced stress |
RU2376678C2 (ru) * | 2004-08-20 | 2009-12-20 | Артто АУРОЛА | Полупроводниковый детектор излучения с модифицированной структурой внутреннего затвора |
JP4992246B2 (ja) * | 2006-02-22 | 2012-08-08 | 株式会社Sumco | シリコンウェーハ中のCu評価方法 |
US7737004B2 (en) | 2006-07-03 | 2010-06-15 | Semiconductor Components Industries Llc | Multilayer gettering structure for semiconductor device and method |
US8293619B2 (en) | 2008-08-28 | 2012-10-23 | Silicon Genesis Corporation | Layer transfer of films utilizing controlled propagation |
US7811900B2 (en) | 2006-09-08 | 2010-10-12 | Silicon Genesis Corporation | Method and structure for fabricating solar cells using a thick layer transfer process |
US9362439B2 (en) | 2008-05-07 | 2016-06-07 | Silicon Genesis Corporation | Layer transfer of films utilizing controlled shear region |
US8993410B2 (en) | 2006-09-08 | 2015-03-31 | Silicon Genesis Corporation | Substrate cleaving under controlled stress conditions |
US8330126B2 (en) | 2008-08-25 | 2012-12-11 | Silicon Genesis Corporation | Race track configuration and method for wafering silicon solar substrates |
US8148249B2 (en) * | 2008-09-12 | 2012-04-03 | Taiwan Semiconductor Manufacturing Company, Ltd. | Methods of fabricating high-k metal gate devices |
US8329557B2 (en) | 2009-05-13 | 2012-12-11 | Silicon Genesis Corporation | Techniques for forming thin films by implantation with reduced channeling |
US8541305B2 (en) * | 2010-05-24 | 2013-09-24 | Institute of Microelectronics, Chinese Academy of Sciences | 3D integrated circuit and method of manufacturing the same |
US8846500B2 (en) | 2010-12-13 | 2014-09-30 | Semiconductor Components Industries, Llc | Method of forming a gettering structure having reduced warpage and gettering a semiconductor wafer therewith |
JP2016009730A (ja) * | 2014-06-23 | 2016-01-18 | 株式会社東芝 | 半導体装置の製造方法 |
JP6593369B2 (ja) * | 2017-02-21 | 2019-10-23 | 株式会社村田製作所 | 半導体チップが実装されたモジュール、及び半導体チップ実装方法 |
US10242929B1 (en) | 2017-11-30 | 2019-03-26 | Semiconductor Components Industries, Llc | Method of forming a multilayer structure for reducing defects in semiconductor devices and structure |
CN113496871A (zh) * | 2020-04-03 | 2021-10-12 | 重庆超硅半导体有限公司 | 一种外延基底用硅晶片之背面膜层及制造方法 |
CN117174726B (zh) * | 2023-08-30 | 2024-08-09 | 中环领先半导体科技股份有限公司 | 半导体衬底、制备方法及图像传感器 |
Family Cites Families (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US2841510A (en) * | 1958-07-01 | Method of producing p-n junctions in | ||
US3370980A (en) * | 1963-08-19 | 1968-02-27 | Litton Systems Inc | Method for orienting single crystal films on polycrystalline substrates |
US3494809A (en) * | 1967-06-05 | 1970-02-10 | Honeywell Inc | Semiconductor processing |
US3632438A (en) * | 1967-09-29 | 1972-01-04 | Texas Instruments Inc | Method for increasing the stability of semiconductor devices |
JPS4912795B1 (fr) * | 1968-12-05 | 1974-03-27 | ||
DE1942838A1 (de) * | 1968-08-24 | 1970-02-26 | Sony Corp | Verfahren zur Herstellung integrierter Schaltungen |
JPS5129636B1 (fr) * | 1970-12-25 | 1976-08-26 | ||
US3723201A (en) * | 1971-11-01 | 1973-03-27 | Motorola Inc | Diffusion process for heteroepitaxial germanium device fabrication utilizing polycrystalline silicon mask |
JPS4940856A (fr) * | 1972-08-25 | 1974-04-17 | ||
JPS5010572A (fr) * | 1973-05-25 | 1975-02-03 | ||
US3862852A (en) * | 1973-06-01 | 1975-01-28 | Fairchild Camera Instr Co | Method of obtaining high-quality thick films of polycrystalline silicone from dielectric isolation |
US3900597A (en) * | 1973-12-19 | 1975-08-19 | Motorola Inc | System and process for deposition of polycrystalline silicon with silane in vacuum |
US3929529A (en) * | 1974-12-09 | 1975-12-30 | Ibm | Method for gettering contaminants in monocrystalline silicon |
US3997368A (en) * | 1975-06-24 | 1976-12-14 | Bell Telephone Laboratories, Incorporated | Elimination of stacking faults in silicon devices: a gettering process |
-
1976
- 1976-04-02 US US05/672,906 patent/US4053335A/en not_active Expired - Lifetime
-
1977
- 1977-02-18 FR FR7705180A patent/FR2346856A1/fr active Granted
- 1977-03-04 IT IT20895/77A patent/IT1115712B/it active
- 1977-03-08 CA CA273,410A patent/CA1079863A/fr not_active Expired
- 1977-03-09 JP JP2496277A patent/JPS52120777A/ja active Pending
- 1977-03-31 DE DE19772714413 patent/DE2714413A1/de active Pending
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2430667A1 (fr) * | 1978-07-07 | 1980-02-01 | Siemens Ag | Procede pour degazer ou fixer les gaz par getter, des composants a semi-conducteurs et des circuits integres a semi-conducteurs |
EP0120830A2 (fr) * | 1983-02-14 | 1984-10-03 | MEMC Electronic Materials, Inc. | Matériaux pour substrats semi-conducteurs ayant une capacité de piégeage |
EP0120830A3 (en) * | 1983-02-14 | 1986-07-23 | Monsanto Company | Semiconductor substrate materials having enhanced gettering ability |
EP0170560A2 (fr) * | 1984-07-02 | 1986-02-05 | EASTMAN KODAK COMPANY (a New Jersey corporation) | Procédé de piégeage sur la face arrière d'un substrat en silicium |
EP0170560A3 (fr) * | 1984-07-02 | 1989-01-18 | EASTMAN KODAK COMPANY (a New Jersey corporation) | Procédé de piégeage sur la face arrière d'un substrat en silicium |
WO1987006762A1 (fr) * | 1986-05-02 | 1987-11-05 | American Telephone & Telegraph Company | Production de dispositifs semiconducteurs |
EP0500130A2 (fr) * | 1991-02-21 | 1992-08-26 | Kabushiki Kaisha Toshiba | Méthode de fabrication d'une plaquette semi-conductrice épitaxiée ayant des propriétés de piégeage |
EP0500130A3 (en) * | 1991-02-21 | 1993-03-03 | Kabushiki Kaisha Toshiba | Method of manufacturing an epitaxial semiconductor wafer having gettering properties |
Also Published As
Publication number | Publication date |
---|---|
DE2714413A1 (de) | 1977-10-20 |
FR2346856B1 (fr) | 1980-01-11 |
CA1079863A (fr) | 1980-06-17 |
IT1115712B (it) | 1986-02-03 |
JPS52120777A (en) | 1977-10-11 |
US4053335A (en) | 1977-10-11 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
FR2346856A1 (fr) | Procede de piegeage d'impuretes utilisant du silicium polycristallin sur la face arriere d'un bloc semi-conducteur | |
IT1084797B (it) | Apparato per l'accrescimento di un foglio di silicio monocristallino | |
FR2332615A1 (fr) | Procede de fabrication d'un dispositif a semi-conducteurs | |
JPS52117060A (en) | Method of cleaning silicon wafers | |
IT1067968B (it) | Filamenti di carburo di silicio e metodo per la loro fabbricazione | |
IT8023728A0 (it) | Resistivita'.metodo di fabbricazione di unapellicola di silicio policristallino di bassa | |
IT1193203B (it) | Procedimento per la produzione di silicio policristallino | |
BE828188A (fr) | Procede de fabrication d'un dispositif semi-conducteur | |
IT1079704B (it) | Processo per purificare silicio | |
FR2321937A1 (fr) | Appareil de formation d'un monocristal semi-conducteur par tirage | |
IT1086874B (it) | Dispositivo per l'avviamento di motori ad esempio per motociclette | |
IT1123675B (it) | Procedimento per l'attacco selettivo di zaffiro mediante mascheratura di nitruro di silicio | |
IT1114775B (it) | Processo ed apparecchiatura per formare corpi cristallini di silicio | |
BE821565A (fr) | Procede de fabrication d'un dispositif a semi-conducteur | |
IT1109399B (it) | Procedimento per produrre monocristalli purissimi di silicio | |
DE2860161D1 (en) | Method of forming very small impurity regions in a semiconductor substrate | |
BE859479A (fr) | Procede de fabrication d'orthoacetates d'alcoyle | |
JPS52154362A (en) | Method of forming semiconductor surface of 335 group compound | |
FR2284367A1 (fr) | Procede d'obtention de monocristaux de tellurure de cadmium dopes | |
FR2342098A1 (fr) | Procede pour la croissance selective de silicium microcristallin | |
FR2326262A1 (fr) | Procede de formation d'articles en carbure de silicium | |
FR2348573A1 (fr) | Procede de passivation d'elements semi-conducteurs a jonction | |
JPS5364471A (en) | Method of producing silicon nitride barrier on semiconductor substrate | |
FR2331153A1 (fr) | Procede de fabrication d'un dispositif semi-conducteur | |
IT1143606B (it) | Utensile dentato per la sbavatura a trucioli di ruote dentate |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
ST | Notification of lapse |